JPS5995788A - Pal chroma signal processor - Google Patents

Abstract

PURPOSE:To correct normally the phase of a burst and a chroma signal by detecting the sequence change and phase skip respectively and using this signal in the reproduction where the recording system not arranged with color alignment is applied by 90 deg. PS (phase shift) system. CONSTITUTION:The 90 deg. phase shift system is applied to the recording system without color alignment and a reproducing signal from a medium recording a PAL video signal is inputted to an input terminal 2. This reproducing signal is transmitted to an output terminal 11 via a crosstalk eliminating circuit 5 and a sequence correcting circuit 8. A part of an output signal of the correcting circuit 8 is extracted by a burst gate 12, and the sequence change and the phase of a chroma signal in a burst signal are detected by a detecting circuit comprising phase shifters 13, 14, 17 and phase comparators 16, 18 and the like. A phase switching circuit 23 constituting a sequence correcting circuit 8 and an APC loop is controlled in response to the said detecting output and the phase of the burst signal and the chroma signal is corrected normally.

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a processing device for a reproduced chroma signal in a TR that records and reproduces a PAL video signal, and is particularly adapted to correct chroma phase jumping caused by track skipping, etc. It is something.

BACKGROUND ART AND THEIR PROBLEMS FIG. 1 shows a tape format when a PAL video signal is recorded using a recording method that does not take color alignment using a helical scan type low frequency conversion type VTR. still,
Tracks A and B not shown.

C%D is actually formed on the tape obliquely to the longitudinal direction of the tape.

In the figure, arrows with a phase difference of 90° (1a in (1b) indicate the phase of the burst signal are shown alternately every 1H in each track A, D). Burst signals (11X1b) of corresponding H sections between adjacent tracks (for example, tracks A and C, B and D)
The orientation is different, and the so-called color alignment is not aligned.

In this tape format, when the rotating head traces in the direction of the arrow as shown by the dotted line during reproduction in the variable speed mode, track skipping occurs at point a, which causes a sequence change in the phase of the reproduced burst signal. That is, as shown in FIG. 2, at point a, the reproduction burst phase is continuous with the burst signal (1b). If such sequence changes in the reproduction burst phase are left as they are, color tone disturbances will occur on both sides of the monitor. Therefore, it is necessary to detect the sequence change from the reproduced output and correct it to the correct sequence.

-10,000, the 90°PS method (
90° phase shift method) is known.

This is a method of alternately recording a track whose phase is 'e90' of the cross track number every 1H, and a tratract track whose phase does not change.

When this 90°PS method is applied to the recording method shown in FIG. 1, the chroma signals of tracks A, C or B, D are recorded with a phase shift of 90° every 1H. In that case, when the speed change mode is performed during playback, a track jump at point a causes a phase jump of 90', 180°, or 270'' in the chroma signal.The above-mentioned phase jump also occurs due to lack of horizontal synchronization signal, etc. .

Therefore, if the 90° PS method is used in combination with a recording method in which the color alignment is not uniform as shown in FIG. 1, both the sequence change of the burst signal and the phase jump of the chroma signal described above will occur.

OBJECTS OF THE INVENTION The present invention detects the above-mentioned sequence changes and phase jumps, respectively, and corrects the phases of burst signals and chroma signals correctly.

Summary of the Invention The present invention provides a recording method that does not require color alignment.
``A burst signal is detected from a reproduced signal reproduced from a recording medium on which a PAL video signal is recorded by applying the phase shift method, and based on a signal whose phase of this burst signal is substantially aligned and a reference signal, or as described above. burst signal and 1
This is a PAL chroma signal processing device that detects a sequence change in a burst signal and a phase change in a chroma signal based on a reference signal whose phase changes by 90 degrees every H.

Example: When a completely recorded tape is played back by applying the 90'PS method to a recording method in which the color alignment is not aligned, a change in the burst signal sequence occurs due to track skipping, etc.
There are the following eight cases in which a phase jump of the chroma signal can occur.

(1), normal, ie, sequence changes and phase jumps do not occur;

(2) The sequence is normal, and the chroma phase is phased by 190° with respect to the reference phase.

(3) The sequence is normal and the chroma phase is offset by 1180' with respect to the reference phase.

(4) The sequence is normal and the chroma phase is shifted by 12706 with respect to the reference phase.

(5) There is a sequence change, and the chroma phase is normal.

(6), there is a sequence change, chroma phase power 5-90
'(7), there is a sequence change, the chroma phase is 118
σ phase shift can be completed.

(8), there is a sequence change and the chroma phase is -270
゜The phase shift can be completed.

This embodiment detects the cases (1) to (8) above and uses a sequence correction signal S to normally correct the burst signal.
C and a phase jump correction signal PC2 for properly correcting the chroma phase.

FIG. 6 shows an embodiment of the present invention for obtaining the correction signal SC%PC.

A chroma signal S1 separated from the reproduced signal is applied to the input terminal (2). This signal S1 is, for example, 732KH.
This is the result of low frequency conversion to z. This signal S? is inversely converted to the original frequency of 4.43 M, Hz by the frequency conversion circuit (3) and becomes the signal S2. The phase of this signal S2 is determined by the AP
A obtained from the reference oscillator (4) by the C loop,
It can be controlled to have a predetermined relationship with the phase of the 46 MHz reference signal So. The signal 82 is then passed through a comb filter (5)
In addition to this, crosstalk is removed. The comb filter (5) is composed of a 2H delay circuit (6) and a switch (7). The switch (7) can switch between contacts a and b every 2H by a pulse of horizontal scanning frequency fH. The signal S from which crosstalk has been removed is applied to a sequence correction circuit (8) to correct the burst signal sequence λ. This correction circuit (8) is 1H-τ(
λ: Burst wavelength] Delay circuit (9) and switch (10
). Switch +IC, l is connected to contact a11 by correction signal SC whenever there is a sequence change.
can be switched. Sequence correction is completed 1st Tsukuji No. S
3 is output from the output terminal 01) and is applied to the burst gate (I21) to extract the burst signal.

First, in the normal case of (1) above, ■, ■... in the figure
...Each output phase at the 0 point is shown in Figure 4 ■, ■...
......It is shown by the arrow ■.

A burst signal (1
a) (1b) appear alternately. Also switch 1
.

(In 151, the contact a%b is switched every H by -2-fH Hals. As a result, the burst signal (1a)
The burst signal (1b) is taken out to the 0 point through the 45° phase shift circuit (131), and the burst signal (1b) is output to the 0 point through the -45" phase shift circuit a.
Obtained to the point. As a result, a burst signal whose phase is aligned in the 180° direction at the 0 point is obtained. This burst signal is
The signal is applied to the phase comparator 06), and is also applied from the 0 point to the phase comparator a8) through the -90° phase shift circuit αη.

On the other hand, from the reference oscillator (4), a reference signal MSo is obtained at the 0 point, the phase of which is 90° ahead of the burst signal obtained at the 0 point. This signal SO is output from the 0 point to the phase comparator Q.
61 Added to (18).

The phase comparator α6) constitutes part 7i of the APC loop, and its comparison output has the waveform shown in FIG.
When the 0-point input and the 0-point input have a phase difference of 90°, the comparison output becomes 0 level and the APC loop is locked. Therefore, in the present case, a D level comparison output is obtained at point 0, and this comparison output is added to the sequence detection circuit (19) and the 732KH,z VCO (voltage controlled oscillator) (20). The above detection circuit (
from the old 1.0 point to I When positive polarity pulses and negative polarity pulses are applied alternately every I-1, the correction signal S
It is configured to output C. Therefore, in this case, the above-mentioned detection circuit (the above-mentioned signal SC is not obtained from one, and the switch +10) becomes, for example, it, which is closed to the contact side.

The phase comparator θ8) also has the comparison output waveform shown in Fig. 12, and is configured so that the comparison output becomes 0 level when the 0 point input and the 0 point input have a phase of 90'. .

In this case, since the phase difference between the 0 point input and the 0 point input is 180°, a negative polarity pulse is generated for each 0 point comparison output GJIH, and this pulse is applied to the burst ID detection circuit (21). This detection circuit (21) is configured to output a verse 1-ID signal 84 when a pulse of positive polarity is applied from the 0 point to the correction signal PC generation circuit Q2. Therefore, in this case, signal S4 cannot be obtained and the PC
The generator circuit @ is operating normally.

In normal operation, when a track whose chroma phase is shifted by 90'' every 1H is reproduced, the output phase of V CO (20> is changed to 0'' according to the chroma phase of the reproduced signal).
, -90@, -180°, and -270°, and are sent to the frequency conversion circuit (24). For this purpose, a phase shift circuit (a) (2gl (271) and a switch circuit (23) are provided, and by switching the continuation points a to d of this switch circuit (23), the output phase of the UCO (201) is sequentially shifted. For switching this switch circuit (c), a PC generation circuit (2) is provided.For this PC generation circuit (2),
As will be described later with reference to the figure, normally a signal PC is output that sequentially switches the contacts a to d of the switch circuit (23) based on the PS signal and the fH pulse. Then, as will be described later, when a change in the chroma phase is detected and the parsed ID signal is applied, a correction signal PC2 is outputted to forcibly advance the connection contact of the switch circuit C23) by one.
That is, the output phase of V COf201 is shifted by 90 degrees. In this case, the normal operation described above is being performed, and the sequentially phase-shifted VCO outputs are applied to the frequency conversion circuit (24). This frequency conversion circuit (2
41 obtains a 5.17 MHz signal S5 using the 752 kHz vCO output and the 4.45 MH1 reference signal So and applies it to the frequency conversion circuit (3).

The frequency conversion circuit (3) converts the 732KH2 input chroma signal into a 4.43 MHz chroma signal S2 based on the signal S5.
is being converted to . As a result of the above, the Arc loop is locked and normal operation is maintained.

Next, in the case of (2) above, the output phase of points 0 to 0 is the fifth
It will be as shown in the figure.

The sequence of the burst signal (1a/1a) obtained at point 0 is normal, but its phase is delayed by 90° from the correct phase shown by the dotted line as shown in FIG. 5, and becomes the phase shown by the solid line. The burst signal (1a) is applied to the -45° phase shift circuit (0), and the burst signal (1b) is applied to the +45° phase shift circuit (
13), the phase of the 0 point is aligned in the 90° direction. As a result, the 0 point input and the 0 point input of the phase comparator ([6) have a phase difference of 180°. Therefore, a negative polarity pulse is obtained at the 0 point. In this case, the detection circuit ci1
The signal PC2 is not obtained from the APC loop, and the chroma phase is automatically advanced by 90° to become normal due to the pulling action of the APC loop. That is, the output of the phase comparator (10) is pulled from point 1806 in FIG. 12 back to the lock point at 90'''.

Moreover, since the phase comparator α mark ■, the 0 point input has a phase difference of 90°, the 0 point output has a 0 level. Therefore, the signal S4 cannot be obtained from the burst, and the correction signal PC2 cannot be obtained either. Therefore, ■CO output passes through a switch (231 and a half) and is added to the frequency conversion circuit (241).
The CO output is phase shifted by 90° due to the pulling action of the APC. As a result of the above, the burst signals (1a) and (1b) at the [present] point in FIG. 5 return to the position indicated by the dotted line, and the chroma phase becomes normal.

In the case of (4) above (in the case of (3), as will be described later in 9), the output phase from 0 to 0 points is as shown in FIG.

The burst signals (1a) (Ib) at point 0 have a normal sequence, but the phase shown by the solid line is delayed by 270° from the normal phase shown by the dotted line. Burst signal (1a) is -4
is added to the 5° phase shift circuit side, and the burst signal (1b) is +
45@phase shift circuit 03) and the phase of the 0 point is 270
Align in the ° direction. As a result, the @ and 0 point inputs of the phase comparator 8GI are in phase, and therefore the 0 point output is a positive pulse. Excellent phase comparator (■ of 1B, 0 point input is 9
The phase difference becomes 0°, and the 0 point output becomes O level. In this case as well, the detection circuit (19) (2υ) is ignored, and the APC loose automatically draws in the phase normally in black, thereby returning the burst signal (Ia/1b) to the dotted line position in FIG.

In the case of (3) above, the output phase from 0 to 0 points is as shown in FIG.

There is no sequence change in the 0-point bursting Q (1a) (1b), but the change is 18o from the dotted line position to the solid line position, respectively.

I'll be late. In this case, the burst signal (1a) is phase-shifted by -45°, the burst signal (1b) is phase-shifted by +45°,
The phase of the 0 point is aligned in the 0° direction. As a result, the phase comparator (■ of rω, 0 point input becomes a phase difference of 90°, 0
The point output becomes 0 level. This 11. (Thus V C
O(20+ is pseudo-locked. Also, since the phase comparator (i-marked ■, ■ black power is in phase), the 0 point output becomes a positive polarity pulse. This pulse is detected by the detection circuit (21). , a signal S4 is output.Based on this signal s4, the PC
The generator circuit (two outputs a correction signal PC2, which forcibly advances the connection contact of the switch (23) by one. As a result, the frequency conversion circuit (Added to 24j. This 11 forces the phase of the signal s2 that cannot be obtained from the frequency conversion circuit (3) to be delayed by 90'. Along with this, the 0-point burst signals (1a) (1b) As a result of the delay of 90', each phase of the 0 to 0 points becomes the same as in Fig. 7.In other words, it becomes substantially the same as in the case (3) above, and the APC loop pull-in operation is performed as explained in the case (3). The state becomes normal.The pulse at point (■) disappears when the normal correction is completed.

Next, in the case of (5) above, the phases of points ① to [F] are as shown in FIG.

At point 0, the phases of the burst signals (Ia) (1b) are normal, and the burst signals (1a) are continuous at 2H.

These burst signals (Ia) (1b) are transferred to the phase shift circuit (t
3) As a result of the +45° phase shift when <141, at the 0 point, the continuous points of the burst signal (1a) were first in the 180° direction, and then the 270° direction and the 90° direction were alternately repeated. It becomes a phase. Therefore, positive and negative pulses appear alternately at the 0 point, whereby the signal SC is output from the detection circuit section, and the swing/QQI is switched to the contact a side. As a result, the signal S2 becomes iH- in the delay circuit (9).

The sequence of burst signals is corrected correctly. Further, in this case, the berth 1-ID signal SA cannot be obtained. It should be noted that the pulse at the 0 point disappears when the normal correction is completed.

In the case of (6) above, the phases of the points ①~ are as shown in FIG. 9.

In the burst signals (1a) and (1b) at point 0, the normal phases shown by dotted lines are exchanged with each other due to a sequence change, and the phases are separated by 190° due to a phase jump.

The phases of ■, ■, ■, and 0 points are as shown in FIG. 9, and positive and negative pulses appear alternately at the 0 point. This positive pulse provides the verse 1-ID signal S4. As a result, a correction signal PC2 is obtained, and the connection contact of the switch (c) is advanced by one. When the burst phase at the 0 point is phase-shifted by −90° by the coil 1, the phase becomes the phase shown by the solid line in FIG. Note that this state is the same as the case (7) above. As a result, the phase of each point becomes as shown in points ① to ② in Fig. 10. A correction signal SC is obtained from the detection circuit ([■) by the output of this 0 point.The sequence of the burst signal is corrected by kneading.When this sequence correction is performed and the burst signal becomes normal, the chroma signal is shifted by 1180 degrees. 4 Therefore, as mentioned above, from the state of FIG. 6 to the state of FIG. 7, that is, the case of (3) above, From this state, the chroma phase becomes normal by pulling in the APC loose.

Next, in the case of (8) above, the phase relationship of each point is shown in Figure 11 ■~
It will be as shown in ■.

Then, the ID detection circuit (21
), the signal S4 is obtained, and the correction signal PC2 is output from the coil ζ, and the switch (23) is forcibly switched. Therefore, the phase of the signal S2 is shifted by 190°, and the chroma phase becomes normal. As a result, the relationship between the burst phases becomes as shown in FIG. As a result, the phase of each point changes to ■ to ■ in the same figure, resulting in the same state as in the case of (51). Therefore, the above-mentioned operation is performed, the switch (10) is switched to the contact side, and the sequence correction is performed. completed and everything is normal.

According to the above, even if the states (21 to (8)) occur, they can all be corrected to the normal state (1).

In Fig. 6, the switch α51 is switched so that the burst signal (1a) is shifted by +45 degrees and the burst signal (1b) is shifted by -45°.If this switching is incorrect, the chroma If the phase is incorrect, that is, the same situation as in the cases of collapse described in (5) to (8) occurs, so correction is automatically made and normal switching is performed. In addition, ±45°45° phase shift 13) (la and switch (151%■, not provided between 0 points, reference oscillator (
4) may be provided on the output side. Also -9 [1” phase shifter α
A +90° phase shifter may be provided in place of η.

Roughly speaking, the phase comparator (16) is also used as the phase comparator of the APC loop, as described in case (1) above. By doing so, it is possible to eliminate phase sag in the APC loop due to the burst phase shifting by ±45° every 1H.

That is, in the conventional APC loop, the burst signals (1a) and (1b) are directly input to the phase comparator Q61 from the 0 point.
I try to add it to. Since this phase comparator αQ compares the burst signals (Ia) (ib) and the reference signal So, which have a phase difference of 45 degrees from each other, the comparison output is 1H.
Fluctuations occur at each level. Therefore, a frequency fluctuation occurs in the output of the VCO (201) every 1H, and when this frequency fluctuation is transmitted to the frequency conversion circuit C24J (31), a phase sag occurs in the signal S2 every 1H, and as a result, the reproduced color signal When the burst went on, it was already causing problems.

In the embodiment of FIG. 3, ±45°45° phase shift 13) (1
4), the phase-aligned burst signals obtained from point 0 are applied to the phase comparator (16) under normal conditions. Therefore, there is no level variation in the comparison result at 0 points, and the above-mentioned problem can be solved.

Next, an embodiment of the sequence detection circuit section will be described with reference to FIG.

This detection circuit outputs a signal SC when positive and negative pulses are alternately applied every 11'l from the 0 point in FIG. 16, as described above. In FIG. 13, a pulse from point 0 in FIG. 6 is applied to the input terminal sO1. In this case, the positive polarity pulse and the negative polarity pulse are 1H.
There are times when pulses are applied alternately every 1H, and times when only positive or negative pulses are applied every 1H. These pulses and i1.

The pulse inverted by the inverter Sυ is passed through the switch 02) which is switched by s 2 fy'.
The same polarity pulses having only positive polarity or only negative polarity are applied to the sample and hold circuit 0■. The same polarity pulse that has been sampled and held will then have time constants R and C of, for example, 4.
It is integrated by an integrating circuit 04) of about H.

Therefore, this integrated output becomes a voltage whose level increases in the positive or negative direction. This voltage is the comparator Cl! 51
436) and the respective reference voltages +Vsl and V
It can be compared with sl. When the above deviation waveform exceeds the above +Vs1 or -Vs1, the comparator is set to 0 or (3
A detection pulse is output from 6), and is outputted as the correction signal SC to the output terminal (to) through ORKATE 417).

Next, an embodiment of the PC generation circuit (22) will be explained with reference to FIGS. 14, 15, and 16.

This 1) C generation circuit (221 is normally a switching signal P
C1, and when the burst ID signal S4 is added, a correction signal PC,2 is output.

In FIG. 14, a phase shift instruction signal PS as shown in FIG. 15 is applied to an input terminal (40).

The track signals reproduced during the rLJ period of the signal P8 are phase-shifted by 190° every 1H. In addition, the input terminal (
A pulse of fH as shown in FIG. 15 is applied to 4'D. This fH pulse and the signal P8 are inverted (4
The signal inverted at each point is added to the ANDKET (4J).Therefore, at the 0 point, as shown in Figure 15, fH is added to the P8 period.
A pulse appears. On the other hand, the input terminal (44) receives the parse 1-ID detection signal S when there is a change in chroma phase.
4 is added. By applying this signal S4 and the pulse at the 0 point to the OR gate [451, the pulse shown in FIG. 15 (■) appears at the 0 point.

It is assumed that the signal S4 is detected at the position of the burst signal and can be output at a position that does not overlap with the fH pulse. ■FP (flip-flop) at the rising edge of the pulse at the point
(Figure 15■
This output roughly triggers the FF 17), so that the output shown in FIG. 15 [F] appears at the 0 point. The outputs of the points between the 0 point and the 0 point are applied to the switch circuit (c), and become the signals Pc1 and Pc2 for sequentially switching the contacts a to d.

In this case, the switch circuit (
The VCO output phase obtained from c) is phase-shifted as shown in FIG.

Next, one part of the ID detection circuit will be explained.

This detection circuit (211) outputs the burst ID detection signal s4 when a positive pulse is applied from the point ■.Therefore, by comparing the output of the point ■ with the reference level, the signal S4 can be obtained. Yes, but the following inconvenience occurs here.

The comb filter for crosstalk removal in Figure 6 (
5) uses a 2H delay circuit (6).

Therefore, the signal S4 is detected, and the VCO phase is shifted by -90°, so that the signal S4 before the comb filter is detected.
Even if the chroma phase of 2 is corrected, the signal s4 may be detected again based on the delayed output of the delay circuit (6). Therefore, the phase of the VCO output is further shifted by 190', and the already corrected signal s2 is easily further corrected.
Based on this, the signal s4 may be further detected. As a result, the signal s4 appears repeatedly and the circuit enters a kind of oscillation state in which the same state cycles.

A specific example of the above state is shown in Fig. 17. Fig. 17 shows the normal operation of the above (1) in the stage ■ to the case of the above (6) in the stage ■, that is, as shown in Fig. 9. The input/output of each circuit in FIG. 3 is shown when the sequence changes and the chroma phase changes by 190 degrees. As mentioned above, the case (6) moves once to the case (7) in FIG. 10 at stage (■), but at this time, the phase ratio f
! 4 as shown by the arrow (50) on the input device (■ point)
A 5° component appears. Since the phase comparator (18) is designed to generate an output signal even if a 45° component is input in order to provide a certain margin for detection, the signal s4 is output at this point. By kneading, the stage of ■ is reached, and the signal S4 is generated here as well, and the process is roughly ■, ■, ■, ■
A signal S4 is generated at each stage. In this example, the process returns from the stage ■ to the stage ■, and thereafter, the state of ■→■→■ is repeated.

Figure 18 shows an ID detection circuit (
An example of 2]) is shown below.

The output pulse at point 0 in FIG. 6 is applied to the input terminal 6υ. This pulse is applied to the comparator 62 and compared with the reference voltage +Vs2, so that only when a positive pulse is input, the pulse 8 shown in FIG.
Outputs 4'. By triggering the monomultiplier by this pulse 84', a pulse shown in FIG. 18 is sent to the output terminal 64).

This pulse essentially becomes the parsed ID detection signal S4. Note that the time constant of the monomulti (53) is selected to be larger than 2H, for example.

According to the above, the ID detection signal 84' of the value obtained at the 0 point
Even if it is obtained every 1H, the above-mentioned problem can be solved without any problem. The circuit in Figure 18 is NTSC.
The effect of the invention is that it can be applied to other methods as well.The burst sequence change and chroma phase change in the reproduced signal of a completely recorded PAL signal can be easily detected by using a method that does not take color alignment and a 90' phase shift method in combination. be able to. ■CO in APC loose
phase sag can be eliminated.

[Brief explanation of drawings]

Fig. 1 is a diagram showing a tape format recorded using a recording method that does not take color alignment, Fig. 2 is a diagram showing sequence changes in burst signals due to track skipping, and Fig. 6 is a block diagram showing an embodiment of the present invention. , Figures 4 to 11 are time charts for each operation in Figure 6, Figure 12 is a diagram of the output characteristics of the phase comparator, Figure 13 is a block diagram showing an embodiment of the sequence detection circuit, and Figure 14 is a PC signal diagram. (Block diagram showing an example of the generation circuit, Figure 15 is the time chart of Figure 14, Figure 16 is the truth table of the switch circuit of Figure 15, Figure 17 is a perspective view) explaining the problems that occur during ID detection. FIG. 18 is a block diagram showing an embodiment of the ID detection circuit, and FIG. 19 is a time chart of FIG. 18. In addition, in the symbols used in the drawings, (4)・・・・・・・・・・・・・・・Reference oscillator Mutsumi
・・・・・・・・・・・・−・Perst Gate (13)
・・・・・・・・・・・・・・・”-45° phase shift circuit (
]4J・・・・・・・・・・・・・・・−45° phase shift circuit α port (I81・・・・・・・・・・・・Phase comparator (
L9) - Sequence detection circuit (21)...... Parse)
This is an ID detection circuit. Agent Masaru Saturn〃 Yoshio Tsunekako〃 Toshiki Sugiura 6th figure■ ----1■ ↓ ↓ ↓ ↓ ■O□ ■ ↓ ↓ ＋ No.■O 8th figure■ru. ν ＼ ↑ ! ■−↓ I ■ + + Each 1 ■−−m= ■O□ ■ ↓ 1 ↓ ↓ ■ ↓ ↓ ↓ ↓ ■O ■ -111 ■θ□ Figure 9 ■ Biz＼ / p /J ■ −−m= C'＋＋＋＋ ■θ□ ■ １ １ １の・−「Go-cho 5-

Claims (1)

[Claims] A burst signal is detected from a reproduced signal that is reproduced from a recording medium in which a PAL video signal is recorded by applying a 90' phase shift method to a recording method that does not take color alignment, and the phase of this burst signal is substantially aligned. PAL detects a sequence change in a burst signal and a phase change in a chroma signal based on a signal and a reference signal, or based on the burst signal and a reference signal whose phase changes by 90 degrees every 1H. Chroma signal processing device.