JPS5994955A - Dial signal transmitting circuit - Google Patents

Dial signal transmitting circuit

Info

Publication number
JPS5994955A
JPS5994955A JP20415582A JP20415582A JPS5994955A JP S5994955 A JPS5994955 A JP S5994955A JP 20415582 A JP20415582 A JP 20415582A JP 20415582 A JP20415582 A JP 20415582A JP S5994955 A JPS5994955 A JP S5994955A
Authority
JP
Japan
Prior art keywords
signal
dial
dial signal
differential amplifier
generating means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20415582A
Other languages
Japanese (ja)
Other versions
JPH0125466B2 (en
Inventor
Tsuneaki Oka
岡 統章
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP20415582A priority Critical patent/JPS5994955A/en
Publication of JPS5994955A publication Critical patent/JPS5994955A/en
Publication of JPH0125466B2 publication Critical patent/JPH0125466B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers
    • H04M1/26Devices for calling a subscriber
    • H04M1/30Devices which can set up and transmit only one digit at a time
    • H04M1/50Devices which can set up and transmit only one digit at a time by generating or selecting currents of predetermined frequencies or combinations of frequencies

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent clipping distortion from being produced in an output signal by preventing the shift of operating point of a differential amplifier circuit due to a DC component included in a DTMF (dual tone multi-frequency) signal. CONSTITUTION:When a button key in a dial pushbutton matrix 1 is depressed, a corresponding signal (j) is outputted to a dial signal transmitting circuit 9'. The low frequency component of a dial signal (c) from a dial signal generating IC2 passes through a low pass filter 3, and passing signal (e) is inputted to a non-inverting input of the differential amplifier 4. Further, a muting signal (d) to control the receiving level at dialing is outputted from the dial signal generating IC2. This muting signal (d) is inputted to an inverting input of the differential amplifier circuit 4 via buffers 7, 8 to avoid the shift in the operating point at the differential amplifier.

Description

【発明の詳細な説明】 〔発明の技術的背景〕 この発明は、ダイヤルキーに対応したダイヤル信号を送
出するダイヤル信号送出回路の改良に関するものである
DETAILED DESCRIPTION OF THE INVENTION [Technical Background of the Invention] The present invention relates to an improvement in a dial signal sending circuit that sends a dial signal corresponding to a dial key.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来のダイヤル信号送出回路を第1図と第2図とを参照
して説明する。同図において、lはダイヤル押ボタンマ
トリックスを示す。このダイヤル押ボタンマトリックス
中のボタンキーが押されると、そのボタンキーに対応す
る信号jが出力され、ダイヤル信号送出回路9に到る。
A conventional dial signal sending circuit will be explained with reference to FIGS. 1 and 2. In the figure, l indicates a dial pushbutton matrix. When a button key in this dial pushbutton matrix is pressed, a signal j corresponding to the button key is outputted and reaches the dial signal sending circuit 9.

このダイヤル信号送出回路9内には、ダイヤル信号発弁
欲るダイ 2− ヤル信号発生IC2と、低域通過フィルタ3と、差動増
幅回路4とが含まれる。
This dial signal sending circuit 9 includes a dial signal generating IC 2 for generating a dial signal, a low pass filter 3, and a differential amplifier circuit 4.

上記の信号jがダイヤル信号発生IC2に到ると、ダイ
ヤル信号発生IC2からは、ダイヤル信号Cが出力され
る。このダイヤル信号Cは、ダイヤル信号発生IC2の
バイアス電圧vnnの172の直流レベルに信号成分が
重畳した形態となっている。このダイヤル信号Cは、低
域通過フィルタ3によってその低域成分が通過させられ
、信号eとなる。この信号eは、差動増幅回路4の一方
の入力端子である非反転入力端子に入力される。また、
反転入力端子は、接地されていて、差動増幅回路4から
は信号りが出力される。この信号りは、差動増幅回路4
に与えられているバイアス電圧voDと同じ直流レベル
に信号成分が重畳された形態となっているが、ライント
ランス5によって直流分がカットされ、有線通信線路端
子6 a * 6 b間から信号iとなって出力される
When the above signal j reaches the dial signal generation IC2, the dial signal C is outputted from the dial signal generation IC2. This dial signal C has a signal component superimposed on the 172 DC level of the bias voltage vnn of the dial signal generating IC2. This dial signal C has its low frequency components passed by a low pass filter 3, and becomes a signal e. This signal e is input to a non-inverting input terminal which is one input terminal of the differential amplifier circuit 4. Also,
The inverting input terminal is grounded, and the differential amplifier circuit 4 outputs a signal. This signal is transmitted to the differential amplifier circuit 4.
Although the signal component is superimposed on the same DC level as the bias voltage voD applied to the line transformer 5, the DC component is cut off by the line transformer 5, and the signal i and is output.

ところが、差動増幅回路4の非反転入力端子に入力され
る信号eが直流レベル′vDD/2を有し、差動増幅回
路4の動作点が移動する。このため、直線動作領域を越
えて増幅動作がなされ波形歪を生じてしまう。この波形
歪は、ダイヤル信号受信機の誤動作、誤接続の原因とな
り、波形歪の高調波成分は通信線路に許容される帯域外
信号となるので改善が求められていた。
However, the signal e input to the non-inverting input terminal of the differential amplifier circuit 4 has a DC level 'vDD/2, and the operating point of the differential amplifier circuit 4 shifts. Therefore, the amplification operation is performed beyond the linear operation region, resulting in waveform distortion. This waveform distortion causes malfunctions and incorrect connections in dial signal receivers, and harmonic components of the waveform distortion become out-of-band signals that are permissible for communication lines, so improvements have been sought.

そこで、差動増幅回路4の非反転入力端子に直流カット
用コンデンサを接続する方法が考えられる。ところが、
このコンデンサによシ直流成分が微分され波形歪が生じ
る。また、差動増幅回路4に入力される信号の直流成分
が微分されている結果、その波頭、波尾で差動増幅回路
4の動作点が大きく変動し、クリッピング歪を生じる。
Therefore, a method of connecting a DC cut capacitor to the non-inverting input terminal of the differential amplifier circuit 4 may be considered. However,
This capacitor differentiates the DC component and causes waveform distortion. Further, as a result of the DC component of the signal input to the differential amplifier circuit 4 being differentiated, the operating point of the differential amplifier circuit 4 varies greatly at the wave crest and wave tail, resulting in clipping distortion.

これに対して、直流成分の微分時間を短くすることKよ
って、波形歪を小さくできる。しかし、微分時間を短く
するといっても、ダイヤル信号の伝送特性に影尋のない
ように微分時間の値を設定する必要があり、十分な効果
をあげることができない。また、波形歪によって、ダイ
ヤル信号受信機の誤動作を生じさせないようにするため
には、ダイヤル信号の送出時間を長くする必要があシ、
通信速度の短縮の弊害となる。
On the other hand, by shortening the differentiation time of the DC component, waveform distortion can be reduced. However, even if the differential time is shortened, the value of the differential time must be set so as not to affect the transmission characteristics of the dial signal, and a sufficient effect cannot be achieved. In addition, in order to prevent malfunction of the dial signal receiver due to waveform distortion, it is necessary to increase the transmission time of the dial signal.
This has the disadvantage of reducing communication speed.

〔発明の目的〕[Purpose of the invention]

本発明は、以上述べたような従来のダイヤル信号送出回
路の欠点に鑑みなされたもので、その目的は、波形歪の
ないダイヤル信号を送出可能なダイヤル信号送出回路を
提供することである。
The present invention has been made in view of the drawbacks of the conventional dial signal transmitting circuits as described above, and an object thereof is to provide a dial signal transmitting circuit capable of transmitting dial signals without waveform distortion.

〔発明の概要〕[Summary of the invention]

そこで、本発明では、ダイヤル押ボタンキーに対応する
信号が与えられると対応するダイヤル信号を発生するダ
イヤル信号発生手段と、上記のダイヤル信号に同期しか
つ所定の直流レベルを有する直流信号を発生する直流信
号発生手段と、この直流信号発生手段から得られる直流
信号が第1の入力端子に与えられ、上記のダイヤル信号
発生手段から出力されたダイヤル信号が第2の入力端子
に与えられる差動増幅回路とによってダイヤル信号送出
回路を構成した。
Therefore, the present invention provides a dial signal generating means that generates a corresponding dial signal when a signal corresponding to a dial pushbutton key is applied, and a DC signal that is synchronized with the dial signal and has a predetermined DC level. A differential amplification system comprising a DC signal generating means, a DC signal obtained from the DC signal generating means being applied to a first input terminal, and a dial signal output from the dial signal generating means being applied to a second input terminal. A dial signal sending circuit was constructed by the circuit.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照して本発明の実施例を詳しく説明する
Embodiments of the present invention will be described in detail below with reference to the drawings.

第3図は、本発明の実施例を示すブロック図で。FIG. 3 is a block diagram showing an embodiment of the present invention.

第3図における第1図と同一の構成要素には、同一番号
を付し、その説明を省略する。また、説明にあたっては
、第4図をも参照する。第3図の9′は、ダイヤル信号
送出回路を示す。このダイヤル信号送出回路9′に、ダ
イヤル信号発生IC2と、低域通過フィルタ3と、差動
増幅回路4とが含まれ、ダイヤル信号Cが、ダイヤル信
号発生IC2から出力され、低域通過フィルタ3により
その低域が通過された信号eとなり、この信号eが差動
増幅回路4の非反転入力端子に到るようになっている構
成は、第1図の場合と同じである。
Components in FIG. 3 that are the same as those in FIG. 1 are given the same numbers, and their explanations will be omitted. Further, in the explanation, reference is also made to FIG. 4. 9' in FIG. 3 shows a dial signal sending circuit. This dial signal sending circuit 9' includes a dial signal generating IC2, a low pass filter 3, and a differential amplifier circuit 4, and the dial signal C is output from the dial signal generating IC2, and the low pass filter 3 The configuration in which the low frequency band is passed through becomes a signal e, and this signal e reaches the non-inverting input terminal of the differential amplifier circuit 4, which is the same as that shown in FIG.

上記のダイヤル信号発生IC2からは、ダイヤル時の受
話レベルを制御(例えば、ダイヤル時に受話レベルを低
下)するためのミュート信号dが出力されるようになっ
ていて、このミュート信号dはダイヤル信号に同期する
信号なので、この実施例ではこれを利用している。
The dial signal generating IC 2 described above outputs a mute signal d for controlling the reception level during dialing (for example, lowering the reception level during dialing), and this mute signal d is added to the dial signal. Since this is a synchronizing signal, this is used in this embodiment.

つまシ、ミュート信号dはバッファ(増幅器)7を介し
て信号gとされる。ここで、信号gは、ダイヤル信号C
が重畳している直流レベルVDD/2の2倍の直流レベ
ルVDDであるので、減衰器8を介してVDD/2の直
流レベルの信号fとされ、差動増幅回路4の反転入力端
子へ入力される。差動増幅回路4は、非反転入力端子か
ら入力された信号eの反転入力端子から入力された信号
fに対する差を求めて、増幅するから、差動増幅回路4
から出力される信号h′は、第4図のよう釦、直流成分
を含まないものとされる。この信号h′は、ライントラ
ンス5を介して有線通信線路端子6 a + 6 b間
から信号l′となって出力される。
The mute signal d is passed through a buffer (amplifier) 7 to become a signal g. Here, the signal g is the dial signal C
Since the DC level VDD is twice the DC level VDD/2 that is superimposed on the DC level VDD, the signal f is made into a DC level signal f of VDD/2 via the attenuator 8, and is input to the inverting input terminal of the differential amplifier circuit 4. be done. The differential amplifier circuit 4 calculates and amplifies the difference between the signal e input from the non-inverting input terminal and the signal f input from the inverting input terminal.
The signal h' output from the button does not contain a DC component as shown in FIG. This signal h' is output as a signal l' from between the wired communication line terminals 6a + 6b via the line transformer 5.

従って、この実施例では、ダイヤル信号Cが重畳してい
た直流成分の直流レベルと同上直流レベルを、ダイヤル
信号発生IC2と、バッファ7と、減衰器8とからなる
直流信号発生手段によって発生し、差動増幅回路4に与
えて、差動増幅の際に動作点の移動が生じないようにし
て、クリッピング歪を防止している。
Therefore, in this embodiment, the DC level of the DC component on which the dial signal C was superimposed and the same DC level as above are generated by the DC signal generation means consisting of the dial signal generation IC 2, the buffer 7, and the attenuator 8, This is applied to the differential amplifier circuit 4 to prevent the operating point from shifting during differential amplification, thereby preventing clipping distortion.

しかし、クリッピング歪が生じなければ良いので、直流
信号発生手段から発生される直流信号の直流レベルは、
必ずしも、ダイヤル信号が重畳している直流成分の直流
レベルと等しくなくても良い。また、直流信号発生手段
は、ダイヤル信号に同朗しかつ所定の直流レベルを有す
る直流信号を発生するものであれば、ミュート信号を使
用しなくとも、バッファや減衰器を使用しなくとも良い
のは当然である。
However, since it is fine as long as no clipping distortion occurs, the DC level of the DC signal generated from the DC signal generation means is
It does not necessarily have to be equal to the DC level of the DC component on which the dial signal is superimposed. Furthermore, as long as the DC signal generating means generates a DC signal that is the same as the dial signal and has a predetermined DC level, it is not necessary to use a mute signal or a buffer or attenuator. Of course.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、DTMF(テエ
ア・ルトーンマルチフレ、キ具エンシL)信号に含まれ
る直流成分による差動増幅回路の動作点移動が防止され
、この結果、出力信号はクリッピング歪を生じることが
ない。従って、本発明のダイヤル信号送出回路から送り
出される信号は歪がないから、ダイヤル信号受信機の誤
動作、誤接続がなく、シかも、信号の送出時間を長くす
る必要もない。
As described above, according to the present invention, the operating point of the differential amplifier circuit is prevented from shifting due to the DC component contained in the DTMF (Tea Lutone Multi-Frame, Key Encyclopedia L) signal, and as a result, the output signal does not cause clipping distortion. Therefore, since the signal sent out from the dial signal sending circuit of the present invention is free from distortion, there is no malfunction or connection error of the dial signal receiver, and there is no need to lengthen the signal sending time.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のダイヤル信号送出回路のブロック図、第
2図はその回路動作を説明するための波形図、第3図は
本発明の一実施例のブロック図、第4図はその回路動作
を説明するための波形図である。 1・・・ダイヤル押ボタンマトリックス2・・・ダイヤ
ル信号発生IC 3・・・低域通過フィルタ 4・・・差動増幅回路 5・・・ライントランス 6a +6b・・・有線通信線路端子 7・・・バッファ 8・・・減衰器 9.9′・・・ダイヤル信号送出回路 代理人 弁理士  本  1)     崇第1図  
。 第2図
Fig. 1 is a block diagram of a conventional dial signal sending circuit, Fig. 2 is a waveform diagram for explaining its circuit operation, Fig. 3 is a block diagram of an embodiment of the present invention, and Fig. 4 is its circuit operation. FIG. 2 is a waveform diagram for explaining. 1... Dial push button matrix 2... Dial signal generation IC 3... Low pass filter 4... Differential amplifier circuit 5... Line transformer 6a +6b... Wired communication line terminal 7...・Buffer 8...Attenuator 9.9'...Dial signal sending circuit agent Patent attorney Book 1) Takashi Figure 1
. Figure 2

Claims (4)

【特許請求の範囲】[Claims] (1)ダイヤル押ボタンキーに対応する信号が与えられ
ると対応するダイヤル信号を発生するダイヤル信号発生
手段と、^11記ダイヤル信号に同期しかつ所定の直流
レベルを有する直流信号を発生する直流信号発生手段と
、該直流信号発生手段から得られる直流信号が第1の入
力端子に与えら7れ・前f記ダイヤル信号発生手段から
出力されたダイヤル信号が第2の入力端子に与えられる
差動増幅囲路とからなることを特徴とするダイヤル信号
送出回路。
(1) Dial signal generating means that generates a corresponding dial signal when a signal corresponding to the dial pushbutton key is given, and a DC signal that generates a DC signal that is synchronized with the dial signal described in ^11 and has a predetermined DC level. a differential signal generating means, and a DC signal obtained from the DC signal generating means is applied to a first input terminal; and a dial signal outputted from the dial signal generating means f is applied to a second input terminal. A dial signal sending circuit comprising an amplifier circuit.
(2)ダイヤル信号発生手段は、DTMF(デュアルト
ーンマルチ7レキユエンシー)信号t−/イヤル信号と
して出力することを特徴とする特許請求の範囲第(1)
項記載のダイヤル信号送出口路。
(2) Claim (1) characterized in that the dial signal generating means outputs a DTMF (dual tone multi-seven frequency) signal as a t-/dial signal.
Dial signal output path as described in section.
(3)直流信号発生手段は、ダイヤル信号発生手段が出
力するミュート信号を電流増幅し、減衰させて直流信号
を得る回路であることを特徴とす1− る特許請求の範囲第(1)項又は第(2)項記載のダイ
ヤル信号送出回路。
(3) The DC signal generation means is a circuit that current amplifies and attenuates the mute signal output by the dial signal generation means to obtain a DC signal. Or the dial signal sending circuit described in paragraph (2).
(4)直流信号発生手段が出力する直流信号の直流レベ
ルは、ダイヤル信号が重畳している直流成分の直流レベ
ルに等しいことを特徴とする特許請求の範囲第(1)項
乃至第(3)項中のいずれかに記載のダイヤル信号送出
回路。
(4) Claims (1) to (3) characterized in that the DC level of the DC signal output by the DC signal generating means is equal to the DC level of the DC component on which the dial signal is superimposed. The dial signal sending circuit according to any one of the paragraphs.
JP20415582A 1982-11-19 1982-11-19 Dial signal transmitting circuit Granted JPS5994955A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20415582A JPS5994955A (en) 1982-11-19 1982-11-19 Dial signal transmitting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20415582A JPS5994955A (en) 1982-11-19 1982-11-19 Dial signal transmitting circuit

Publications (2)

Publication Number Publication Date
JPS5994955A true JPS5994955A (en) 1984-05-31
JPH0125466B2 JPH0125466B2 (en) 1989-05-17

Family

ID=16485739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20415582A Granted JPS5994955A (en) 1982-11-19 1982-11-19 Dial signal transmitting circuit

Country Status (1)

Country Link
JP (1) JPS5994955A (en)

Also Published As

Publication number Publication date
JPH0125466B2 (en) 1989-05-17

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