JPS5990899A - Voice synthesizer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speech synthesizer, and more particularly, to a speech synthesizer that independently analyzes waveforms of many words to extract feature parameters, and stores a set of feature parameters in a memory device. The present invention relates to a speech synthesizer that reads out characteristic parameters corresponding to a word specification and a voice request signal, and obtains a synthesized sound of a desired word based on this.

FIG. 1 is a block configuration diagram showing a general speech analysis and synthesis system, in which (10) is a speech synthesizer that is the subject of this invention, (200) is a speech analyzer, (30 is a parameter file, and (300) is the original voice voice ■
This is a device that stores characteristic parameters D of the voice obtained by analyzing and extracting the voice with a voice analyzer (200), and is, for example, a read-only memory. Note that S is a synthesized speech output from the speech synthesizer (100).

Figure 2 shows the conventional speech synthesizer (
100) is a block diagram showing the configuration of the quantization feature parameter D read from the parameter file (300).
Decoders (:110), (120), (130) that decode the pitch and voiced/unvoiced determination code, amplitude, and partial autocorrelation coefficient (so-called parameters), respectively.
), a register (Ill) that temporarily stores each decoded parameter, (121), (131), a pulse generation circuit (112) that generates a pulse train corresponding to the value of the pitch parameter that is the output of the register (111).
, a white noise generator (113) used as a sound source for unvoiced sounds
, a sound source selection circuit (114) that selects a pulse train or a white noise signal as a sound source signal in accordance with the voiced/unvoiced determination code.
), an amplitude multiplier circuit (140) that multiplies and combines the sound source signal with the contents of the amplitude value register (121), and an output signal from the amplitude multiplier circuit (140) using a filter coefficient corresponding to the contents of the K parameter register (131). A digital filter (
150), and a digital/analog (D
/A) It consists of a converter (160).

Although not shown in FIG. 1, there are also a timing signal generation circuit and a decoder (110) that control the operation timing of each of these functional circuits.

(120) and (130) are added with an interface circuit for sequentially importing time-series data obtained by speech analysis stored in an external memory, and the like to form a speech synthesizer.

Most of the speech synthesizers currently in practical use are
It has come to be integrated onto a single silicon chip. Therefore, due to restrictions on the circuit scale that can be integrated, the calculation accuracy is 14
~16 hits, the accuracy of the D/A converter is 8·-10 bits. Further, each parameter is information compressed to 50 to 100 bits per frame, and the amplitude parameter is quantized to 4 to 7 bits.

Normally, in order to obtain a practical synthesized sound with such an integrated circuit speech synthesizer, the signal-to-noise (S/N) is sufficiently high.
It is necessary to analyze the original sound with a high ratio at a predetermined level and use the amplitude parameter obtained under the optimum condition. In principle, the volume of the synthesized sound can be changed by manipulating the value of the amplitude parameter. However, since the information compression rate is increased in the integrated circuit speech synthesizer, emphasis is placed on the amplitude parameter to optimize the sound quality, and it cannot be used as a parameter for adjusting the volume.

On the other hand, in order to easily control the volume of the synthesized sound, the amplitude multiplication circuit (140) is replaced by a digital filter (150).
There is also an idea of placing it at a later stage, but in this case, if the amplitude parameter is not updated at each sampling point, modulation noise will occur, making it unusable. On the other hand, when updating values at each sampling point, interpolated values must be calculated for 50 to 200 points from successive amplitude parameters, resulting in an enormous circuit size. Because of this, it has been difficult for conventional integrated circuit speech synthesizers to vary the volume between synthesized sounds of words to be generated.

When using an integrated circuit speech synthesizer for various purposes, there are many opinions regarding the need to create volume differences for a large number of words. I was unable to respond to your request.

This invention was made in view of the above points, and it adds an attenuation rate code to the characteristic parameters obtained by analyzing the original sound, and uses the decoded output to add the required attenuation to the output of the digital filter. This provides a more practical speech synthesizer.

FIG. 3 is a block diagram showing the configuration of a speech synthesizer according to an embodiment of the present invention. The same reference numerals as in the conventional example indicate equivalent parts, and the explanation thereof will be omitted. (170) is an attenuation rate decoder that obtains an attenuation rate value by decoding the attenuation rate code stored in advance in the parameter file (300); (171)
is a decay rate register that temporarily stores its decoded value, (
180) is an attenuator that attenuates the output Y of the digital filter (150) to Y2 according to the contents of the attenuation rate register (171).

Normally, in a speech synthesizer using a partial autocorrelation analysis synthesis method, there are parameters such as pitch, voiced/unvoiced determination code, amplitude, and so on as voice parameters, but in this example, an attenuation rate code is further added as one of the parameters. do. This code is not extracted by analysis, but
A synthesized sound is created and listened to, and a decision is made based on the evaluation. For example, as a result of listening to N types of synthesized sounds, if the levels of the first and third synthesized sounds are evaluated to be higher than other synthesized sounds, then the level of the first and third synthesized sounds Determine the attenuation rate with the th and encode it. Alternatively, if it is desired to generate only a specific synthesized sound at a particularly weak level depending on the purpose of use of the synthesizer, the attenuation rate for that synthesized sound is selected to be a particularly large value and encoded.

Note that parameters such as pitch and amplitude are usually analyzed and extracted for each so-called frame period in which the audio waveform is divided into 10 to 20 m5, and then coded. However, the attenuation rate code used in this example is syllable, Make settings for each word and each sentence. From this,
The parameter information transfer density increases only slightly compared to conventional synthesizers. For example, when eight levels of numerical values are provided as the attenuation rate and an attenuation rate code is given for each syllable, the amount of information increases by less than lv.

Next, the operation of the speech synthesizer (100a) according to this embodiment will be explained in relation to the parameter data stored in the file (300) shown in FIG. In Figure 4,
ρ1. e2 is the first . The attenuation code for the i-th first leaf, A, □ is the amplitude code of the i-th frame of the j-th word, and similarly, Uj, , Tj□, Kj□ are respectively j
The voiced/unvoiced code, pitch code, and parameter code of the i-th frame of the th word. Speech synthesizer (10
0a) reads the 11th order of the above-mentioned parameter code for each frame, performs synthesis calculation, and outputs the instantaneous waveform value to the output terminal Y1 of the digital filter (150). At this time, the amplitude code can be determined to optimize the sound quality of the synthesized sound.

Here, when calculating the composite waveform of the first word, the attenuation rate code ρ1 at the beginning of the parameter data is read, and the attenuation rate decoder (1'70) postcodes it to the attenuation rate. It is stored in the rate register (171). The contents of this attenuation rate register (1't'l) are not updated until the next word is generated. Attenuator (180
) attenuates the output Y1 of the digital filter (15) according to the attenuation rate held in the attenuation rate register (171) and sends it to the D/A converter (160) as a signal Y2.At this time, the attenuation rate is a constant value. Since the output of the digital filter (150) is a significant waveform output of voiced or unvoiced sounds, there is no sudden change in level due to the attenuator.Therefore, modulation noise and abnormal sounds are not generated. Never.

When synthesizing the second word, the output of the digital filter (150) is attenuated by the attenuation rate corresponding to the attenuation rate code e2 at the beginning of the parameter data, and the first
A synthesized sound with a level different from that of the M-th leaf is obtained. In this way, it becomes possible to provide volume differences between each word, improving practical value.

A digital multiplication circuit can be considered as a specific circuit for the attenuator (18), but the multiplication circuit increases the circuit scale and has problems in terms of the cost and size of the device.
Figure (a) is a block circuit configuration diagram of the attenuator used in this example, (181) to (188) are the selection circuits that constitute the attenuator (180), and Figure 5 (b) is the details of this selection circuit. It is a logic circuit diagram. In this example, the attenuation rate code is 2 pins)
Let it be expressed as (p1+p2). In such a case, the attenuation rate decoding code # (17) in Fig. 3 is not necessarily necessary.
For the sake of clarity, the number of output bits of the digital filter (150) is assumed to be eight.

In this example, the attenuation rate is 2 pins as shown in the table below)
Four levels of numerical values are taken corresponding to the binary information indicated by (pl, p2). The attenuation rate register (1t1) reads the attenuation rate code included in the parameter data from the parameter file (3QO) through the bus D and stores it. Then, the output data (pH, p2) is sent to an attenuator (180)
are sent to each selection circuit (181) to (18B). Four inputs of each selection circuit (x,, x2.x3.X4>
are sequentially different combinations of four bits at mutually adjacent bit positions from among the eight outputs Y of the digital filter (150). However, all inputs (xxxx) of the selection circuit (181) have the above output Y1+1 2↑
31 4 high order bits (sign bits) are provided.

The sign bit of Y1 is also given to the inputs (xl, x2, x3) of the selection circuit (182), and the input
The bits behind the sign bit are given. The inputs (Xl, X2) of the selection circuit (182) are also given the sign bit of the output Y1, and the inputs (X3.
The next bit after the sign bit and the next bit are given respectively. Each selection circuit (181) to (
188) selects the input signal corresponding to the attenuation rate code (pl, p2>) and outputs it to the output Y2.

As is clear from the logic configuration in FIG. 5(b), in the case of the attenuation rate code (p1+p2) or (1,1), each selection circuit (181) to (,1L8B) uses the information of the respective input X4. or Z. That is, these output bits Z
A digital filter (156
) is output which is exactly the same as the output Y1 from Y1, and the attenuation rate is 1. Attenuation rate code (pl, p2) is (o, o)
At this time, each selection circuit (181) to (18B) outputs the information of the respective input x1 or Z.

That is, the output Y2 composed of the output hits Z is a signal obtained by shifting the output Y1 from the digital filter (1aO) by three hits lower, and the attenuation rate is l/.

Similarly, the decay rate code (pl, p2) or (011),
(110), the attenuation rates are % and -, respectively, as shown in the table above.

When the attenuation circuit shown in FIG. 5 is used in this example,
The attenuation rate is 1. Although only a step value of V2, 1414 can be taken, the above-mentioned step value is rather convenient because the human sense of volume corresponds approximately to the logarithm of the sound level. That is, in this embodiment, since the attenuation circuit can be constructed by combining a small number of gate circuits as shown in FIG. 5(b), the scale can be made considerably smaller than when multipliers are used.

As detailed above, in the speech synthesizer of the present invention, the synthesized speech output is attenuated at a desired attenuation rate for each syllable, mushroom candy, or sentence, so that more practical speech synthesis can be achieved. It is possible to realize a vessel.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a general speech analysis and synthesis system, FIG. 2 is a block diagram showing the construction of a conventional speech synthesizer, and FIG. 3 is a block diagram showing an embodiment of the present invention. FIG. 4 is a diagram showing an example of a parameter data for explaining the operation of this embodiment, FIG. 5(a) is a block circuit configuration diagram showing an example of an attenuator used in this invention, and FIG. FIG. 2 is a detailed logic circuit diagram of a selection circuit that constitutes the attenuator. In the figure, (100) is a speech synthesizer, (200) is a speech analyzer, (300) is a parameter file, and (150) is a speech analyzer.
) is a digital filter, (160) is a digital/analog converter, (1'71) is an attenuation rate register, (18
0) is an attenuator, and (181) to (18B) are selection circuits. In addition, the same symbols in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] [ll The characteristic parameters for the desired voice are sequentially read out from a parameter file storing characteristic parameters extracted by analyzing the original voice, subjected to necessary digital processing, and then processed using a digital filter and An attenuator that attenuates the output of the digital filter and an attenuation rate register that temporarily holds a constant that controls the attenuation rate of the attenuation rate in the device that outputs synthesized voice corresponding to the original voice through a digital/analog converter. A speech synthesizer, characterized in that the volume of the synthesized speech is controlled by changing the constant held in the attenuation rate register on a syllable, word, or sentence basis. (2) The attenuation rate by the attenuator is x + h l 1/
4. Claim 1, characterized in that the control is performed so that the value is a reciprocal of a power of 2, such as 'A---.
Speech synthesizer described in section. (3) Claim 1, characterized in that the attenuator is configured as a circuit element with a multi-input/l-output selection circuit that selects and outputs one of the long swords based on attenuation rate designation information. Or the speech synthesizer according to item 2.