JPS5990012A - Distance measuring device - Google Patents

Abstract

PURPOSE:To obtain accurate distance information without performing feedback control over a projecting means by increasing or decreasing the amplification degrees to two photodetection outputs by projection gradually, and latching the difference calculation output obtained by subtracting the sum of the outputs by a specific value or photodetection outputs as the distance information. CONSTITUTION:When a power source switch 2 is turned on through a shutter release button, a PUC signal is generated and the voltage V2 to one-side input terminals of multiplying circuits 26 and 27 rises. The output light of a light emitting diode 10 is projected upon a body 66 whose distance is to be measured and its reflected light is made incident to the photodetection surface 20 of a PSD19, whose output is inputted to V1 terminals of the multiplying circuits 26 and 27 and multiplied by the input V2; and an adder outputs a sum signal (VA+VB) and a subtractor outputs a difference signal (VA- VB) respectively. The voltage of a signal corresponding to the sum signal (VA+VB) of the adder is compared by a comparator 57 with the voltage of a variable resistance 58 and its output is latched by a latch circuit 55 to measure the distance. The PSD19 generates a photocurrent when light is incident to the photodetection surface 20 and a current outputted from an electrode is a function of photodetection points, so that the distance measurement is taken by the photodetection points.

Description

Detailed Description of the Invention In this paper, light is emitted from a distance measuring device, and the distance to the measured object is determined by triangulation from the angle of the reflected light of the measured object at a position away from the measured object by the length of the baseline length and the baseline length. The present invention relates to a distance measuring device that measures distance.

Conventionally, various proposals have been made for distance measuring devices using the triangulation method. For example, the light-receiving element and the light-emitting element of a distance 6+i1 fixed device are installed at a baseline length apart, and either the light-receiving element or the light-emitting element scans the subject by changing the angle from the close range direction to the infinity direction. A method is known in which the distance to the subject is measured from the angle and base line length when the light reception blur is at its maximum. When applying this distance measurement method to camera autofocus, cameras originally perform focusing by rotating the distance ring of the photographing lens, so the rotation of the distance ring of the photographic lens and the rotation of the light-receiving element or light-emitting element are necessary. An autofocus system can be realized with a simple configuration by interlocking the scanning and stopping the rotation of the distance ring of the photographic lens when the light receiving ring is in focus.

However, the above method requires mechanical scanning of the light emitting element or light receiving element, which not only complicates the configuration of the mechanical parts, but also involves the rotation of the distance ring of the photographic lens and the need for the light receiving element or light emitting element to be scanned mechanically. It is difficult to precisely match the scanning of the element for focusing, and it has the disadvantage that it must be constructed with precision mechanical parts and that adjustment is difficult.

In order to solve this drawback, a method has been proposed in which distance measurement information is obtained by providing multiple light receiving elements in the mechanically scanning location and scanning their output electrically, without mechanically scanning the light receiving elements. There is.

However, in order to improve distance measurement accuracy, this method requires an increase in the number of light receiving elements, and furthermore, the arithmetic circuit for processing the output of the light receiving elements is extremely complicated.

Therefore, the reflected light from the light emitting element is transmitted to the semiconductor device detector (hereinafter referred to as P).
Japanese Unexamined Patent Publication No. 57-44809 proposes that the incident position information of the reflected light is obtained from a difference signal between two outputs of a semiconductor device detector to obtain ranging information. In order to make the difference signal accurately correspond to the measured distance, it is necessary to reduce the influence of external light and maintain a constant power for the sum of the two outputs of PSI). Feedback control is performed so that when the output of the PSD is small, more leading edges are output from the light projecting element so that the sum signal of the two outputs is constant.

However, when the proposal of JP-A No. 57-44809 is used in a distance measuring device, a complicated circuit is required to provide feedback control to the light emitting element, and furthermore, a complicated circuit is required to provide feedback control to the light emitting means to control the light emitting element. Since the output is increased, the power consumption of the light projecting element increases.

In view of this, the present invention aims to provide a distance measuring device in which the sum signal of the two outputs of the PSD is constant regardless of the measured distance in order to obtain accurate distance information without performing feedback control on the light projecting means. It is something.

The present invention will be explained in detail below using the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram of an embodiment of the present invention.
) is a circuit diagram showing the principle of SD.

In FIGS. 1 and 2, l is a d-type battery, 2 is a power switch, 3 is a single pulse generation circuit that generates a single pulse power-up clear signal I'UC when the power switch 2 is turned on; 4 is a constant voltage generation circuit that generates a constant voltage kVc, 5 is a variable resistor that divides the constant voltage kVc, 6 is an operational amplifier, 7 is a clock generation circuit that generates a clock pulse CLOCK, and 8 is a light emitting diode to be described later. A transistor for controlling the current flowing through the f-ode 10, 9 a projecting lens that collects the light emitted from the light emitting diode 10 (to be described later) and converts it into parallel light, lo the light emitting diode, 11 a voltage dividing resistor, and 12 a resistor. , 13 is a comparator, which controls the base current of the transistor 8 so that a constant voltage is applied to the light emitting diode IO together with the resistor it. 14 is a clock pulse CLOCK.
15.16 A transistor that repeatedly turns on and off and lights up a light emitting diode intermittently when input with
is a resistor, 17 is an OR gate and a clock pulse CLOCK
and the output Q of an RS flip-flop, which will be described later, are input.

Here, transistor 8, variable resistor 11. The light emitting diode 10 and the light projecting lens 9 form a light projecting means A. 18
19 is a light-receiving lens that receives reflected light from a light projecting means from a subject 66, which will be described later; PSI) (
(Details will be described later), 120 i#iP S I) light receiving surface, and 21 a battery that applies a bias voltage to I) SD. Here, the light receiving lens 18. PSI) 1g, battery 2
1 constitutes a light receiving means B. Reference numerals 22 and 24 are low-pass filters whose cut-off frequency is lower than the modulation frequency of the light projecting means A, which provides negative feedback in the low frequency band. Reference numerals 23 and 25 denote operational amplifiers, and low-pass filters 22 and 24 lower the gain in the low frequency band to suppress the influence of external light. 2
6.27 is a multiplication circuit, 28 is a constant current power source, 29.30
is a voltage dividing resistor, 31 is a charging capacitor, 32 is a transistor, 33° and 34 are resistors, and a buffer amplifier up to 35V.

Here, multiplication circuits 26, 27, constant current source 28, resistor 29
, 30, 33, 34, charging capacitor 311, transistor 32, and buffer amplifier 35 are amplification degree variable means B. [11 degrees constitutes a gradual increase means. 36.
Reference numeral 37 denotes an analog switch that performs synchronous detection in synchronization with a signal CLOCK obtained by inverting the clock pulse CLOCK generated by the inverter 38. 41 is a capacitor that forms an integrator together with the resistor 39, 42 is a capacitor that forms an integrator together with the resistor 40, 43.44 is a buffer amplifier, and resistors 45, 46° and 47.48 are operational amplifiers 49.
Together with this, it constitutes a subtractor. 55 is a latch circuit that stores the output of the subtracter, and 56 is a capacitor that stores the output of the latch circuit. The subtracter, latch circuit 55 and capacitor 56 constitute distance information detection means E. The resistors 50, 51, 52, and 53 constitute an adder together with the operational amplifier 54, and the resistance value horse 0.53 constitutes an adder. f~+s ding%9g bird,
and the resistance value of the subtractor resistance 45, 46° 47.48 13.
■-〇+'(to +171) is set to satisfy the following equation.

A comparator 57 compares the output of the adder with the voltage obtained by dividing the constant voltage kV by the variable resistor 58, and together with the adder and the variable resistor, constitutes a sum detection means.

59 is an R8 flip-flop (hereinafter referred to as IJ, 8-1♂F), 60 is a resistor, 61 is a capacitor, 62 is a variable resistor, 63 is a charging capacitor 'r@, and the variable resistor 62 is 64 is an AND gate, and the output obtained by inverting the output of the output comparator 57 of the comparator 63 by an inverter 65 is input to the comparator that compares the divided constant voltage kVc. 66 is the object to be measured. .

Here, the above-mentioned PSD shown in FIG. 2 will be explained.

When light enters the light-receiving surface 20 of the PSD 19, a photocurrent (2) is generated, and two signal currents IatIb (+Ib=I) are output from the poles a and b to (2).

As the incident light needle increases, the photocurrent ■ also increases. If the distance between electrodes A and B of the PSD is L1%; the distance from pole a to the light receiving point is X, the light receiving surface 20 is a uniform resistor, so using the photocurrent ■ generated at the light receiving point, 'a+■ b is expressed as 'M+fja, frost output from b, flow I
(a), (2) and (b) are functions of the position of the light receiving point, and if the incident light end is constant and the photocurrent (2) is constant, the position of the light receiving point of the incident light can be known and the distance can be measured.

Still, Ia-Ib=I-21b If the difference between the currents (■a and Ib) is taken, the measurement can be made with a smaller error than when measuring one of (■a and Ib).

Next, the operation of the embodiment configured as shown in FIG. 1 will be explained.

When the power switch 2 is turned on by the first stroke of the release button (not shown) on the camera body, a PUC signal is generated from the single pulse generation circuit 3, and R, S-F'l! '5
The 9th digit is reset and '' becomes L level at the output terminal Q. Also, constant voltage generation circuit 4R' + 1 pressure k
Vc is generated, and the kVc output is divided by a voltage dividing resistor 5, and the divided voltage is outputted as a reference voltage VC by an operational amplifier 6 constituting a voltage follower. At the same time, the clock generation circuit 7 generates several 10K)
A z-yearly clock pulse CLOCK is generated.

In the case of (2) above, when the output Q of the 5-FF 59 becomes L level, the transistor 32 is turned off by the buffer amplifier 35 through the resistor 33, and the output current of the constant current power supply 28 is supplied to the capacitor 31 through the resistor 29. As charges accumulate, the voltage at one input terminal of the multiplication circuit 26.27 ■! increases after the power is turned on.

In addition, the transistor 14 is repeatedly turned on and off via the clock pulse CLOCK (or game) 17, and the output of the comparator 13 flows to the ground when the transistor 14 is on, and turns on the transistor 8 when the transistor 14 is off, so that it is connected to the light emitting diode IO. performs intermittent lighting in synchronization with the inverted clock pulse CLOCK.

The output light of the light emitting diode 10 is projected onto the distance measuring object 66 via the light projecting lens 9, and the reflected light is reflected by the light receiving lens 18.
The light then enters one point on the light receiving surface 20 of the PSDI 9. According to the above-mentioned principle, depending on the incident position, the electrode a of PSDI9,
Signal currents ■a and ■b can be obtained from b. Only the high frequency components of the respective signal currents a and Ib are selectively amplified by operational amplifiers 2.3 and 25 and low-pass filters 22.24, and the ratio of external light to the amount of light output by the light emitting diode IO is reduced.

The output is multiplied by the V of the multiplier circuit 26.27 and the input ■2 which is input to the terminal and increases proportionally with time as described above.
The output of the multiplication circuit 26, 27 increases linearly and is synchronously detected with the light emitting diode 10 according to the clock pulse CLOCK which is inverted by the analog switch 36, 37 at the next stage.

The outputs of the analog switches 36 and 37 are integrated by an integrating circuit made up of a resistor 39 and a capacitor 41, and an integrating circuit made up of a resistor 40 and a capacitor 42, respectively, and the integrated values are sent to a buffer amplifier 43.4.
6, the signal v corresponding to the PSD output current Ia, ■b
The signals a and vb are outputted to an adder made up of resistors 45 to 48 and an operational amplifier 49, and a subtracter made up of resistors 50 to 53 and an operational amplifier 54.

The adder outputs a signal corresponding to the sum signal (VA+VB), and the subtracter outputs a signal corresponding to the difference signal (V, -VB). The level of the signal corresponding to the sum signal (VA+VB) of the adder increases in proportion to the rise in the voltage of the capacitor 31, and is compared with the voltage of the variable resistor 58 by the comparator 57. When the signal level becomes higher, the comparator 57 is inverted from L level to 1 level, and ft 8-F l" 59 is set. Therefore, the output Q of Its-FF 59 becomes H level, and is After a predetermined time, the outputs of the buffer amplifier 35 and the OR game 17 are inverted to H level, the transistors 14 and 32 are turned on, the charge in the capacitor 31 is discharged, the transistor 8 is turned off, and the light emitting diode 10 is turned off.

q Also, by setting R8-FF, the output Q is inverted to 11 and △bell, and the latch circuit 55 latches the output of the subtracter consisting of resistors 45 to 48 and operational amplifier 49 at that point. It is stored in capacitor A56. Therefore, the latch output is the sum signal (VA+V
When the signal level corresponding to B) reaches a predetermined value, a difference signal (VA-VB) is generated, and distance measurement can be performed according to the above-described principle. We will now discuss how to display distance using this method. In this case, since the reflected light from the object to be measured 66 is weak, the output of the operational amplifier 54 is transmitted to the multiplication circuit 26.
Despite the rise in the input V of 27, it does not rise sufficiently, so the output of the comparator 57 is not inverted, and )t8-FF
The output of 59 remains at L level and charging of capacitor 31 continues.

Since the voltage of the capacitor 31 does not exceed the divided voltage of the voltage dividing resistor 29.30, when the voltage of the capacitor 31 rises to the divided voltage level, the input V of the multiplication circuit 26.27 is applied. At this time comparator 63
) - (inverts to level) Since it is a level, it outputs a signal that is inverted to I (level and the object to be measured is at infinity).

Note that the voltage dividing ratio of the voltage dividing resistor 29.30 in this embodiment is set by the maximum rated power of the light emitting diode IO and the maximum output voltage of the Balanoa amplifier 43.44.

- Also, the input level V of the inverting input terminal of the comparator 57
The variable resistor 63 that determines Ill is determined by considering the hyperfocal distance of the camera to which the present invention is applied, the reflectance of the subject, the gain of each amplifier shown in FIG. 1, the sensitivity of the SPD, etc. When the target ω is within the hyperfocal distance range
The output of the comparator 57 is set so as not to be inverted with respect to the object to be measured.

In this embodiment, a PSI of 1.9 is used as the light receiving element, but it is also possible to use two light receiving elements instead. FIG. 3 shows an embodiment in which an SPC is used instead of a PSI as a light receiving element.

In FIG. 3, elements that operate in the same way as in FIG. 1 are given the same numbers, and their explanations are omitted. Note that 18.18' is 8
This is a light receiving lens that collects reflected light on the PC.

In Figure 3, 101 and 104 are light receiving elements SPC
,102,105,' 112.114 is an operational amplifier, 111.113 is a non-inverting terminal input resistance of operational amplifiers 112 and 114, 115.1
17 is FET1 that controls operational amplifiers 112 and 114
t3Q is a transistor that controls the gradual application of the difference signal V input - VB, 131.137 is a constant current power supply, 1
34 is a difference signal VA-VB woratu f-t Ruco 7 capacitor, 135 and 136 are transistors forming a known current mirror circuit, 138 is a covalent resistor that compares the reference voltage set by a variable resistor 156 and the potential of the capacitor 1340; 139 is an A N I) gate, 140 counts human pulses from the input terminal IN, and outputs a binary signal.
A binary counter 141 outputs a code, converts the binary code into a decimal code, and converts the binary code into a decimal code, which will be described later.
A decoder for emitting gD; 142 is a current limiting resistor for driving a light emitting diode; 143 to 149 are light emitting diodes for indicating distance information; 150 is a decoder having an inverted output and a non-inverted output; (, S flip-flop. Also, A in Fig. 2.

B, C, l), 14 represent the same means as in the first embodiment.

Next, the operation of the second embodiment configured as above will be explained.

When the switch 2 is closed from the first stroke of the release button on the camera body, the puc signal is generated from the single pulse generation circuit 3, the RS-1"F 150 is reset, the output Q becomes L level, and Q becomes H level. Further, the voltage kVc is generated from the constant voltage circuit 4, and the voltage kVc
The output is divided by a voltage dividing resistor 5, and the divided voltage is applied to the reference Ichikawa V from an operational amplifier 6 that constitutes a voltage follower.
Output as c. From the clock generation circuit 5, the number 10
Clock pulse CLOCK75 (generated in KHz unit) +t, S -FF 150 by the PUG signal
The output Q of transistor 3 becomes H level.
2 is turned off, and the capacitor 31 is charged by the output current of the constant current power supply 28. It will be done. Therefore FET116.1
The gate voltage of 18 is gradually decreasing from the Vc level @
, F'gT i i 6° 118 gradually increases, the amount of feedback of the operational amplifiers 112, 114 gradually decreases, and the gains of the operational amplifiers 112, 114 increase. I is also 5-FF59 output Q is I
Since it is at the J level, only the clock pulse CLOCK passes through the OR gate and turns the transistor 14 on and off, so the output of the comparator 13 flows alternately to the base of the transistor 80 and the collector of the transistor 14, and the light emitting diode 10 receives the inverted clock pulse CL (J CK Performs intermittent lighting in synchronization with.

The output light of the light emitting diode IO is projected onto the object to be measured 66 via the light projecting lens 18, and the reflected light is transmitted through the light receiving lens 18.18 to the two 5PCIOI, 104, 10.
1,104. Depending on the incident position, two S
An output current corresponding to the distance is obtained from the PC, and the output current is frequency-selectively amplified by the feedback action of the low-pass filter 22, 24- and the operational amplifier 102, 105, and the proportion of the component of external light emitted by the light-emitting diode is amplified. It is reduced by the analog switch 36.37 at the next stage,
Inverted clock pulse CLOC by inverter 38
It is detected and held in synchronization with the light emission of the light emitting diode IO according to K. Analog switch: 36.37 with an integrating circuit formed by a resistor 39 and a capacitor 41, and an integrating circuit formed by a resistor 40 and a capacitor 42.
The outputs of are integrated and further connected to resistors 11.5 and 11.
The gain at the operational amplifiers 114 and 112 through 7 is as described above.
．． The rate of feedback of the operational amplifiers 116, 118 due to
In this embodiment, a subtracter composed of resistors 45 to 48, an operational amplifier 49, resistors 50 to 53, and an operational amplifier 5
49°s operational amplifier.
4 (7) Output 1d, 'ch deviation (VA-VD)
The voltage corresponds to -(VA+VB)K.

The level of the signal corresponding to the output of the operational amplifier 54 = (V&+VB) decreases as the internal impedance of the FE't'' 116 and 118 increases, and
The reference voltage Vc is compared with the voltage level set by the variable resistor 58, and the level of the signal corresponding to the output of the operational amplifier 54 -(Vi+Vu) decreases to be lower than the voltage of the variable resistor 58.

<The output level of the naruto comparator 57 is L level, so II level B S -17' F 150 is set. Therefore, the inverted output Q of the tts-FF 150 is inverted to L level, the transistor 32 is turned on, and the capacitor 3
The charge of 1 is discharged, the internal impedance of FET 116, 118 decreases, and the output of operational amplifier 115, 117 decreases.

By setting LS-FF150, its output Q becomes I.
(When the level is reversed, the transistor 151 is turned on, and the transistor 139, which had been turned on by the output current of the constant current power supply 131, is turned off.) A signal corresponding to (VA = VB) at that time is stored in the capacitor 134. At the same time, due to the inversion of the output Q from the H level to the L level, the transistor 152 is turned off, and the mirror circuit constituted by the L transistors 135 and 136 is activated, so that the capacitor 134
The stored charge is gradually discharged at a constant rate of 1°5 through the transistor 135 by the output current of the constant current power supply 137.

As the Q output of the Its-FF 150 is inverted to the L level, the reset terminal H changes from the H level to the L level and the binary counter 140, which had been cleared, starts operating. At the initial stage of the discharging operation of the capacitor 134, the output tri of the comparator 138 is
H rehe # K remains, so and gate 13
9 outputs a signal synchronized with the clock pulse, and a binary counter 140 counts the signal synchronized with the clock pulse. The constant current discharge of the capacitor 134 progresses and the voltage of the capacitor 134 decreases to the reference voltage Vc.
When the voltage becomes lower than the divided voltage level by the variable resistor 160, the output of the comparator 138 is inverted to the L level, the output of the AND gate 139 becomes the L level, and the binary counter 140 stops counting. capacitor 13
4 charging type, the load is (V input - VB) when the signal voltage corresponding to - (V to VB) becomes equal to the voltage obtained by dividing the pre-hypothesized reference voltage Vc by a variable resistor. Since the discharge is a constant current, current discharge, the time for the comparator 138 to switch from the H level to the L level corresponds to the measurement distance.5.
If the 8 PCs 101 and 104 are arranged so that the amount of light incident on the PC 101 is greater than the amount of light incident on the 5 PC 104, for example, if the object to be measured is located at a long distance (((11), the level of SPC will be high, and it will correspond to (VAVB)). The level of the signal becomes high, and the capacitor 134 is charged.
As the load increases, the number of counts on the binary counter 140 also increases. The binary code output by the binary counter 140 is converted into a decimal code by the decoder 141, and the zone corresponding to the subject distance is output (y1).
It is controlled so that a single stream of liquid flows through the diode.

Note that means A and J3 in the embodiments of the present invention. C, D.

Of course, E is not limited to the configuration of the embodiment, and can be easily realized using other electronic circuits. Further, although the width increasing degree B is a means for gradually increasing by 1J degrees in this embodiment, it may be a means for decreasing the degree of increasing.

As explained above, according to the present invention, the amplification that gradually increases or decreases the amplification degree of the amplification circuit that amplifies the output of the light receiving means reaches a predetermined value of the sum of the two outputs of the variable means and the light receiving means. A sum detecting means for detecting the difference between the two outputs, a calculating means for calculating the difference between the two outputs, and a latch means for latching the output of the difference calculating means or one output of the light receiving means at the time of detection by the sum detecting means as distance information. Therefore, in order to amplify the sum of the outputs of the light receiving means to a predetermined value, the circuit can be simplified without constructing a feedback control system, making it suitable for small cameras, which is highly effective. .

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of an embodiment of the present invention, and Fig. 2 is a circuit diagram of an embodiment of the present invention.
FIG. 3 is a circuit diagram showing the operating principle of I), and FIG. 3 is a circuit diagram of another embodiment of the present invention. WJ...Power supply battery, 2...Power switch, $...Clock generation circuit, lO...Light emitting diode, 101゜104...Light receiving element, 58...Comparator, 59
···flip flop. Patent applicant Canon Co., Ltd.

Claims (1)

[Scope of Claims] (1) A light projecting means for projecting light onto a subject; a light receiving means for outputting two signals according to the incident angle of the reflected light from the subject;
Calculate the sum of the output of the light receiving means amplified by the amplification circuit for amplifying the output of the light receiving means, the amplification means for varying the degree of amplification of the amplification circuit, and the amplification circuit 1. , a sum detecting means for detecting that the sum has reached a predetermined value, and one output of the amplifying circuit or the output of the light receiving means amplified by the amplifying circuit 113 at the time of detection by the sum detecting means. Calculate the difference between
A distance measuring device comprising distance information detection means for processing the output difference and generating distance information. (2) Distance measurement characterized in that the distance measuring device according to claim (1) is provided with a control means for cutting off the output of the light projecting means at the time when distance information is generated or a little later. (3) In the distance measuring device according to claim (1), the IJ increase variable means may include a limit means for limiting the output of the amplifying circuit so that it does not exceed an upper limit value. A distinctive distance measuring device.