JPS5985505A - Programable controller having state pattern comparing function - Google Patents

Abstract

PURPOSE:To simplify a fault processing system by storing a state pattern in an auxiliary memory when the state pattern is coincident with a set pattern and replacing the data. CONSTITUTION:It is always monitored to decide whether the data on the input/ output state of an input/output memory 7 is coincident with the state pattern of some input/output data which are set and registered previously. When this coincidence is detected, the pattern number is displayed to a program console 8. At the same time, the data on the number is stored in an auxiliary memory of a working memory 3. For the display of the console 8, each digit of a display device 8B is set opposite to each input/output data, and either ON or OFF ternary state is displayed at the digit position. Then the contents are read out of the auxiliary memory after a user instruction, i.e. a fault processing instruction is read out. Then the processing, e.g. an output of alarm, the discontinuation of program, etc. is carried out in accordance with the contents of the auxiliary memory.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Field of the Invention This invention is based on the following features represented by a relay ladder diagram. In particular, regarding programmable controllers with
Knee 11 Changes in input/output h data during program execution are captured as a state pattern, and when they match a specific state pattern, this is displayed, and the identification data of that pattern is used as the calculation target of the co-za instruction. related to what was done.

(2) Prior art and its problems Many recent programmable controllers express a sequence circuit diagram represented by a relay ladder diagram in a predetermined programming language, and repeatedly execute the knee 11 program at high speed (scanning). It is supposed to be done.

When actually using this type of programmable controller, it is necessary to check the progress of sequence control, or to know that an abnormal state has occurred that would not occur under normal sequence control. For the purpose of knowing the sequence control status when a problem occurs, a predetermined display is displayed at key points in the sequence control, and appropriate abnormality processing such as issuing an alarm can be performed in response to the displayed content. well done. Conventional 11
] In Grammapul Controller 1 to Roller, in order to display the progress status of the above-mentioned sequence control and handle the corresponding abnormality, the specified display circuit and abnormality processing circuit such as alarm output ( A relay ladder circuit) was incorporated. However, with this method, there is a problem in that as the number of display circuits and abnormality processing circuits that occupy a large portion of the user program increases, the user program area that can actually be effectively used decreases. In addition, when the input/output data related to the display circuit etc. increases, the logic ffIa1% between them can be accurately recognized and the desired value can be calculated.
Configuring the display circuit and the like is very troublesome and can only be done by a person who is familiar with programmable controllers and systems to be controlled. Furthermore, if a large number of output relays are used for the display circuit or abnormality processing circuit, there is a problem that the number of output relays that can be used for the original control purpose decreases.

(3) Purpose of the Invention The purpose of the present invention is to capture the progress state of sequence control as a pattern of input/output data, set a plurality of state patterns separately from the user 10 grams, and make sure that the state pattern during actual control is An object of the present invention is to provide a programmable controller that displays an identification number of a set state pattern when the pattern matches the set state pattern, and uses the data of the identification number as a calculation target of a user command.

(4) Structure and Effects of the Invention In order to achieve the above object, this invention sets a plurality of arbitrary state patterns expressed in three values of on, off, or either for all input/output data. means for storing it, means for comparing whether the state of the actual manned saw data matches any of the stored state patterns in parallel with the execution of the user program, and a match detected by the comparing means. means for displaying the identification number of the matched state pattern, and when a τ match is detected by the comparison means, the data of the identification number of the matched state pattern is accessed arbitrarily by a user command. The present invention is characterized in that a data updating means for storing data in an auxiliary memory that can be used as a target of the calculation process 1ψ is installed.

In a programmable controller equipped with the status pattern comparison function configured as described in 1-1, a display circuit for displaying the progress status of sequence control and an abnormality processing circuit for alarm output etc. are incorporated into the user program. If you arbitrarily set multiple input/output data patterns that indicate specific control states separately from the user program, 1,111111
When the status matches the set pattern, the identification number of that pattern is displayed, and the identification number? Since l@ is stored in the auxiliary memory so that it can be accessed by user commands, in the Knee 1 AB 11 Gram, it is possible to easily perform predetermined abnormality processing by simply programming this data to be subject to arithmetic processing. I can do it.

Therefore, the user program is not unnecessarily redundant for status display and status output, that is, status monitoring, and the limited user program capacity can be effectively utilized for substantial sequence control. Furthermore, since the status monitoring is completely separated from the user programmer 18, there is no possibility of mistakes such as accidentally destroying the logic of the knee IF program when changing the status @monitoring machine OL.

In addition, even if there is a large number of input/output data and the logical relationship between them is complex, it is simply treated as a static pattern of input/output data, so necessary status monitoring can be performed. Registration of settings is also very easy and easy to understand.

(5) Description of Embodiments FIG. 1 is a block diagram showing the overall schematic structure of a programmable controller to which the present invention is applied. This programmable controller has a CPU 1 (central processing unit) that is the center of overall control, a system program memory 2 that stores a system program executed by the CPU 1, and various variable programs in Cr' U 1. A working memory 3 used as a temporary storage area for data, a working memory 4 for display, a cooperative program memory 5 in which a sequence control program arbitrarily set by the user is stored, and an external input signal An input/output device 6 (collective term for input device and output device) including an input interface [-] to which is given and an output interface that sends out external output signals, and a buffer for input/output data corresponding to the input/output device 6. Memory roaring input/output memory 7 and C
It is provided with a program console 8 on which various operation commands are given to the PtJ 1, user program creation inputs, monitor commands inputted, and displays at the time of input, monitor displays, etc. are provided.

[The input/output device 6 is divided into an incoming unit and an outgoing unit, and each unit is divided into units, and each unit 1 to 8
1, with point-by-point input or output terminals;
Reference numeral 9 in the figure indicates a terminal plate for each of the input/output devices 6. The numbers added to each terminal board 9 indicate input/output numbers. In other words, the input/output device 5 in this embodiment is composed of eight input/output units, and the total size is 8×8.
=64 input/output signals can be handled, and each input/output signal (input/output terminal) is assigned an input/output number from 1 to 67I.

The program console 8 is equipped with a keyboard 8△ including a command code key and other function keys, and a dot-mark type display 8B for displaying command codes, addresses, error messages, etc. in characters. ing.

Further, as shown in FIG. 2, the working memory 3 includes a paralysis rear 3A, an area 3B where the current 1 "1" of the timer command is stored, and an area 3c where the current value of the counter command is stored. The input/output memory 7 is divided into an area 3D where the data of the auxiliary output (internal relay) is stored.The input/output memory 7 is divided into an area 3D where the data of the auxiliary output (internal relay) is stored. It has a rear and an L
In the HR rear 3D, each auxiliary output data 65 to 112 is stored following the address of the FII data (64) of the people output data stored in the input/output memory 7, and e1. ．． A 4-bit area from 09 to 112 is used as an auxiliary memory according to the present invention.

As is well known, the execution operation of the user program in the programmable controller of this scale is to sequentially read out the Coza commands from the Cozab[]gram memory 5 and store them in the input/output memory 7 in accordance with each ``instruction''. The purpose of this process is to carry out calculation processing between the input and output data currently being processed, and to update specified output data according to the object of the calculation process.
The input/output data given to the input/output memory 7 is written to a predetermined area of the input/output memory 7 (input update), and the output data of the predetermined area of the input/output memory 7 is transferred to the input/output device 6 (output update). In the relationship between the external input signal applied to the input/output device 6 and the external output signal outputted from the input/output device 6, a sequence state specified by the 1-program is created. The input/output device 6 is subject to calculation processing in this user program.
It is well known that the data includes not only the input/output data of , but also data related to the timer command, counter command, and auxiliary output described above.

In the programmable controllers 1 to 1 according to the present invention, in addition to the above-mentioned user program execution function, the input/output state data of the input/output memory 7 can be set and registered in advance to perform several input/output data states. It constantly monitors whether or not it matches a pattern, and if it matches, it has the function of displaying the number of the pattern on the program console 8 and the function of storing the data of that number in the auxiliary memory of the area 3D. .

As shown in FIG. 3, the cooperative program memory 5 includes a J rear 5A where user command sequences are stored, an area 5B where setting values of timer commands are stored, and an area 5C where setting values of counter commands are stored. An area of a pattern memory 5D related to the gist of the present invention is set at the bottom. The pattern memory 5D has pattern numbers 1-J associated with patterns 0-9 in each area from the area of 10 patterns indicated by reference numerals 50-59. Pattern memo 1 for 1 pattern 1 artificial 97' is also an off pattern area]
It is divided into two parts: one rear and one rear. The off-pattern area and the off-pattern area each have a capacity of 611 bits in one-to-one correspondence with the attendance memory 7. In other words, the area for one pattern is 6/lX2=12
It has a capacity of 8 pits.

In the programmable controller of this invention, all input/output data of 64 pins can be turned on, off or on.
It's okay 3! Set 10 arbitrary state patterns expressed by Iri in the -1- pattern memory 5D (
) can be memorized. To set one pattern, for example, if input/output number 1 is registered as on, set the M@1 bit in the off pattern area to 1''.Also, if input/output number 2 is set to off and recorded as 0, Set bit number 2 of off pattern area to 110 I+
Make it.

Also, for input/output number 3, either U on or off is fine.
When setting and registering, set both the number @3 of the off-pattern area and the number 3 of the on-pattern area to 0°'. In this way, 41 unique state patterns can be set for 6/1 bits.

Figure 4 shows the system executed by CP LJ 1,
An overview of the program is shown below.

First step below: Initial processing 100.Explanation according to this flowchart. Display processing 101 is executed, and then the mode key of the program console 8 is read (step 102>, and it is determined whether it is in the program execution mode (step 1o3).
Reads the key input and performs processing according to -1-manpower (steps 104 and 105>. When the clear key is input, predetermined clearing processing is performed and the clear state display pattern is stored in the register. Step 106, 10
9°110>, the process returns to display processing 101. [: When a mode other than 1 gram execution mode is set and the putter 22 insert key is pressed, pattern insert processing is executed (
Steps 107, 108).

A specific example of the pattern writing process 10B is shown in the flowchart of FIG. In short, pattern memory processing involves operating the keyboard 8A of the single-grain console 8, specifying the pattern number to be set, and setting each 64-bit input in accordance with that pattern number. It takes human effort to specify whether to register the output data as on, register it as off, or set it as either on or off.
This is a process of creating an on pattern and an off pattern as described above in areas 50 to 59 of the corresponding pattern number in the pattern memory 51'. In order to facilitate this process, the A-on-off pattern that is being operated is displayed on the display 8B of the program console 8.

As an example of this display, each digit of the display 8B corresponds to each 64-bit input/output data, and a three-value state of on, off, or any of the following is displayed at that digit position.

Next, the execution mode of the user program will be explained with reference to FIG. When the mode key is set to the program execution mode, the process for displaying the execution mode on the 1 display 813 proceeds to step 4 (step 111) and the program execution process from step 112 onwards. First, the above-mentioned input update is performed (step 112), and then the program counter PC for addressing the knee program memory 5 is cleared (step 113).
First, display processing is performed (step 114), and then the 1-the instruction to be addressed by the program counter PC is read from the memory 5 (step 115).
It is determined whether the instruction is the last END instruction of the coser program (Step 116), and if it is not an END instruction, the instruction is executed (Step 117).
8 increments the counter ρC (step 11B), returns to step 114, reads and executes the next command in the same manner as above.
Ru.

If the user program is executed after #I, step 1
Step 16 to step 119 reads the input from the keyboard 8, and performs processing according to the human power of the key A (step 12).
0), if the clear key is also not operated, the process goes through steps 121 and 122 to step 12.
The process advances to step 6 to update the output, and executes again from step 112.

When clear 1-1 is pressed, processing to clear the display is performed along with a predetermined clearing process (step 12).
4, 125), and then proceeds to step 126. When the pattern processing key is turned on, the pattern comparison processing (step 123), which is the main part of the present invention, is executed, and then the output is updated in step 126, and step 1 is executed again.
12] Proceed to execution processing of Durham.

As is clear from FIG. 4, while the pattern processing key is turned on, the pattern comparison process 123 is executed in parallel with the execution of the Cozap 1 gram every time it is executed. This pattern comparison process 123 compares whether the i state of the 64-bit input/output data of the input/output memory 7 matches any of the state patterns stored in the pattern memory 5D, and also performs the comparison process. When a match is detected, the pattern number of the matched state pattern is displayed on the display 8B, and the bits 109 to 112 of the auxiliary memory corresponding to the identification number are preset. This is what we do.

The details of the above pattern comparison process are explained in the flowchart t- in FIG.
, h. To explain according to FIG. 6, first, set the pattern number to O (step 300), read the off pattern in the pattern memory corresponding to that pattern number (steps 301 and 302), and all of the 64 bits 1 of the off pattern are read. Step 3 to determine whether it is O++ or not
03), if all are O11, then read the on pattern with the same 1 double pattern 1 number (steps 301, 305).
>, - all 64 bits of on pattern are ll O1
It is determined whether or not it is 1 (step 306). The reason why all the on patterns are 11011 is because 14 is not set for that pattern number, and the pattern number is changed to the next 41.
Step 316), the pattern number is 10.
Step 3.17>
, if tiJ has not reached the end, the above processing from step 301 onward is performed for the next pattern.

If some state pattern is set in the pattern memory of a certain pattern number, the process advances to step 307. In that case, the OFF pattern of the pattern memory with the corresponding pattern number is read (steps 307 and 30fl) and compared with the data in the input/output memory 7 (step 309). This comparison is performed by logically multiplying the 64-bit data of the off pattern in the pattern memory and the 64-bit data of the input/output memory 7 by 1 pit] for each number. And 6/I bit and 1 of 64 bit
Pi-I-Zuzuno Theory]! It is determined in the next step 310 whether or not the p-product results are all 0''. If all of the results are II Oll, the off pattern matches, and if there is even one 1'', the off pattern is determined. This means that the patterns do not match.

If they do not match, the process advances to step 316.

If they match, the process proceeds to step 311 and subsequent steps, and it is then determined whether or not the on pattern matches. In other words, read the on pattern of the corresponding number (step 311
．． 312>, the logic between each bit of the on pattern and the complement (inverted logic) of the data in the input/output memory 7 I! 1′! Comparison of patterns is performed by taking the numbers one bit at a time (step 313). The result of this logical product is 1q, which is 6.
Step 3: Determine whether all 4 bits are “0” or not.
1/l).

If all are not ``0'', the patterns do not match, and if ``A'', the process advances to step 316. The reason why all the jq and lζ results are 110 II is because the patterns match. In that case, in the next step 315, the pattern number is preset in the display register and the auxiliary memory (109 to 112) is preset. This pattern? Preset lq. The reason why the auxiliary memory is 4 bits is because there are 10 types of state patterns in this embodiment, which can be expressed by warming each of the pitches 109 to 112.

As a result, in the display process of step 114 in FIG. 4, the pattern number of the matching state pattern is displayed on the display 8B. When a user command such as an abnormal processing command is read in the next step 115, the contents of the auxiliary memory (109 to 112) are read out, and the contents (4) are read in the next step 117 after step 11G.
(logical product of bits), appropriate processing such as issuing an alarm or stopping the program is performed. This step 1
Seventeen specific examples are shown in FIG.

FIG. 7 is a ladder circuit diagram showing a program when an abnormality processing instruction is executed. Each pin 1- of the auxiliary memory is sequentially numbered 1, 2, starting from 100. The illustrated example shows a case where the output relay 12 is turned on when the pattern number is 5''.

If the input/output data of the input/output memory 7 does not match all of the set state patterns, the process proceeds from step 317 to 318, where a display indicating that the patterns do not match is performed, and the next step 31 is to store the auxiliary memory (109 to 318). 112)
Processing is performed in which all bits of 11011 are set.

In addition, -1! When an l1r match is detected, the displayed pattern number J3 and the contents of the auxiliary memory (109-112) are held as they are until the next match is detected.

Note that in the above embodiment, the pattern number is converted into a "-" code and stored in the auxiliary memory, but the present invention is not limited to this, and each bit of the auxiliary memory is converted into a pattern number and 1.
Corresponds to 1 to 1! Of course, it is okay to do so. In this case, the output relay will be driven in correspondence with pattern number 1 to 1.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a programmable controller to which the present invention is applied, FIG. 2 is a memory map of the RAM area in the controller, FIG. 3 is a memory map of the user program memory in the controller, and FIG. Figures 5 and 6 are flowcharts showing the structure of the system program executed by CP() in the above controller, and Figure 7 shows an example of incorporating the pattern number stored in the auxiliary memory into the user program in relay ladder diagram form. It is a figure shown by. 1... CPU 5... User program memory 6...
Input/output device 7...Input/output memory 8...Program 11 Console 3D...Auxiliary memory 5D...Pattern memory special W [Applicant Tateishi Electric Co., Ltd. Fig. 1 Fig. 7 Figure 2

Claims (1)

[Claims] (1) Scanning type programmable control []-
A for all input/output data. means for setting and storing a plurality of arbitrary state patterns expressed in three values of A-F or either;
] - means for comparing whether the state of the actual input/output data matches any of the state patterns stored in in parallel with the execution of the program; and when a match is detected by the comparing means; Identification of that matched state pattern? When a match is detected by the means for displaying l@ and the comparing means, the data of identification number 11 of the matching 1 status pattern is arbitrarily accessed by a user command and used as a target for calculation processing. A programmable controller with a state pattern comparison function, characterized in that the programmable controller is provided with means for updating data stored in available auxiliary memory.