JPS598288U - Gate circuit of parallel connected thyristors - Google Patents
Gate circuit of parallel connected thyristorsInfo
- Publication number
- JPS598288U JPS598288U JP9898282U JP9898282U JPS598288U JP S598288 U JPS598288 U JP S598288U JP 9898282 U JP9898282 U JP 9898282U JP 9898282 U JP9898282 U JP 9898282U JP S598288 U JPS598288 U JP S598288U
- Authority
- JP
- Japan
- Prior art keywords
- gate circuit
- gate
- thyristors
- parallel connected
- connected thyristors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例を示す回路図、第２図は第１
図のゲート電流波形図、第３図はサイリスクのフィンガ
電圧を説明するための特性図、第４図は本考案の他の実
施例を示す要部回路図である。
１．２・・・サイリスタ、３．４・・・ゲート、３Ａ。
４Ａ・・・定電流ゲート回路、３Ｂ、 ４Ｂ・・・パ
ルス電流ゲート回路。Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
FIG. 3 is a characteristic diagram for explaining the finger voltage of Cyrisk, and FIG. 4 is a main circuit diagram showing another embodiment of the present invention. 1.2... Thyristor, 3.4... Gate, 3A. 4A...constant current gate circuit, 3B, 4B...pulse current gate circuit.
Claims (1)
同時にオン・オフ制御するゲート回路において、各サイ
リスタに夫々一定レベルのゲート電流又は電圧を供給す
る第１のゲート回路と、こ−の第１のゲート回路の出力
に重畳したパルス状ゲート電流又は電圧を出力する第２
のゲート回路とを備え、上記サイリスタのフィンガ電圧
の不揃いを補償することを特徴とする並列接続サイリス
タのゲート回路。In a gate circuit that simultaneously controls on/off a plurality of thyristors connected in parallel as one switch, a first gate circuit that supplies each thyristor with a gate current or voltage at a constant level, and the first gate circuit. A second gate that outputs a pulsed gate current or voltage superimposed on the output of
A gate circuit for parallel-connected thyristors, comprising a gate circuit for compensating for unevenness in finger voltages of the thyristors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9898282U JPS598288U (en) | 1982-06-30 | 1982-06-30 | Gate circuit of parallel connected thyristors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9898282U JPS598288U (en) | 1982-06-30 | 1982-06-30 | Gate circuit of parallel connected thyristors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS598288U true JPS598288U (en) | 1984-01-19 |
Family
ID=30234762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9898282U Pending JPS598288U (en) | 1982-06-30 | 1982-06-30 | Gate circuit of parallel connected thyristors |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS598288U (en) |
-
1982
- 1982-06-30 JP JP9898282U patent/JPS598288U/en active Pending
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