JPS5978742U - FM receiver - Google Patents

FM receiver

Info

Publication number
JPS5978742U
JPS5978742U JP17430782U JP17430782U JPS5978742U JP S5978742 U JPS5978742 U JP S5978742U JP 17430782 U JP17430782 U JP 17430782U JP 17430782 U JP17430782 U JP 17430782U JP S5978742 U JPS5978742 U JP S5978742U
Authority
JP
Japan
Prior art keywords
minimum value
detection means
voltage
component
control voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17430782U
Other languages
Japanese (ja)
Other versions
JPS6314508Y2 (en
Inventor
雅人 山口
正治 阪本
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP17430782U priority Critical patent/JPS5978742U/en
Publication of JPS5978742U publication Critical patent/JPS5978742U/en
Application granted granted Critical
Publication of JPS6314508Y2 publication Critical patent/JPS6314508Y2/ja
Granted legal-status Critical Current

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  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示すブロック図、第2図は本考案の一
実施例を示すブロック図、第3図及び第4図は第2図の
実施例の動作を説明するための波形図である。
Fig. 1 is a block diagram showing a conventional example, Fig. 2 is a block diagram showing an embodiment of the present invention, and Figs. 3 and 4 are waveform diagrams for explaining the operation of the embodiment of Fig. 2. be.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アンテナとフロントエンドの間に設けられ、印加される
制御電圧により同調周波数が可変でき、アンテナからの
入力信号中の前記同調周波数の成分をトラップするトラ
ップ回路と、このトラップ回路の同調周波数を所定範囲
でスイープする前記制御電圧を発生するスイープ電圧発
生手段と、前記フロントエンドの出力信号中のAM成分
を検出するAM検波手段と、このAM検波手段により検
出したAM成分のレベルの最小値を検出する最小値検出
手段と、この最小値検出手段による最小値の検出に前記
スイープ電圧発生手段が発生している電圧と等しい値の
電圧を前記トラップ回路に前記制御電圧として印加する
手段とを備えることを特徴とするFM受信装置。
A trap circuit is provided between the antenna and the front end, and the tuning frequency can be varied by the applied control voltage, and traps the component of the tuning frequency in the input signal from the antenna. a sweep voltage generating means for generating the control voltage swept by the front end; an AM detection means for detecting an AM component in the output signal of the front end; and a minimum value of the level of the AM component detected by the AM detection means. A minimum value detection means, and means for applying a voltage equal to the voltage generated by the sweep voltage generation means to the trap circuit as the control voltage when the minimum value detection means detects the minimum value. Features of FM receiving device.
JP17430782U 1982-11-19 1982-11-19 FM receiver Granted JPS5978742U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17430782U JPS5978742U (en) 1982-11-19 1982-11-19 FM receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17430782U JPS5978742U (en) 1982-11-19 1982-11-19 FM receiver

Publications (2)

Publication Number Publication Date
JPS5978742U true JPS5978742U (en) 1984-05-28
JPS6314508Y2 JPS6314508Y2 (en) 1988-04-22

Family

ID=30379504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17430782U Granted JPS5978742U (en) 1982-11-19 1982-11-19 FM receiver

Country Status (1)

Country Link
JP (1) JPS5978742U (en)

Also Published As

Publication number Publication date
JPS6314508Y2 (en) 1988-04-22

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