JPS5975405A - Data output device - Google Patents

Data output device

Info

Publication number
JPS5975405A
JPS5975405A JP18524582A JP18524582A JPS5975405A JP S5975405 A JPS5975405 A JP S5975405A JP 18524582 A JP18524582 A JP 18524582A JP 18524582 A JP18524582 A JP 18524582A JP S5975405 A JPS5975405 A JP S5975405A
Authority
JP
Japan
Prior art keywords
code
signal
clock pulse
data
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18524582A
Other languages
Japanese (ja)
Other versions
JPH0366753B2 (en
Inventor
Hiroyuki Sugiyama
博之 杉山
Makoto Furumura
古村 誠
Isao Masuda
勲 増田
Kazunori Nishikawa
西川 和典
Yoshiki Iwasaki
岩崎 善樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Nippon Victor KK filed Critical Victor Company of Japan Ltd
Priority to JP18524582A priority Critical patent/JPS5975405A/en
Priority to US06/543,402 priority patent/US4667318A/en
Priority to DE19833338074 priority patent/DE3338074A1/en
Priority to NL8303618A priority patent/NL8303618A/en
Priority to GB08328153A priority patent/GB2132055B/en
Priority to FR8316863A priority patent/FR2535096B1/en
Publication of JPS5975405A publication Critical patent/JPS5975405A/en
Publication of JPH0366753B2 publication Critical patent/JPH0366753B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/19Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
    • G11B27/28Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
    • G11B27/30Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
    • G11B27/3027Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
    • G11B27/3036Time code signal
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/012Recording on, or reproducing or erasing from, magnetic disks
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Abstract

PURPOSE:To know accurately the recording location, etc. of a program by continuously outputting plural codes which are sent in time series by a clock pulse by the clock pulse of an optional frequency. CONSTITUTION:The information of a disk 1 is reproduced by means of a pickup of a pickup circuit 2 and an MFM-demodulated through an FM modulator 3 and a decoder 4. An audio signal is outputted from an output terminal 5 and a video signal is outputted from another output terminal 8 through a memory 6 and a DA converter 7. A time code and a chapter code from the decoder 4 are supplied to data holding circuits 12a-12d through a clock pulse (a), a shift register 9, synchronizing signal detectors 10a-10d, and a data fetch controlling circuit 11. On the other hand, clock pulses of frequencies which are sufficiently smaller than the clock pulse (a) are sent from a terminal 13 to the control circuit 11 and the data holding circuits 12a-12d and both the codes are outputted from terminals 14a-14d in time series. Therefore, the recording location, etc., of a program can be known accurately.

Description

【発明の詳細な説明】 本発明はデータ出力装置に係り、タロツクパルスにて時
系列的に送られてくる複数のコードを任意の周波数のり
1]ツクパルスにて連続的に出ツノし、常に新しく出ノ
Jされるコードにてプログラムの記録位置等を正確に知
り得るデータ出力装置を提供することを目的とする。
[Detailed Description of the Invention] The present invention relates to a data output device, which continuously outputs a plurality of codes sent in time series using tarok pulses at an arbitrary frequency, and always outputs new codes. It is an object of the present invention to provide a data output device that can accurately know the recording position of a program based on the code that is printed.

第1図は本発明装置の一実施例を円盤状情報記録媒体再
生装置に適用したブロック系統図を示す。
FIG. 1 shows a block system diagram in which an embodiment of the device of the present invention is applied to a disk-shaped information recording medium reproducing device.

同図中、1はディスクで、例えばA−ディA信号をディ
ジタルパルス変調してなるディジタルオーディオ信号と
、オーディA信号の再生音鑑賞」−の付加的な情報とし
−Cの1画面分の静止画信号をディジタルパルス変調し
−Cなるディジタルビデオ信号とが夫々周波数変調され
た後、同じトラックに断続づ−るピット列として記録さ
れている。ディスク1に記録されている信号はピンクア
ップ回路2により公知の光強度変化或いは静電′8最変
化としてピックアップ再生され、FM復調器3によりF
M復調された後デコーダ4に供給されてMFM復号され
る。
In the same figure, 1 is a disk that contains, for example, a digital audio signal obtained by digital pulse modulation of the A-D signal, and additional information such as ``listening to the reproduced sound of the audio A signal.'' The image signal is digitally pulse modulated and the digital video signal -C is frequency modulated and then recorded as a series of intermittent pits on the same track. The signal recorded on the disk 1 is picked up and reproduced by the pink-up circuit 2 as a known light intensity change or electrostatic change, and is reproduced by the FM demodulator 3 as an FM signal.
After being demodulated, the signal is supplied to the decoder 4 and subjected to MFM decoding.

ここC、デニ1−夕゛4にUMFM復号されたディジタ
ル記録信号の中の1ブロツクを第2図に模式的に示り一
01ブ[]ツクは130ビツトより構成されており、5
YNCはブ[1ツクの開始を示づ゛8ビットの同期信号
ピッ[〜、Ch−1〜Ch−3は3チ\7ンネルの16
ビツトのディジタルオーディオ低C、CI+−!は16
ビツトのディジタルビデオ信号の1ワード(1水平走査
線の画素データは684ワードに−C描成される)の各
多重位置を示す。P。
FIG. 2 schematically shows one block of the digital recording signal that was UMFM decoded on Dens. 1 to 4. One block consists of 130 bits,
YNC indicates the start of a block [8-bit synchronizing signal pitch], Ch-1 to Ch-3 are 3 channels\7 channels of 16
BIT's digital audio low C, CI+-! is 16
Each multiplex position of one word (pixel data of one horizontal scanning line is drawn in 684 words) of a bit digital video signal is shown. P.

Qは夫々1Gピッ1−の誤り符号訂正用信号、CRCは
23ピツ)への誤り符号検出用信号、Adrは1ピツ1
〜のピックアップ再生素子のランダムアクセス制御用信
号の一部である。最終の2ピツ1〜はり1F−ブビツ1
−C゛ある。
Q is an error code correction signal for each 1G pin 1-, CRC is an error code detection signal for 23 pins), and Adr is a 1 pin 1 signal.
This is a part of the random access control signal of the pick-up reproducing element of ~. Final 2 pits 1-beam 1F-bubitsu 1
-C゛There is.

M t−M復号されたフ゛イジタルA−デイオ信号はフ
゛−」−ダ4内のDA変換器によりアナログオーディA
信″;シに変換されて出力端子5より取出される一ノj
、−ノ゛イジタルビデオ信号はメモリコンl= [1−
ラ(図示1↓゛す゛)からの制御信号により書込まれ、
この制御信号により読出され、DA変換器7にてアナロ
グビデオ信号に変換され′−c出力端子8より取出され
る。
The MtM decoded digital A-dio signal is converted into an analog audio A-dio signal by the DA converter in the feeder 4.
The signal is converted into a signal and taken out from the output terminal 5.
, - The digital video signal is stored in the memory controller l=[1-
It is written by the control signal from the
The signal is read out by this control signal, converted into an analog video signal by the DA converter 7, and taken out from the '-c output terminal 8.

一方、ランダムアクセス制御用信号Adrはデコーダ4
内のアドレス検出器にて検出され、例えば196ブ[j
ツクを1組として取出される。制御用信号Δdrは各ピ
ッ1−データを分散されて1ブロツク中に3ビツト伝送
され、デコーダ4に−c196ビツ1〜の第3図に示づ
如き4M成の制御信号に変換される。
On the other hand, the random access control signal Adr is sent to the decoder 4.
For example, 196 blocks [j
Each piece is taken out as a set. The control signal .DELTA.dr is transmitted in 3 bits in 1 block by distributing each bit 1 data, and is converted to a 4M-component control signal as shown in FIG.

全196ビツトの制御信号は、49ビツトのタイム−]
−61丁C149ビツの第1チA7ブタコードCP−1
,49ビツトの第2チA7ブ’)コートCP=2.4つ
ピッ1−の第3チャプタコードCP−3にて構成されて
d3す、タイムコード王Cはディスク1の記録プログラ
ムの位置を信号記録開始位置からの通粋の荷量で示した
ものであり、第1及び第2チA7フy ml−トCP 
−1、c p −2+t 7+−−テイオプログラムが
記録開始位置がら何番口であるかを示したものであり、
第3チAノブタコ一ドCP−3はビデΔプ[]グラムが
記録開始位置から何番目−Cあるかを示したものである
The total 196-bit control signal is 49-bit time-]
-61st C149 bit 1st A7 pig code CP-1
, 49-bit second chapter A7 block') coat CP = 2. It is composed of the 3rd chapter code CP-3 of 4 pitches 1-d3, and the time code king C indicates the position of the recording program on disk 1. It is shown as the normal load amount from the signal recording start position, and the first and second channels A7 feet ml-tCP
-1, c p -2+t 7+--Indicates what number the program is from the recording start position,
The third button CP-3 indicates the number -C of the video Δp [ ] gram from the recording start position.

勺イム」−ドTCは、24ビツトの同期信号S、4ピツ
1〜の七−ド信号m 、16ビツ[〜の分、秒を示すタ
イム仁弓tm、、/1ビットのトラックナンバ信81r
、1ビツトのバリディコードpに−C構成され′C’a
jす、第1乃至第3チャプタコードCP−1〜CI) 
−3は、24ビツトの同期信号n1.4ピツ1〜のモー
ド伝弓nl 、Qビットのチ曳7プタ信@Cp、12ヒ
′ツ1〜のブ髪7ゾタr−J−カルアト1ノスad、1
ビットのパリアイコード11にて構成されている。
The TC includes a 24-bit synchronization signal S, a 4-bit 7-bit signal m, and a 16-bit track number signal 81r indicating minutes and seconds.
, the 1-bit valid code p is composed of -C and 'C'a
jsu, 1st to 3rd chapter codes CP-1 to CI)
-3 is the 24-bit synchronization signal n1.4 mode transfer nl of bit 1 ~, Q bit chip 7 signal @Cp, 12 bits 1~ of hair 7 zota r-J-karato 1 nos ad, 1
It consists of a pari eye code 11 of bits.

う゛1−タ4より取出されたタイムコード及びチ\7ブ
ター1−ド1はシフ1へレジスタ9に供給され、デJ−
夕′4からのクロックパルスaにてシフトされる。シー
ツI−レジスタ9の出力は並列に同期信号検出器102
1〜10dに供給され、ここでタイムコード丁Cのl1
jl JlIJイ八舅及へチ17ブタコードCP−1〜
C[)−3の夫々の同期信号が検出されてデータ取込み
制御回路11に供給される。データ取込み制御回路11
からはタイl\」−ド及びチVブタコードの夫々の同期
信号が検出された時点で夫々のコードに対応したデータ
取込み制御信号が取出され、データ保持回路12a〜1
2dに供給される。
The time code and data 1 taken out from data 4 are supplied to register 9 to shift 1, and data
It is shifted by the clock pulse a from evening '4. The output of the sheet I-register 9 is connected to the synchronization signal detector 102 in parallel.
1 to 10d, where time code 11 of C
jl JlIJ Iyachi and Hechi 17 Buta Code CP-1~
The respective synchronization signals of C[)-3 are detected and supplied to the data acquisition control circuit 11. Data acquisition control circuit 11
When the respective synchronization signals of the TAI\\'- and CHV codes are detected, data acquisition control signals corresponding to the respective codes are taken out, and the data holding circuits 12a to 1
2d.

−75、マイクロ]ンピュ・−夕等の外部制御回路から
取出されたクロックパルスaの周波数より十分小さい周
波数のクロックパルスbは端子13に入来され、データ
取込み制御回路11及びデータ保持回路12a〜12(
Iに供給される。データ保持回路12a〜12dに保持
されでいるタイムコード及びヂャブタコードは端子13
からのクロックパルスbによつ−C時系列的に読出され
、出力端子14a・〜14d 、J、り取出される。
A clock pulse b having a frequency sufficiently lower than the frequency of the clock pulse a taken out from an external control circuit such as a microcomputer or the like is input to the terminal 13, and is input to the data acquisition control circuit 11 and the data holding circuits 12a to 12a. 12(
Supplied to I. The time code and jab code held in the data holding circuits 12a to 12d are connected to the terminal 13.
-C is read out in time series by clock pulses b from output terminals 14a to 14d, J.

端子13からのクロックパルス1〕はデータ取込み制御
回路11にも供給されており、これにより、データ保持
回路12a〜12dに保持メれでいる各コードが読出さ
れでいる時、データ取込み制御回路の出力を禁止してシ
フトレジスタ9からの」−ドがデータ保持回路128〜
12dに取込まれないようにしている。
The clock pulse 1] from the terminal 13 is also supplied to the data acquisition control circuit 11, so that when each code held in the data holding circuits 12a to 12d is read out, the data acquisition control circuit The output from the shift register 9 is inhibited and the data holding circuit 128~
I am trying to prevent it from being incorporated into 12d.

出力端子14a〜14dより取出されたタイムニ1−ド
T C及びヂ\ノゾタニ1−ドCP−1〜CP  3は
、高速位置検索等のキー人力等を取込まれるマイクt」
]]ンビ、−1−−タ図示せず)に供給される。ここで
、キー人力等により設定された検索所望のプログラムの
タイム−1−ド或いはヂA7プタニJ−ドと出力端子1
4a〜1/ldからのタイムコード或いはチャプタ1−
ドどが比較され、比較誤X(5弓によりピックアップ再
生索子が所望プログラム迄変位される。
The time 1-dots TC and the 1-domains CP-1 to CP-3 taken out from the output terminals 14a to 14d are microphones used to capture key human power for high-speed location searches, etc.
]] (not shown). Here, search for the desired program's time-1 code or output terminal 1 set manually using the key or the like.
Time code from 4a to 1/ld or chapter 1-
The dots are compared, and the pick-up reproducing cord is displaced to the desired program by the comparison error X (5).

一方、出力端子14a〜14CIより取出されたタイム
コ1−ド及びチVブタニ]−ド及びクロックパルス1)
は、表示装置ドライバ(図示せず)に供給される。表示
装置(図示け−ず)は表示装置ドライバよりの駆動信号
によりタイl\]−ド及び(又は)チャプタ」−ドを表
示する。
On the other hand, the time code and clock pulse 1) taken out from the output terminals 14a to 14CI
is provided to a display driver (not shown). A display device (not shown) displays a title code and/or a chapter code based on a drive signal from a display device driver.

上述の如く、本発明になるデータ出力装置は、情報記録
媒体に記録された複数のプログラムの記録位置を示゛4
:」−ド及びこのコードを夫々識別す−る同期信号を複
数1ブロツクとして時系列的に供給され、この−二1−
ド及び同期信号を所定周波数のクロックパルスにてシフ
トして取出すシフト手段と、このシフト手段から取出さ
れI〔各]−ドに夫々対応した同期信8を検出して各同
期信号に人々対応した」−ドを1ブロツク内にある]−
ドの数設けられた各データ保持器に取込むj゛−夕取込
み手段ど、り[コックパルスの周波数より低い任意の周
波数のり[1ツクパルスを出)jし、この任意のタロツ
クパルスにCデータ取込み手段に取込まれた各コードを
取出す〜h、このコード出力期聞該シフ1一手段からの
各コードがデータ保持器に取込まれないように禁止りる
制御手段とよりなるため、例えばプログラムの記録位置
を示づ夕、イムコード及びチャプタ」−ド等の複数の」
−ドを制御回路からの特別の指令なしで同時に出力でき
、制御回路のプログラミングが容易であり、又、任意の
クロックパルスにより、連続的に常に新しいコードを取
出しjSノ、これにより、ランダムアクセスを行なう場
合、所望プログラムの記録位置を正確に知り1q1又、
表示し正確に行ない得る等の特長を右する。
As described above, the data output device according to the present invention is capable of indicating recording positions of a plurality of programs recorded on an information recording medium.
:"-code and a synchronization signal for identifying this code, respectively, are supplied in chronological order as one block, and this -21-
A shift means for shifting and extracting the code and synchronization signal with a clock pulse of a predetermined frequency, and detecting the synchronization signal 8 taken out from the shift means and corresponding to each I [each] - code, and corresponding to each synchronization signal. ”-the code is within one block]-
The data acquisition means outputs one pulse at an arbitrary frequency lower than the frequency of the cock pulse, and captures the C data into this arbitrary tarok pulse. Each code taken into the means is retrieved. This code output period consists of a control means for prohibiting each code from the means from being taken into the data holder. For example, the program ``Multiple'' such as ``event'', ``imcode'' and ``chapter'' indicating the recording position.
- codes can be output simultaneously without special commands from the control circuit, programming of the control circuit is easy, and new codes can be continuously retrieved using arbitrary clock pulses, thereby allowing random access. When doing so, you need to know exactly the recording position of the desired program.
Get the right features such as display and get accurate performance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は木発明装首の一実施例を円盤状情報記録媒体再
生装置に適用したブロック系統図、第2図は第1図中γ
−1−ダにてMFM復号されたディジタル信昼の1ゾロ
ツクの信号フオーンツ1−を示・1図、第3図は第2図
中のランダムアクヒス制御用信号を196ビツト集めた
同期信号及びコードの信相ノオーマツI〜を示4図であ
る。 4・・・デ」−グ、9・・・シフトレジスタ、10a〜
10d・・・回期イi= ”;’3検出器、11・・・
データ取込み制御回路、12a・〜12(1・・・デー
タ保持回路、13・・・クロックパルス入力(11M了
、14aへ一14d・・くJ−ド出力gシ1:了。
Figure 1 is a block system diagram in which an embodiment of the wooden neck head is applied to a disk-shaped information recording medium reproducing device, and Figure 2 is a
Figures 1 and 3 show the synchronization signal and 196-bit random access control signal in Figure 2. FIG. 4 is a diagram illustrating the code of the code. 4...Deg, 9...Shift register, 10a~
10d...period i='';'3 detector, 11...
Data acquisition control circuit, 12a.~12 (1... Data holding circuit, 13... Clock pulse input (11M completed, to 14a - 14d...J-de output g) 1: Completed.

Claims (1)

【特許請求の範囲】[Claims] 情報記録媒体に記録された複数のブ[1グラムの記録位
置を示づ二1−ド及び該コードを夫々識別する同期信号
を複数1ブ゛[jツクとして時系列的に供給され、該コ
ード及び同期信号を所定周波数のりL1ツクパルスにC
シフトして取出すシフト手段と、該シフ1〜手段から取
出された各コードに夫々対応した同期信号を検出して該
各回明信号に夫々対応した−1−ドを該1ブロツク内に
あるコードの数段りられIc各データ保持器に取込むデ
ータ取込み手段と、該り11ツクパルスの周波数より低
い任意の周波数のタロツクパルスを出力し、該任意のタ
ロツクパルスにC該データ取込み手段に取込まれた各−
」−ドを取出り一方、該]−ド出力期間該シフ]〜手段
からの各コードが該データ保持器に取込まれないJ、う
に禁止俳る制御手段どよりなることを特徴どりるデータ
出力装置。
A synchronization signal indicating the recording position of a plurality of blocks recorded on an information recording medium and a synchronization signal for identifying the code, respectively, is supplied in chronological order as a plurality of blocks [j], and the code is and the synchronization signal to a predetermined frequency L1 pulse.
A shift means for shifting and taking out the code, and a synchronization signal corresponding to each code taken out from the shift means are detected, and -1- codes respectively corresponding to the respective illumination signals are detected for each code in the one block. A data acquisition means is arranged in several stages to take in each data holder, and outputs a tallock pulse of an arbitrary frequency lower than the frequency of the 11 clock pulse, −
The data is characterized in that each code from the means is not taken into the data holder while the code is outputted by the control means, etc. Output device.
JP18524582A 1982-10-21 1982-10-21 Data output device Granted JPS5975405A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP18524582A JPS5975405A (en) 1982-10-21 1982-10-21 Data output device
US06/543,402 US4667318A (en) 1982-10-21 1983-10-19 Data producing device in a signal reproducing apparatus
DE19833338074 DE3338074A1 (en) 1982-10-21 1983-10-20 DATA GENERATING DEVICE IN A SIGNAL PLAYER
NL8303618A NL8303618A (en) 1982-10-21 1983-10-20 DATA SUPPLYING DEVICE IN A SIGNAL PLAYING DEVICE.
GB08328153A GB2132055B (en) 1982-10-21 1983-10-21 Data producing device in a signal reproducing apparatus
FR8316863A FR2535096B1 (en) 1982-10-21 1983-10-21 DATA PROVIDING DEVICE FOR SIGNAL READING APPARATUS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18524582A JPS5975405A (en) 1982-10-21 1982-10-21 Data output device

Publications (2)

Publication Number Publication Date
JPS5975405A true JPS5975405A (en) 1984-04-28
JPH0366753B2 JPH0366753B2 (en) 1991-10-18

Family

ID=16167423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18524582A Granted JPS5975405A (en) 1982-10-21 1982-10-21 Data output device

Country Status (1)

Country Link
JP (1) JPS5975405A (en)

Also Published As

Publication number Publication date
JPH0366753B2 (en) 1991-10-18

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