JPH0366753B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data output device that continuously outputs a plurality of codes sent in time series using clock pulses using clock pulses of an arbitrary frequency, and constantly outputs new codes. An object of the present invention is to provide a data output device that can accurately determine the recording position of a program.

FIG. 1 shows a block system diagram in which an embodiment of the device of the present invention is applied to a disc-shaped information recording medium reproducing device. In the figure, reference numeral 1 denotes a disk that, for example, digitally pulse-modulates a digital audio signal obtained by digitally pulse-modulating an audio signal and a still image signal for one screen as additional information for listening to the reproduced sound of the audio signal. After each digital video signal is frequency modulated, it is recorded as a series of intermittent pits on the same track. The signal recorded on the disk 1 is picked up and reproduced as a known change in light intensity or capacitance by a pickup circuit 2, FM demodulated by an FM demodulator 3, and then supplied to a decoder 4.
MFM decoded.

Here, one block of the digital recording signal that has been MFM decoded by the decoder 4 is schematically shown in FIG. One block consists of 130 bits, SYNC is an 8-bit synchronization signal bit indicating the start of the block, Ch-1 to Ch-3 are 16-bit digital audio signals of 3 channels, and Ch.
-4 indicates each multiplex position of one word (pixel data of one horizontal scanning line is composed of 684 words) of a 16-bit digital video signal. P and Q are respectively
CRC is a 23-bit error code detection signal, and Adr is part of a 1-bit random access control signal for the pick-up reproducing element. The last two bits are reserved bits.

The MFM decoded digital audio signal is converted into an analog audio signal by the DA converter in the decoder 4 and taken out from the output terminal 5, while the digital video signal is written by a control signal from a memory controller (not shown). Rarely,
The signal is read out using this control signal, converted into an analog video signal by the DA converter 7, and taken out from the output terminal 8.

On the other hand, the random access control signal Adr is detected by the address detector in the decoder 4, and for example,
196 blocks are extracted as one set. The control signal Adr is divided into three bits and transmitted in one block, and is converted by the decoder 4 into a 196-bit control signal having the structure shown in FIG.

The total 196-bit control signal consists of a 49-bit time code TC, a 49-bit first chapter code CP-
1, 49-bit second chapter code CP-2, 49
The time code TC indicates the position of the recorded program on disk 1 in total time from the signal recording start position, and the time code TC is composed of the third chapter code CP-3 of the bit. CP-1 and CP-2 indicate the number of the audio program from the recording start position, and the third chapter code CP-3 indicates the number of the video program from the recording start position. It is.

The time code TC is a 24-bit synchronization signal s,
It consists of a 4-bit mode signal m, a 16-bit time signal tm indicating minutes and seconds, a 4-bit track number signal tr, and a 1-bit parity code p, and the first to third chapter codes CP-1. ~
CP-3 has a 24-bit synchronization signal m, a 4-bit mote signal m, and an 8-bit chapter signal cp, 12
It consists of a 1-bit chapter local address ad and a 1-bit parity code p.

The time code and chapter code taken out from the decoder 4 are supplied to a shift register 9, where they are shifted in response to a clock pulse a from the decoder 4. The output of the shift register 9 is supplied in parallel to synchronization signal detectors 10a to 10d, where the synchronization signal of the time code TC and the chapter code CP-1 to
Each synchronizing signal of CP-3 is detected and supplied to the data acquisition control circuit 11. When the respective synchronization signals for the time code and the chapter code are detected, data acquisition control signals corresponding to the respective codes are extracted from the data acquisition control circuit 11 and supplied to the data holding circuits 12a to 12d.

On the other hand, a clock pulse b having a frequency sufficiently lower than the frequency of the clock pulse a taken out from an external control circuit such as a microcomputer is inputted to a terminal 13 and supplied to the data acquisition control circuit 11 and data holding circuits 12a to 12d. The time code and chapter code held in the data holding circuits 12a-12d are read out in time series by the clock pulse b from the terminal 13, and taken out from the output terminals 14a-14d.

The clock pulse b from the terminal 13 is also supplied to the data acquisition control circuit 11, which inhibits the output of the data acquisition control circuit when each code held in the data holding circuits 12a to 12d is being read. This prevents the code from the shift register 9 from being taken into the data holding circuits 12a to 12d.

Time code TC and chapter code CP-1 to CP-3 taken out from output terminals 14a to 14d
is supplied to a microcomputer (not shown) which receives key inputs such as high-speed location search.
Here, the time code or chapter code of the program desired to be searched, set by key input or the like, is compared with the time code or chapter code from the output terminals 14a to 14d, and the pick-up playback element is displaced to the desired program by the comparison error signal. Ru.

On the other hand, the time code, chapter code, and clock pulse b taken out from the output terminals 14a to 14d are supplied to a display device driver (not shown). A display device (not shown) displays a time code and/or chapter code in response to a drive signal from a display device driver.

As mentioned above, the data output device according to the present invention includes:
A code indicating the recording position of a plurality of programs recorded on an information recording medium and a synchronization signal for identifying each code are supplied in time series as one block, and the code and synchronization signal are shifted by a clock pulse of a predetermined frequency. and a shift means for extracting the synchronization signals respectively corresponding to the respective codes taken out from the shift means, and each data holder provided with the codes corresponding to the respective synchronization signals in one block. A clock pulse of an arbitrary frequency lower than the frequency of the clock pulse is outputted, and each code fetched by the data acquisition means is retrieved by the arbitrary clock pulse, while the code is outputted from the shifting means during the code output period. The control means prevents each code from being read into the data holder, so multiple codes such as the time code and chapter code indicating the recording position of the program can be read without a special command from the control circuit. It can be output synchronously, programming of the control circuit is easy, and new codes can be continuously retrieved by arbitrary clock pulses, so when performing random access, it is possible to accurately know the recording position of the desired program. It also has the advantage of being able to display accurately.

[Brief explanation of drawings]

FIG. 1 is a block system diagram in which one embodiment of the device of the present invention is applied to a disk-shaped information recording medium reproducing device, and FIG.
The figure shows the signal format of one block of the digital signal MFM decoded by the decoder in Figure 1, and Figure 3 shows the synchronization signal and code signal which are a collection of 196 bits of the random access control signal in Figure 2. FIG. 3 is a diagram showing a format. 4...Decoder, 9...Shift register, 10
a to 10d...Synchronization signal detector, 11...Data acquisition control circuit, 12a to 12d...Data holding circuit, 13...Clock pulse input terminal, 14a
~14d... Code output terminal.

Claims (1)

[Claims] 1 A code indicating the recording position of a plurality of programs recorded on an information recording medium and a synchronization signal that identifies each of the codes are supplied in a time-series manner as one block, and the code and the synchronization signal are supplied with a clock pulse of a predetermined frequency. A shift means for shifting and taking out the code, and detecting a synchronization signal corresponding to each code taken out from the shift means, and detecting a synchronization signal corresponding to each of the codes taken out from the shift means and converting the codes corresponding to the respective synchronization signals to each of the codes provided in the one block. A data acquisition means for inputting data into a data holder, outputting a clock pulse having an arbitrary frequency lower than the frequency of the clock pulse, and extracting each code input to the data acquisition means using the arbitrary clock pulse, while outputting the code. A data output device comprising: control means for prohibiting each code from the shift means from being taken into the data holder for a period of time.