JPS5970328A - Amplifier circuit of received light - Google Patents
Amplifier circuit of received lightInfo
- Publication number
- JPS5970328A JPS5970328A JP57181973A JP18197382A JPS5970328A JP S5970328 A JPS5970328 A JP S5970328A JP 57181973 A JP57181973 A JP 57181973A JP 18197382 A JP18197382 A JP 18197382A JP S5970328 A JPS5970328 A JP S5970328A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier circuit
- operational amplifier
- inverting input
- diodes
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/693—Arrangements for optimizing the preamplifier in the receiver
- H04B10/6931—Automatic gain control of the preamplifier
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Optical Communication System (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、光信号を増幅された電気信号に変換する受光
増幅回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a light receiving and amplifying circuit that converts an optical signal into an amplified electrical signal.
先行技術における受光増幅回路は第１図に示されるよう
な、非反転入力端子２を接地した演算増幅回路１と、演
算増幅回路１の反転入力端子３と出力端子４とに接続さ
れた帰還用抵抗５と、反転入力端子とバイアス電圧ｖａ
とに逆方向に接続された受光素子のホトダイオード６と
で構成されている。ホトダイオード６が光を受光した場
合、ホトダイオード６と演算増幅回路１の反転入力端子
３とを接続するライン７に流れる電流を工８、帰還用抵
抗５の抵抗値をＲｆ、および演算増幅回路１の出力端子
４の出力電圧をＶｄとすると、第１式
％式％（１）
演算増幅回路１は一般に正負２電源で使用することが多
く、また電源電圧ｖｃｃは例えば、５ｖであることも多
い。この場合第１図に示す接地点８゜９の電位は、電源
電圧ｖＣＣの２分の１、たとえば２．５ｖに保たれる。The prior art light receiving and amplifying circuit includes an operational amplifier circuit 1 whose non-inverting input terminal 2 is grounded, and a feedback amplifier circuit which is connected to the inverting input terminal 3 and output terminal 4 of the operational amplifier circuit 1, as shown in FIG. Resistor 5, inverting input terminal and bias voltage va
and a photodiode 6 as a light receiving element connected in the opposite direction. When the photodiode 6 receives light, the current flowing through the line 7 that connects the photodiode 6 and the inverting input terminal 3 of the operational amplifier circuit 1 is calculated by 8, the resistance value of the feedback resistor 5 is Rf, and the resistance value of the operational amplifier circuit 1 is If the output voltage of the output terminal 4 is Vd, then the first equation (%) (1) The operational amplifier circuit 1 is generally used with two positive and negative power supplies, and the power supply voltage Vcc is often 5V, for example. In this case, the potential of the ground point 8.9 shown in FIG. 1 is maintained at one-half of the power supply voltage vCC, for example 2.5V.
また演算増幅回路１の出力電圧Ｖｄの振幅には限界があ
るので、たとえは第４図に示す１３のように０．３ Ｖ
以下には下がらない。Furthermore, since there is a limit to the amplitude of the output voltage Vd of the operational amplifier circuit 1, for example, the amplitude of the output voltage Vd of the operational amplifier circuit 1 is 0.3 V as shown in 13 in FIG.
It won't go below.
このような制限を受けるので第４図の破＋ＩＭｌ！１で
示されるように出力電圧Ｖｄは、０．３ｖ〜２．５ｖの
範囲で変化する。一方、ホトダイオード６からの電気信
号の伝送速度が低い場合、たとえばデジタル信号で１Ｍ
ｂｉｔ／ｓ以下であるときには、帰還用抵抗５の抵抗値
Ｒｆは演算増幅回路１の感度を上げるためある程度まで
大きくできる。しかし抵抗値Ｒｆがたとえば、１ＭΩ、
ホトダイオード６の感度がたとえば、０．５Ａ／Ｗとす
れば、演算増幅回路１が飽和するときの光入力レベルＰ
工Ｎは第２式
％式％（２）
が成り立ち、上式にＲｆ＝ＩＪ１％ Ｖ４＝２．２Ｖ
を代入し、光入力レベルＰ工Ｎを求めると、Ｐ工Ｎ−
４，４μＷとなる。ただしＶ（１＝２，２Ｖ は接地
点の電位が２゜５ｖであって、演算増幅回路１の出力電
圧の最小値は０．３ Ｖであるので、第３式％式％（３
）
から求めた値である。Due to these restrictions, Figure 4 is broken + IMl! As shown by 1, the output voltage Vd changes in the range of 0.3v to 2.5v. On the other hand, if the transmission speed of the electrical signal from the photodiode 6 is low, for example, 1M
When it is below bit/s, the resistance value Rf of the feedback resistor 5 can be increased to a certain extent in order to increase the sensitivity of the operational amplifier circuit 1. However, if the resistance value Rf is, for example, 1MΩ,
If the sensitivity of the photodiode 6 is, for example, 0.5 A/W, the optical input level P when the operational amplifier circuit 1 is saturated is
For N, the second formula % formula % (2) holds true, and the above formula is Rf = IJ1% V4 = 2.2V
Substituting and finding the optical input level PkuN, we get PkuN-
It becomes 4.4 μW. However, when V(1=2.2V, the potential of the ground point is 2°5V, and the minimum value of the output voltage of the operational amplifier circuit 1 is 0.3V, the third formula % formula %(3
).
以上のように先行技術では、短距離の光伝送では光入力
が予め定められた値を超えることによって、受光増幅回
路の動作速度が低下し、特にデジタル信号伝送において
は符号歪や符号誤りを起こす欠点がある。As described above, in the prior art, in short-distance optical transmission, when the optical input exceeds a predetermined value, the operating speed of the light receiving amplifier circuit decreases, and especially in digital signal transmission, code distortion and code errors occur. There are drawbacks.
したがって本発明の目的は、前述の欠点を解決し、光入
力の強弱にかかわらず、また高速の信号伝送においても
正確に光信号を電気信号に変換して出力する受光増幅回
路を提供することである。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to solve the above-mentioned drawbacks and provide a light receiving and amplifying circuit that accurately converts an optical signal into an electrical signal and outputs it regardless of the strength of the optical input and even in high-speed signal transmission. be.
本発明の一実施例を第２ ［ＮＪに示す。第１図に示さ
れる従来例に相当する部分は同じ参照符を付ける。演算
増幅回路１の非反転入力端子２は接地され、反転入力端
子３はライン７を介してホトダイオード６のアノードに
接続されている。ホトダイオード６のカソードにはバイ
アス電圧■ａが与えられている。演算増幅回路１の反転
入力端子３と出力端子４とに帰還用抵抗５を接続し、そ
の抵抗５に順方向で直列接続されたダイオード１０，１
１．１２を並列接続する。演算増幅回路１において、反
転入力端子３に入った信号は、位相が反転し増幅されて
出力端子４から出力され、また非反転入力端子２に入っ
た信号は、位相が同相で増幅されて出力端子４から出力
される。演算増幅回路１の電源電圧Ｖｃｃはたとえば、
５ｖを使用し、接地点８，９の電位は必ず地球のＯＶｔ
位でなくてもよいので電源電圧Ｖｃｃの２分の１、たと
えば２゜５ｖにする。演算増幅回路１が飽和することに
よって、演算増幅回路１の出力電圧Ｖｄの最小値は、た
とえば０．３ｖとする。ダイオード１０，１１゜１２は
たとえば、シリコンＰＮ接合を有するダイオードで第３
図に示す特性をもつ。したがってダイオード１０，１１
．１２の順方向電圧が約０．３Ｖ未満では電流が流れな
い。実施例ではダイオード１０，１１．１２が直列接続
されているので、順方向電圧が約００９ｖ未満ではダイ
オード１０゜１１．１２に電流が流れない。したがって
この状態では、ライン７に流れる電流よりは帰還用抵抗
５のみに流れる。一方、ダイオード１０，１１゜１２の
順方向電圧が０．９Ｖ以上では、ダイオード１０．１１
．１２には電−流が流れる。したがって、ダイオード１
０，１１．１２に流れる電流を工ｄ１帰還用抵抗５に流
れる電流を工ｒとすると次の第（４）が成り立つ。An embodiment of the present invention is shown in No. 2 [NJ. Portions corresponding to the conventional example shown in FIG. 1 are given the same reference numerals. A non-inverting input terminal 2 of the operational amplifier circuit 1 is grounded, and an inverting input terminal 3 is connected to the anode of a photodiode 6 via a line 7. A bias voltage (a) is applied to the cathode of the photodiode 6. A feedback resistor 5 is connected to the inverting input terminal 3 and the output terminal 4 of the operational amplifier circuit 1, and diodes 10, 1 are connected in series to the resistor 5 in the forward direction.
1. Connect 12 in parallel. In the operational amplifier circuit 1, a signal input to the inverting input terminal 3 is inverted in phase, amplified, and outputted from the output terminal 4, and a signal input to the non-inverting input terminal 2 is amplified with the same phase and output. Output from terminal 4. The power supply voltage Vcc of the operational amplifier circuit 1 is, for example,
5V is used, and the potential of grounding points 8 and 9 is always equal to the earth's OVt.
Since the voltage does not have to be as low as 1/2 of the power supply voltage Vcc, for example, 2.5V. When the operational amplifier circuit 1 is saturated, the minimum value of the output voltage Vd of the operational amplifier circuit 1 is set to, for example, 0.3v. The diodes 10, 11 and 12 are, for example, diodes having a silicon PN junction.
It has the characteristics shown in the figure. Therefore diodes 10, 11
．． If the forward voltage of 12 is less than about 0.3V, no current will flow. In the embodiment, since the diodes 10, 11.12 are connected in series, no current flows through the diodes 10.11.12 when the forward voltage is less than about 0.09 volts. Therefore, in this state, the current flows only through the feedback resistor 5 rather than through the line 7. On the other hand, when the forward voltage of the diodes 10, 11 and 12 is 0.9V or more, the diodes 10, 11 and 12
．． A current flows through 12. Therefore, diode 1
If the current flowing through the feedback resistor 5 is expressed as d1, and the current flowing through the feedback resistor 5 is expressed as r, then the following (4) holds true.
工８−工ｄ十工、ｒ ・・・（４）第（４）
式の関係を保って演算増幅回路１は動作し、光入力と出
力電圧との関係を示すグラフを第４図に示す。演算増幅
回路１の反転入力端子３に加わる信号の電位が００９Ｖ
未満のときはＩ！２の直線部分で、０．９Ｖ以上のとき
はｌ！２の曲線部分になり、大きい光入力レベルでも演
算増幅回路１の出力電圧は飽和状態にならない。したが
って、演算増幅回路１の動作速度は降下することはない
。Work 8 - Work d 10 Work, r ... (4) No. (4)
The operational amplifier circuit 1 operates while maintaining the relationship expressed by the formula, and FIG. 4 shows a graph showing the relationship between optical input and output voltage. The potential of the signal applied to the inverting input terminal 3 of the operational amplifier circuit 1 is 009V.
If it is less than I! If it is 0.9V or more in the straight line part of 2, l! 2, the output voltage of the operational amplifier circuit 1 does not become saturated even at a high optical input level. Therefore, the operating speed of the operational amplifier circuit 1 does not decrease.
また実施例の場合、直列接続されているダイオードの数
は、演算増幅回路１の飽和電圧が大きくなれば増やすと
よい。Further, in the case of the embodiment, the number of diodes connected in series may be increased as the saturation voltage of the operational amplifier circuit 1 increases.
演算増幅回路１では、ホトダイオード６が有する接合容
量や浮遊容量などで発振が起こることがある。その場合
、帰還用抵抗５と並列に容量成分を接続して位相補償を
行ない、演算増幅回路１の発振を止めることができる。In the operational amplifier circuit 1, oscillation may occur due to the junction capacitance or stray capacitance of the photodiode 6. In that case, the oscillation of the operational amplifier circuit 1 can be stopped by connecting a capacitive component in parallel with the feedback resistor 5 to perform phase compensation.
またダイオード１０゜１１．１２は接合容量成分を有す
るので、適当な容量成分をもつダイオードを選べば位相
補償ができ、演算増幅回路１の発振を止めることができ
る。Furthermore, since the diode 10°11.12 has a junction capacitance component, if a diode with an appropriate capacitance component is selected, phase compensation can be achieved and oscillation of the operational amplifier circuit 1 can be stopped.
以上のように本発明によれば１受光槽幅回路に使用する
演算増幅回路の飽和状態を防止することによって、光信
号に対応した電気信号の伝送速度を低下させることがな
く、電気信号は正確に伝送することができる。As described above, according to the present invention, by preventing the saturation state of the operational amplifier circuit used in the one photoreceptor width circuit, the transmission speed of the electrical signal corresponding to the optical signal is not reduced, and the electrical signal is accurately transmitted. can be transmitted to.
第１図は先行技術の実施例の回路図、第２図は本発明の
一実施例の回路図、第３図はダイオード１０．１１．１
２の順方向電圧電流特性を表わすグラフ、第４図は実施
例の光入力と出力電圧特性を表わすグラフである。
１・・・演算増幅回路、２・−・非反転入力端子、３・
・・反転入力端子、４・・・出力端子、５・・・帰還用
抵抗、６・・・ホトダイオード、７・・・ライン、８，
９・・・接地点、１０，１１．１２・・・ダイオード代
理人 弁理士 西教圭一部
第１図
第２図
９’： ′ＩＡｆ’ｊ、まくFIG. 1 is a circuit diagram of an embodiment of the prior art, FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIG. 3 is a circuit diagram of an embodiment of the present invention.
FIG. 4 is a graph showing the optical input and output voltage characteristics of the embodiment. 1... operational amplifier circuit, 2... non-inverting input terminal, 3...
... Inverting input terminal, 4... Output terminal, 5... Feedback resistor, 6... Photodiode, 7... Line, 8,
9...Grounding point, 10,11.12...Diode agent Patent attorney Kei Nishi Part 1 Figure 2 Figure 9': 'IAf'j, sow
Claims (1)
入力された信号の位相は反転し、非反転入力端子に入力
された信号の位相は同相で増幅して出力する出力端子を
有する演算増幅回路を備え、非反転入力端子を接地し、
反転入力端子に受光素子を接続し、反転入力端子と出力
端子とに抵抗を接続し、 その抵抗と順方向にダイオードを並列接続したことを特
徴とする受光増幅回路。[Claims] An output that amplifies and outputs an inverting input terminal, a non-inverting input terminal, and a signal input to the inverting input terminal, in which the phase of the signal is inverted, and the phase of the signal input to the non-inverting input terminal is in phase. It is equipped with an operational amplifier circuit having a terminal, the non-inverting input terminal is grounded,
A light-receiving amplifier circuit characterized in that a light-receiving element is connected to an inverting input terminal, a resistor is connected to the inverting input terminal and the output terminal, and a diode is connected in parallel with the resistor in a forward direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57181973A JPS5970328A (en) | 1982-10-15 | 1982-10-15 | Amplifier circuit of received light |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57181973A JPS5970328A (en) | 1982-10-15 | 1982-10-15 | Amplifier circuit of received light |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5970328A true JPS5970328A (en) | 1984-04-20 |
| JPH0315859B2 JPH0315859B2 (en) | 1991-03-04 |
Family
ID=16110099
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57181973A Granted JPS5970328A (en) | 1982-10-15 | 1982-10-15 | Amplifier circuit of received light |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5970328A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0177217A2 (en) * | 1984-09-29 | 1986-04-09 | Stc Plc | Optical receiver |
| JPS61113441U (en) * | 1984-12-27 | 1986-07-17 | ||
| JPS6418304A (en) * | 1987-07-14 | 1989-01-23 | Fujitsu Ltd | Preamplifier |
| JPH0360208A (en) * | 1989-07-28 | 1991-03-15 | Hitachi Ltd | Optical pre-amplifier |
| JP2007129533A (en) * | 2005-11-04 | 2007-05-24 | New Japan Radio Co Ltd | Transimpedance amplifier |
| JP2021061456A (en) * | 2019-10-02 | 2021-04-15 | パイオニア株式会社 | Optical receiving circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57118449A (en) * | 1980-08-27 | 1982-07-23 | Int Standard Electric Corp | Symmetrical clamp optical fiber receiver |
-
1982
- 1982-10-15 JP JP57181973A patent/JPS5970328A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57118449A (en) * | 1980-08-27 | 1982-07-23 | Int Standard Electric Corp | Symmetrical clamp optical fiber receiver |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0177217A2 (en) * | 1984-09-29 | 1986-04-09 | Stc Plc | Optical receiver |
| JPS6189736A (en) * | 1984-09-29 | 1986-05-07 | エステイーシー・ピーエルシー | Optical receiver |
| JPH0348703B2 (en) * | 1984-09-29 | 1991-07-25 | Stc Plc | |
| JPS61113441U (en) * | 1984-12-27 | 1986-07-17 | ||
| JPS6418304A (en) * | 1987-07-14 | 1989-01-23 | Fujitsu Ltd | Preamplifier |
| JPH0360208A (en) * | 1989-07-28 | 1991-03-15 | Hitachi Ltd | Optical pre-amplifier |
| JP2007129533A (en) * | 2005-11-04 | 2007-05-24 | New Japan Radio Co Ltd | Transimpedance amplifier |
| JP2021061456A (en) * | 2019-10-02 | 2021-04-15 | パイオニア株式会社 | Optical receiving circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0315859B2 (en) | 1991-03-04 |
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