JPS5970239U - Malfunction prevention circuit when power is turned on - Google Patents
Malfunction prevention circuit when power is turned onInfo
- Publication number
- JPS5970239U JPS5970239U JP16334582U JP16334582U JPS5970239U JP S5970239 U JPS5970239 U JP S5970239U JP 16334582 U JP16334582 U JP 16334582U JP 16334582 U JP16334582 U JP 16334582U JP S5970239 U JPS5970239 U JP S5970239U
- Authority
- JP
- Japan
- Prior art keywords
- turned
- power
- clock signal
- circuit
- malfunction prevention
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Power Sources (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の電源投入時の誤動作防止回路を示すブ
ロック図、第２図は本考案の一実施例を示す回路図、第
３図は第２図の動作を示すタイムチャート、第４図は本
考案の誤動作防止回路をブザー駆動回路に適用した場合
のタイムチャートである。
１・・・シフトレジスタ部、２・・・クロック信号発生
部、３・・・ゲート回路、４・・・ゲート回路制御部、
４１・・−フリップ・フロ゛ンブ、４２・・・ＡＮＤ’
ｒ’−ト。Fig. 1 is a block diagram showing a malfunction prevention circuit when the power is turned on according to the present invention, Fig. 2 is a circuit diagram showing an embodiment of the invention, Fig. 3 is a time chart showing the operation of Fig. 2, and Fig. 4 is a block diagram showing a malfunction prevention circuit when power is turned on. The figure is a time chart when the malfunction prevention circuit of the present invention is applied to a buzzer drive circuit. 1... Shift register section, 2... Clock signal generation section, 3... Gate circuit, 4... Gate circuit control section,
41...-flip front, 42...AND'
r'-t.
Claims (1)
タを含むシフトレジスタ部と、回路の同期をとるクロッ
ク信号を発生するクロック信号発生部と、前記シフトレ
ジスタ部を作動させるクロック信号の通過を電源投入直
後のみ阻止するゲート回路と、上記ゲート回路の開閉を
制御するゲート回路制御部を備えて構成される電源投入
時の誤動作防止回路。a shift register section including at least one shift register without a reset terminal; a clock signal generating section for generating a clock signal for synchronizing the circuit; and a clock signal generating section for generating a clock signal for synchronizing the circuit, and a clock signal for operating the shift register section that is configured to pass through only immediately after power is turned on. A malfunction prevention circuit when power is turned on, comprising a gate circuit for blocking the gate circuit and a gate circuit control section for controlling opening/closing of the gate circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16334582U JPS5970239U (en) | 1982-10-28 | 1982-10-28 | Malfunction prevention circuit when power is turned on |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16334582U JPS5970239U (en) | 1982-10-28 | 1982-10-28 | Malfunction prevention circuit when power is turned on |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5970239U true JPS5970239U (en) | 1984-05-12 |
Family
ID=30358441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16334582U Pending JPS5970239U (en) | 1982-10-28 | 1982-10-28 | Malfunction prevention circuit when power is turned on |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5970239U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06110720A (en) * | 1992-09-29 | 1994-04-22 | Fujitsu Ltd | Indeterminate data transmission preventing circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5229121A (en) * | 1975-08-30 | 1977-03-04 | Toshiba Corp | False motion prevention circuit when putting on and off of logical cir cuit and so on |
-
1982
- 1982-10-28 JP JP16334582U patent/JPS5970239U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5229121A (en) * | 1975-08-30 | 1977-03-04 | Toshiba Corp | False motion prevention circuit when putting on and off of logical cir cuit and so on |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06110720A (en) * | 1992-09-29 | 1994-04-22 | Fujitsu Ltd | Indeterminate data transmission preventing circuit |
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