JPS5970061A - Method for encoding binary data - Google Patents

Abstract

PURPOSE:To set up a minimum value to 4 and a maximum value to a prescribed value or less and to improve recording density on a recording medium by referring data before and after 2-bit data and a code word before a 5-bit code word when converting binary data into the 5-bit code word in each 2-bit data. CONSTITUTION:Original data from an input terminal 1 and a clock from a clock input terminal 2 are inputted to a 12-bit serial/parallel shift register 3, which shifts the input data sequentially and applies its outputs Q1-Q12 to an encoder 4. Encoded algorithms decided by a condition deciding circuit 9 to which the outputs of a 10-bit serial/parallel shift register 8 are inputted are applied to the encoder 4. The encoder 4 applies outputs obtained by encoding input data by prescribed algorithm to a 5-bit parallel/serial register 7. While referring the data before and after the 2-bit data and the code word before the 5-bit code word, the minimum value of the number of continuous ''1''s and the succeeding ''0''s in the converted 5-bit code word string is set up 4 and the maximum value is set up the prescribed value or less.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application This invention relates to a method for encoding (decoding) binary data, and for recording (recording) binary data on a recording medium such as a magnetic tape or a magnetic disk. It can be used for devices that play back data from media.

Conventional configurations and their problems When encoding binary data and recording it on a recording medium such as a magnetic tape or magnetic disk, various encoding methods have been proposed, as shown in Table 1. There is. The entire purpose of these encoding methods is to improve the recording density on the recording medium.

Generally, when recording on a magnetic recording medium, the performance comparison of encoding methods is mainly performed based on the minimum magnetization reversal interval Tmi□, the maximum magnetization reversal interval "tIBx", and the detection window width Tw necessary for identifying the magnetization reversal interval. The magnetic recording and reproducing waveform corresponds to magnetization reversal and is expressed as a superposition of reproducing waveforms.In order to enable high-density recording and reproducing, narrowing the minimum magnetization reversal interval corresponds to magnetization reversal. Mutual interference between reproduction signals read by a reproduction element such as a head increases, and this increases detection errors due to large fluctuations in the peak value or amplitude of the reproduction signal.Therefore, when comparing at the same recording density , the minimum magnetization reversal interval "mi".

The larger the value, the less mutual interference between reproduced waveforms.

This means that in devices with the same waveform quality,
This means that it is possible to improve the recording density by adopting an encoding method with a larger minimum magnetization reversal interval Tr.
It can be said that a coding method with a large rm is more suitable for high density.

(Margin below) Table 1 T: If the detection window width Tw required to identify the data bit interval or the magnetization reversal interval is large, the peak position shift due to mutual interference of the reproduced signals (
Peak shift) The total permissible range is wide, and the frequency of occurrence of errors due to equipment noise, media noise, etc. is reduced.

Further, although the clock is extracted from the reproduced data, if the period of the reproduced clock signal is larger than the maximum magnetization reversal interval Tmax, it tends to be difficult to accurately extract this clock.

The minimum magnetization reversal interval Tmi is the desired performance for an encoding method applied to devices that record and reproduce data at high density. is large, the detection window width Tw is large, and the maximum magnetization reversal interval T is small. Therefore, the value of TwXTmin will be considered as an index for selecting a code suitable for high density. TwXTmi of each encoding method in Table 1
Looking at n, NRZ@NRZI is the largest at 1, followed by 3PM and 274M.

4/8 NRZI, HDM-1, HDM-2 0.
75 I understand Tealco. However, the former NRZ-N
RZI has the disadvantage that ``max'' is at worst oo (infinity) and clock recovery is difficult, and conventionally the latter are 3PM and 2/4M.

4/8 NRZI, HDM-1, HDM-2t - Many examples were adopted as encoding methods for magnetic tape and magnetic disk devices. However, as the amount of information increases in recent years, there is a demand for all encoding methods capable of achieving even higher density.

Considering the above-mentioned TwxTI]1 inch as an index that provides direction in searching for an encoding system that satisfies this demand, it is desirable to propose an encoding system that increases the detection window width TW and the minimum magnetization reversal interval Tm1nk in a well-balanced manner. In this sense, HDM-3 in the first precept is attracting attention as a unique encoding method in which Tm1n = 2. Shigashi, Tw
= 0.33 T, so TwXT, n=0.67
However, it must be said that it is inferior to the 0.75 encoding method such as the aforementioned 3PM.

Here, the encoding algorithm of HDM-3 will be explained using Table 2. The HDM-3 converts 4-pin binary data into a 12-bit code word, as shown in (a) Basic conversion process in Table 2. At this time, the I
If the minimum number of consecutive bits of oI is 5 and this condition is not satisfied at the connection point of a 12-bit code word, (b) general rule of conversion at the connection point, ←→AI
The conversion is performed using a special conversion (10-α) of the connection with O. With these algorithms, the maximum number of consecutive IO# focuses between the bit bit and the 11" pit of the code string is limited to 24, and the performance is shown in Table 1. .

(Leaving space below) Table 2 (a) Basic conversion table (b) General rules for conversion at connection points () Special conversion for connections with A1.0 (10-α) Purpose of the invention This invention provides high-density It is an object of the present invention to provide a binary data encoding method that allows data to be recorded and reproduced.

Structure of the Invention The binary data encoding method of the present invention converts binary data into two
When converting each bit of data into a 5-bit codeword,
By referring to the data before and after the 2-bit data and the code word before the 5-bit code word, the 11'' bit and the next '1' bit of the converted 5-bit code word string are determined. It is characterized in that the minimum number of consecutive 0'' focus points between 0'' is set to 4 and the maximum is set to a predetermined value, for example, 22 or less, and has the same performance as the HDM-3 of Tm1n = 2, and the detection window width Tw' i0.33T to 0.4T
Improved to TWxTmin; 0.8, compared to conventional 3P
M, 2/4M, 4/8NRZI, HDM-1
, HDt-2, it is possible to record and reproduce data at a higher density than HDt-2.

DESCRIPTION OF EMBODIMENTS Table 3 shows examples of encoding algorithms according to the invention. The binary data encoding method of the present invention has a basic algorithm for converting 2-bit binary data into a 5-bit code word. When converting 2-bit binary data (hereinafter referred to as original data) to a 5-bit code word (hereinafter referred to as conversion code), bit #1'' and the next bit ``1'' of the conversion code string are Convert the data to the original data by referring to the data before and after the original data to be converted and the previously converted conversion code so that the minimum value of three consecutive bits of IO2 between the two is 4 and the maximum value is 22 or less. The corresponding conversion code has been determined.

rYJ in Table 3 is the lower 4 bits of the previous conversion code)
7) When '0000', tri '1' L,
,'0000'? If not, set #θ'. Also, α0
．． α3. ... is 1 in the original data string to be converted.
,2. ...Indicates the original data after the item. Similarly, α−
0, α-2, ... are 1, 2, . . . in the original data string to be converted. ...Indicates the previous original data. For example, when the original data string is 11poo(oio1ioo') and the original data to be converted is 110', α-
0, α-2, α□, α2 mean α-2=100N. Similarly, β□, β2. ... indicates the conversion code after 1.2... in the converted conversion code string. β-0, β-2, . . . are also converted code strings, and 1, 2, . . . indicate the converted codes of songs.

(Hereafter, the rest is white) Table 3 Table 4 shows an example of the decoding algorithm.

Thereby, the conversion code is uniquely decoded into the original data.

According to the embodiment of the present invention, Tw=0.4T (T is the bit period of the original data), Tmn=2T, Tyu=9.2
It becomes T.

(Left space below) Table 4 FIG. 1 shows an embodiment of an encoding circuit according to an example of the encoding algorithm according to the present invention shown in Table 3. ■ is a data input terminal where original data is input sequentially. 2 is a clock input terminal into which a clock synchronized with the original data is input. 3 is a 12-bit serial/parallel shift register that sequentially shifts the original data. 4 is an encoder that generates a conversion code based on an example of the encoding algorithm according to the present invention. 5 is a code synchronization input terminal, into which a synchronization signal of the conversion code is input. 6 is a clock input terminal, into which a clock synchronized with the conversion code is input. 7 is a 5-bit parallel/serial shift register which serially outputs a 5-bit parallel input conversion code in synchronization with a clock. 8 sequentially shifts the conversion code using a 10-bit serial parallel shift register. Reference numeral 9 denotes a condition determination circuit which performs determination according to the conditions of the encoding algorithm shown in Table 3 and outputs all condition signals. Reference numeral 10 is a conversion code output terminal, from which a 5-bit conversion code is sequentially output.

Next, the operation of the encoding circuit shown in FIG. 1 will be explained using the waveforms shown in FIG. Binary data shown at 50 in FIG. 2 is input to the data input terminal 1 shown in FIG. 1, and a clock synchronized with the binary data 50 shown at 51 is input to the clock input terminal 2.

Binary data with a waveform of 50 is input to the data input terminal of the 12-bit serial/parallel register 3, and a clock with a waveform of 51 is input to the clock input terminal CKVC/d. Parallel output terminal Q of 12-pit serial and parallel register 3.

, the binary data shown at 50 is sequentially outputted in synchronization with the clock 51. In the encoder 4, the output terminals Q to Q of the 12-bit serial/parallel register 3
The 12-bit input terminals (1 to 12 of encoder 4) receive the binary data output from output terminals (A-E in encoder 4).

Here, when generating the conversion code, a signal from the output terminal Q□+02 of the condition determination circuit 9 (the operation of which will be described later) is used. -For example, output terminal Q.

When the output signal from Q2 is input, the original data '11' is converted to the conversion code '01000'K as shown in Table 3. The encoder 4 can be formed by a storage element, for example a read only memory (ROM), for generating the conversion code.

Next, the 5-pinto conversion output from the encoder 4: I-
)'U, is input to the 5-bit parallel serial register 7. The parallel/serial input terminal P/S and clock input terminal CK of this 5-bit parallel/serial register 7 receive the 53 5-bit code synchronization signals shown in FIG. , 52 clocks are input. Through the above operations, 54 conversion code strings are output to the output terminal Q5 of the 5-bit parallel/serial shift register 7, and 10
, the data input terminal of the bit serial/parallel register 8, and is sent to the conversion code output terminal 10.

In addition, the clock input terminal CKK of the 10-bit serial/parallel register 8 is connected to the 52 bits from the clock input terminal 6.
clock is input, and stores the previously converted 10-bit conversion code.

The condition determination circuit 9 refers to the 10-bit conversion code stored in the 10-bit serial parallel register 8 and outputs the condition signals Q□, Q2e. Note that the waveform 55 corresponds to the recorded waveform on the recording medium. It shows.

Here, the condition determination circuit 9 will be explained. According to the encoding algorithm in Table 3, it is necessary to refer to the previously converted code string. For example, if the original data to be converted is 111', the original data sequence α-3, α before #11'
-0 is '1110'' and the subsequent original data string α□, α2
is not '1110'', the previously converted conversion code string β-2, β-0 is '0100001000' or 'o
ooooooooo' or 'oooooooiooo'
It is necessary to determine whether they match or do not match. The condition determination circuit 9 determines the condition signal ヲQ□ based on Table 3.

Output from Q2. In response to this - signal, the encoder 4 generates a converted code corresponding to the original data as described above.

FIG. 3 shows an embodiment of a decoding circuit according to the decoding algorithm shown in Table 4. Reference numeral 11 denotes a reproduction code input terminal, in which a conversion code string recorded on a recording medium such as a magnetic tape is reproduced via a reproduction element and inputted as a reproduction code string. Reference numeral 12 denotes a reproduced clock input terminal, into which a reproduced clock extracted from the reproduced code string is input.

The reproduction code inputted to the 13-bit serial/parallel shift register is sequentially shifted and output in parallel. 14 is a decoder which inversely converts the reproduced code into the original 2-bit data (herein referred to as reproduced data) based on the decoding algorithm shown in Table 4. 15 is a 2-pin parallel/serial shift register which serially outputs 2-bit reproduced data from parallel input. Reference numeral 16 denotes a parallel/serial signal input terminal into which a 2-bit reproduction data synchronization signal is input. Reference numeral 17 denotes a clock input terminal into which a clock synchronized with reproduced data is input.

18 is a data output terminal from which binary data is output.

Next, the operation of the decoding circuit shown in FIG. 3 will be explained using the waveform diagram shown in FIG. The reproduced converted code string shown in waveform 57 in FIG. These reproduced codes and reproduced clocks are input to the data input terminals of the 30-pit serial/parallel shift register 13.

Each is input to a clock input terminal CK. The 30-pit serial/parallel shift register 13 shifts the reproduced code string in synchronization with the reproduced clock, and outputs it to the output terminal Q.
Then, sequentially output to Q30. The decoder 14 uses input terminals 1 to 30 based on the decoding algorithm shown in Table 4.
2-bit reproduction data is generated from the 30-bit reproduction code string inputted to the output terminal A and B, and the reproduction data is input to the 2-bit parallel/serial shift register 15. Parallel/serial signal input terminal P/ of 2-bit parallel serial shift register 15
A signal having a waveform 60 shown in FIG. 4 input to the parallel/serial signal input terminal 16 and a clock having a waveform 59 input to the clock input terminal 17 are input to the S and clock input terminals CK, respectively. Then, 61 reproduced data are outputted from the output terminal Q2 of the 2-bit parallel/serial shift register 15, and outputted from the data output terminal 18 as binary data. Note that 56 indicates a recording waveform on the recording medium.

Although the embodiments of the invention have been shown above, the encoding and decoding algorithms in Tables 3 and 4 and the encoding and decoding circuits in the first factor and FIG. 'D. Other examples are also conceivable within the meaning of this invention.

Effects of the Invention According to the present invention, a 2-bit binary data is converted into a 5-bit conversion code, and the detection window width Tw and minimum magnetization reversal interval T, which indicate the performance of the encoding method, are each Tw = 0.4.
T, T, = 2 T, and TwXT, which is an index of high density, is 0.8, and the conventional example 3PM, 2
/4M, 4/8 NRZI, HDM-1, HDΔto2゜HDM-3 are all large, and the maximum magnetization reversal interval T is limited (in the example, "max=9").
．． 2T), so when the clock is extracted from the reproduced signal, N
RZ @NRZI is easier to perform than NRZI, so by using it in devices that record and reproduce binary data on recording media such as magnetic tapes and magnetic disks, it is possible to record and reproduce data at a higher density than conventional methods. It becomes possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the encoding circuit according to the present invention, FIG. 2 is a waveform diagram for explaining the operation of FIG. 1, and FIG. 3 is an embodiment of the decoding circuit according to the present invention. FIG. 4 is a waveform diagram for explaining the operation of FIG. 3. 1...Data input terminal, 2...Clock input terminal,
3... 12-bit serial/parallel shift register, 4... Encoder, 5... Code synchronization input terminal, 6...
・Clock input terminal, 7... 5-bit parallel Φ serial shift register, 8... lO pit serial/parallel shift register, 9... condition judgment circuit, lO・
・Output terminal, 11... Reproduction code input terminal, 12...
・Regenerated clock input terminal, 13...30-bit serial-parallel shift register, 14...1eil, 1
5...2-bit parallel/serial shift register,
16...Parallel/serial signal input terminal, 17...
・Tarlock input terminal, 18... Data output terminal Figure 1 Figure 3 COi's ■ O 17') Lnw w co:i Procedural amendment (spontaneous) 1. Indication of the case 1980 Patent Application No. 180478 2. Encoding method for binary data of the name of the invention 3. Relationship with the case of the person making the amendment Applicant Address 1006 Kadoma, Kadoma City, Osaka Prefecture Name (
582) Matsushita Electric Industrial Co., Ltd. Representative Yamashita
Toshihiko 4, Agent 5, Date of amendment order Month, Showa
Day spontaneous correction 6, subject to correction. (2) Table 3 on page 13 of the specification is amended as shown in the attached sheet. (3) Table 4 on page 15 of the specification is amended as shown in the attached sheet. Table 3 Table 4-35

Claims (2)

[Claims] (1) When converting binary data into a 5-bit code word for each 2-pin data, refer to the data before and after the 2-bit data and the code word of the song with the 5-bit code word. Okay, the converted 5-bit code “1”
1. A method for encoding binary data, characterized in that the minimum number of consecutive "0#" bits between the bit IL and the next IL, 1 bit is set to 4 and the maximum is equal to or less than a predetermined value. (2) The binary system according to claim 1, wherein code conversion is performed by referring to two data before and after the 2-bit data and two code words before the 5-bit code word. How the data is encoded.