JPS596677A - Photoelectric converter - Google Patents

Abstract

PURPOSE:To obtain proper storage time at all times in a photoelectric converter for automatic focus detection of a camera, by reading out simultaneously charge of a light current stored in a storage circuit in relation to the detected timing. CONSTITUTION:When a charge signal is supplied from outside to an input terminal 14, a gate 9-1 conducts and a condenser 8-1 is charged upto power source voltage. Consequently, potential of output point Y-1 of buffers 10-1, 11-1 is also raised, and the output is led to a comparator 18 through a diode 12-1. Out of buffer output points of photoelectric conversion circuits 6-1-6-N, one having the highest potential appears first in the signal input terminal 15 of the comparator, and a reference potential source is connected to other input terminals. The output of the comparator is inverted when the maximum output signal of the photoelectric conversion circuit arrives at a comparison level. This is detected by a control circuit and sends out a transfer pulse to a terminal 17.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photoelectric conversion device used for automatic focus detection of an optical system in an optical device such as a camera.

A device that automatically focuses the optical system of a camera, etc.
As devices for electrically detecting the direction of out-of-focus, many devices using self-scanning solid-state imaging devices having an accumulation effect, such as charge-coupled devices (COD) or MOS image sensors, have been proposed.

In a photoelectric conversion device using such devices, one of the important elements is a means for adjusting the storage time of the photoelectric conversion element according to the brightness of the subject. This is because the saturation exposure amount of the photoelectric conversion element is about 1 to 0.11 ux-S, whereas the brightness of the subject handled by still cameras is generally 0.1 lux during indoor flash photography.
Since the range is extremely wide, from lux to more than lux when shooting outdoors on a clear day, it is necessary to respond to changes in the brightness of the subject by changing the storage time of the photoelectric conversion element. be.

Several methods have been proposed in the past as means for controlling the storage time depending on the brightness of the subject. As an example, as shown in FIG. 1, a large number of subdivided photoelectric conversion elements 1-1, 1-2.・
In the vicinity of the photoelectric conversion element array 2 consisting of 1-n, another average light amount receiving photoelectric conversion element 8 having a rectangular light-receiving surface of approximately the same length as the photoelectric conversion element array 2 is placed. The photoelectric conversion elements 8 are arranged parallel to the conversion element array 2, and the outputs of the photoelectric conversion elements 8 are sent to the level detection circuit 4 as shown in FIG.
When the detection level reaches a predetermined level, the accumulation time control circuit 5 is operated, and thereby each photoelectric conversion element 1-1, 1-2, .・
There is a method in which the accumulation in 1-n is terminated.

This conventional method is based on the concept that a separately provided rectangular photoelectric conversion element 8 for receiving average light intensity provides an output corresponding to the average light intensity of the subject image formed on the photoelectric conversion element row 2. Based on. However, with this method,
As shown in FIG. 8, which shows the light intensity distribution on the photoelectric conversion element array 2 with the element number of the photoelectric conversion element array 2 on the horizontal axis, the output level L0 of the photoelectric conversion element array 2 corresponding to the average light intensity level is shown. For a subject image that partially has an extremely high light level, the saturation level L2 of the photoelectric conversion element array 2
This results in inaccurate detection results. In addition, the level L□ corresponding to the average light amount is set to a level sufficiently lower than the saturation level L2, even if it does not exceed the saturation level L2. .

Otherwise, not only will it not be possible to accurately detect the output corresponding to the light intensity distribution of the object image on the photoelectric conversion element array 2, but also the detection accuracy will decrease due to the discrepancy between the average light intensity detection position and the image detection position. There are unavoidable drawbacks.

As another conventional example, as shown in FIG. 4A and B, the photoelectric conversion output obtained by scanning the photoelectric conversion element array is compared with two high and low levels vH and V. If there is an output that exceeds the high level ■H, as shown in Figure B, the next accumulation time will be shortened, and if there is no output that exceeds the low level VL, as shown in B of the same figure, the next accumulation time will be lengthened. This is a method that attempts to efficiently perform photoelectric conversion by doing this. In this method, the accumulation time is shortened and the extension time is increased or decreased in units of relatively short predetermined time units, and the photoelectric conversion output does not fall below the level of ■H level or above the level of HL in - times of operations. In this case, the operation of increasing and decreasing the accumulation time is repeated at the pitch of the unit time, so if the brightness of the subject changes suddenly, it is necessary to repeat the operation of increasing and decreasing the accumulation time many times. However, the disadvantage is that the appropriate accumulation time is not reached.

The present invention aims to eliminate the drawbacks of the above-mentioned conventional examples and provide a photoelectric conversion device that can follow any changes in object shape and brightness at high speed and always provide an appropriate accumulation time. It is something.

The charge conversion device of the present invention includes a plurality of photoelectric conversion elements, a means for accumulating photocurrent charges generated in each of the charge conversion elements, and a means for obtaining an output corresponding to the amount of charge accumulated in each accumulation means. charge-voltage conversion means and the timing when the maximum output of each output of these charge-voltage conversion means reaches a predetermined level? The present invention is characterized in that it comprises a detecting means, and is configured to read out the charging current charges accumulated in each of the accumulating means at the same time in relation to the timing detected by the detecting means.

Hereinafter, the present invention will be explained in detail based on examples.

FIG. 5 is a circuit configuration diagram showing an example of the configuration of an embodiment of the photoelectric conversion device of the present invention. This photoelectric conversion device includes N photoelectric conversion circuits 6-1. ....

6-N, each party iH switching circuit 6-1. ....

6-N have the same operation, so here we will use one of them.
It is only necessary to illustrate the circuit configurations of the th and Nth circuits. Further, in order to simplify the explanation, only one of them, the photoelectric conversion circuit 6-1, will be explained.

The photoelectric conversion circuit 6-1 includes parallel-connected photoelectric conversion elements such as a photodiode 7-1 and a capacitor 8-1. M.O.
A first gate 9-1 consisting of an SFET MOSFET 10-1 connected in series and each forming a buffer;
11-1, a diode 12-1° inserted to take out the output from the buffer, and a second gate 18-1' made of a MOS FET. The parallel circuit of the photodiode 7-1 and the capacitor 8-1 is connected to the DC power supply positive side line ■8s through the first gate 9-1.
and the negative side line (earth' potential line) ■Connected between DD. Further, the gate of the MOS FET constituting the first gate 9-1 is connected to the charge signal input terminal 14.
It is connected to. On the other hand, the connection point X- between the photodiode 7-1 and the capacitor 8-1 and the first gate 9-1
1 is a MOS FET 11- constituting the second buffer.
1 and its MOSFET 1
One of the electrodes of the pond in 1-1 is the negative electrode line of the DC power supply ■DD
, the local electrode constitutes the first buffer MOS 1
1i'ET 10-1. Furthermore, that M
The local electrode of the OS FET 10-1 is connected to the DC power supply positive line VSS, and its gate is connected to the DC power supply negative line vDD. The output point Y-1 of the buffer is connected to the forward input of the diode 12-1, and the outputs of the diodes 12-1 to 12-N in each of the photoelectric conversion circuits 6-1 to 6-N are all It is connected and taken out from the monitor output terminal 15. Further, one end of the second gate 18-1 is connected to the point X-1, and its ground end is connected to the corresponding pixel well of the charge-coupled device (COD) 16. A transfer signal is supplied from a transfer signal input terminal 17 to the gates of the MOS FETs constituting the MOS FET.

In the above configuration, when a charge signal is supplied from the charge signal input terminal 14 from an external control circuit (not shown), the first gate 9-1 becomes conductive and the capacitor 8-1 is charged to the power supply voltage. Ru. When the charge signal is interrupted, the first gate 9-1 is disconnected, so that the charge stored in the capacitor 8-1 is discharged by the photocurrent of the photodiode 7-1. Therefore, the potential at point X-1 rises with time, and accordingly, the MO
Since the gate voltage of the S FET also increases, the potential at the Y-1 point, which is the output point of the buffer, also increases. The rate and level of the rise are proportional to the brightness of the light incident on the photodiode 9-1. The output at point Y-1 is led from the monitor output terminal 15 to the comparator 18 as shown in FIG. 6, together with the output similarly obtained from the photoelectric conversion circuit of Ike, via the diode 12-1.

The signal input terminal of the comparator 1 is connected to the DC power supply negative line (earth line) DD via a resistor 19, as shown in the figure. Therefore, each photoelectric conversion circuit 6-
Among the potentials at the buffer output points Y-1 to Y-N among the buffer output points Y-1 to Y-N, the highest potential appears first.

On the other hand, a reference potential source for setting a predetermined comparison level is connected to the local input terminal of the comparator 18 in FIG. Therefore, when the maximum H4 output among the outputs of the photoelectric conversion circuits 6-1 to 6-N appearing at the monitor output terminal 15 in FIG. 5 reaches the comparison level, the output of the comparator 18 is inverted. Therefore, the control circuit 2o detects this and sends a transfer pulse to the transfer signal input terminal 17. This transfer pulse is input to the gate electrode of the MOS FET constituting the second gate 18-1 shown in FIG. Transfer the charge to the corresponding pixel well of COD 16.

The above operations are performed simultaneously at the same timing for each of the photoelectric conversion circuits 6-1 to 6-H. That is,
Among the outputs obtained from Y-1 to Y-N of each photoelectric conversion circuit 6-1 to 6-N, each photoelectric conversion circuit 6-1
The charges of capacitors 8-1 to 8-N of ~6-N are read out all at once and transferred to 00D16.

Therefore, if the comparison level in the comparator 18 is set appropriately, the accumulation time can be set so that the accumulation by the capacitors 8-1 to 8-N ends immediately before the photodiodes 7-1 to 7-N reach their saturation levels. can be controlled.

The amount of charge in each capacitor 8-1 to 8-N of each photoelectric conversion circuit 6-1 to 6-H transferred to the OOD 16 as described above is determined by driving the COD 16 using a known method by an external control circuit. By doing so, it is possible to sequentially read out a time-series signal from the video output terminal 21, and the time-series signal corresponds to a photoelectric conversion output that is not affected by saturation due to inappropriate storage time of the photoelectric conversion element.

FIG. 7 shows a circuit configuration of an embodiment of the present invention, in which the same parts as those in FIG. 5 are given the same reference numerals. The difference from the previous embodiment is that the electric charge of the charge current accumulation capacitor 8-1 read by the second gate 11-1 is
The second gate 13-1 and the newly established eighth gate)
The shift register 2 is temporarily held by a holding capacitor 28-1 inserted between the connection point with 22-1 and the vDD line, and is driven by an external control circuit (not shown).
Through the eighth gate 22-1 controlled by
The point is that the signal is led to a buffer composed of two MO8FETs 25 and 26, converted into a voltage, and obtained as a time series signal from the video output terminal 21.

That is, in this embodiment, each photoelectric conversion circuit 6-
1 to 6-N, the charges accumulated in each capacitor 8-1 to 8-N are read out all at once, and each holding capacitor 28-1 to 28-N is read out at once.
23-N, respectively, and a potential corresponding to the amount of charge of each of the holding capacitors 23-1 to 28-N is held by the third gate 2, which is sequentially controlled by the shift register 24.
MO8F that constitutes a buffer via 2-1 to 22-N
The holding capacitor 23-1 is applied to the gate of one of the MOS FETs ET25.26 to change the resistance ratio between the MO8FETs 25.26 and 25.26.
A time-series signal output corresponding to the charge needle at ~23-N is obtained.

Note that the hold signal supplied to the hold signal input terminal 27 is obtained by guiding the output from the monitor output terminal 15 to the comparator 18, and converting it to the highest output among the outputs, similar to the rabbit embodiment described in FIG. This is a timing signal generated from a control circuit (not shown) when the level reaches a predetermined comparison level. The operation of the pond is the same as that of the previous embodiment described in FIG. 5, so a description thereof will be omitted.

The feature of this second embodiment is that, like the previous embodiment, the accumulation time of the photocurrent of the photodiode can be properly controlled, and the charge layer due to the photocurrent can be
-H to the holding capacitors 28-1 to 23-N,
It is configured to read this as a voltage, so
It is possible to repeatedly read out the charge layers held in the holding capacitors 2B-1 to 23-N without destroying them.

FIGS. 8 and 9 respectively show the configuration of an embodiment that is a modified version of the embodiment described with reference to FIGS. 5 and 7, respectively.

In each of the above embodiments, each photoelectric conversion circuit 6-
Each photoelectric conversion circuit 6-1 is used as a means for detecting that the maximum output among the outputs obtained from the photodiodes 7-1 to 7-N has reached near the accumulation saturation level of the outputs of the photodiodes 7-1 to 7-N. ~6-N outputs are connected to diode-v12-1, respectively.
~12-N are applied and synthesized, and this is led to the comparator 18 for detection as shown in FIG.
In the embodiments shown in FIG. 9 and FIG. 9, the detection means includes Schmitt circuits 28-1 to 28-N provided for each of the photoelectric substitution circuits 6-1 to 6-N, and the Schmitt circuits 28-1 to 28-N provided for each of the photoelectric substitution circuits 6-1 to 6-N. It is constructed by an OR circuit 29 whose output is an input. Regarding other parts,
The one in Figure 8 has the same configuration as the one in Figure 5, and the one in Figure 9 has the same configuration as the one in Figure 7, so the same functional parts are designated with the same reference numerals. In other words, in the preferred embodiment of the present invention shown in FIGS. 8 and 9, each photoelectric conversion circuit 6-1- In place of the diodes 12-1 to 12-N in FIG. 18 is replaced by an OR circuit 29, each output obtained from the Schmitt circuits 28-1 to 28-N is led to the OR circuit 29, and the logical sum of these outputs is obtained from the monitor output terminal 15. It is something. Therefore, in FIGS. 8 and 9, when the first gates 9-1 to 9-N are made conductive by a charge signal supplied to the charge signal input terminal 14 from an external control circuit (not shown),
The electric charge charged in each capacitor 8-1 to 8-H is transferred to the photodiode 7-1 as the charge signal is discontinued.
~7-N is discharged by the flow of light Tlf, and the resulting rise in potential at points Y-1 to Y-N causes the potential to increase at any one of those points Y-1-Y-N. Each Schmitt circuit 28- of each photoelectric conversion circuit 621 to 6-N
When the threshold level is exceeded in any one of 1 to 28-N, the output of the OR circuit 29 becomes high level, and the output of the monitor output terminal 15 becomes high level. The point at which the level changes to this high level is detected by an external control circuit (not shown),
Similar to the embodiments shown in FIGS. 5 and 7, the embodiment shown in FIG. 8 generates a transfer signal from its external control circuit and supplies it to the transfer signal input terminal 17. In the embodiment shown in FIG. 9, a hold signal is generated and supplied to the hold signal input terminal 27. In this way, the Schmitt circuit 28-
By setting the threshold level in each Schmitt circuit 28-1 to 28-N to an appropriate level with a photodiode in relation to the threshold level of 1 to 28-N, the photodiode 7-1 to 7-N is It is possible to obtain an appropriate accumulation time according to the amount of incident light.

Regarding the operation of each part of the pond in each of the embodiments shown in FIGS. 8 and 9, the one in FIG.
The embodiment explained in the figure and the one in FIG.
Since they are the same as those of the embodiment explained in the figures,
Explanations are omitted to avoid redundant explanations.

As is clear from the description of each of the embodiments above, according to the photoelectric conversion device of the present invention, a predetermined level of the pixel output with the highest output potential from among the pixel outputs from a large number of photoelectric conversion elements can be achieved using a relatively simple configuration. Detect the timing when the
Since the structure is configured to control the end point of accumulation of the photoelectric output of each photoelectric conversion element according to the timing,
The accumulation time can be terminated when the accumulation state of the brightest pixel of the object image projected onto the photoelectric conversion element array consisting of a large number of photoelectric conversion elements reaches a predetermined constant level. Therefore, by setting the predetermined level to an appropriate level, an appropriate accumulation time can be obtained at all times regardless of changes in the shape or brightness of the object image.

[Brief explanation of drawings]

1 and 2 are schematic explanatory diagrams of storage time control means for photoelectric conversion elements in a conventional photoelectric conversion device, and FIG. 3 shows a light intensity distribution of a subject image to explain the difficulties in the conventional example. An example diagram, Figure 4 is an explanatory diagram of the conventional pond storage time control method, Figure 5
6 is a circuit configuration diagram showing an example of an embodiment of the present invention, FIG. 6 is a partial configuration diagram showing an example of timing detection means used in each embodiment of FIGS. 5 and 7, and FIGS. FIG. 9 is a circuit configuration diagram showing each different embodiment of the present invention. 6-1 to 6-N...Photoelectric conversion circuit 7-1 to 7-N...Photodiode 8-1 to 8-N...Capacitor 9-1 to 9-N...First gate 10 -1 to 10-N...first buffer 11-1 to 1
1-N...Second buffer 12-1 to 12-N...
- Diodes 13-1 to 13-N... Second gate 14... Charge signal input terminal 15 - °° monitor output terminal 16... Charge coupled device 18... Comparator 19... Resistor 20・・・
・Control circuit 21...Video output terminal 22-
1 to 22-N...Eighth gate 28-1 to 28-N.
・Holding capacitor 24 ・Shift register 25
．． 26...Buffer 27...Hold signal input terminal 28-1 to 28-N...Schmitt circuit 29...OR circuit v88...DC power supply positive side line DD...DC power supply negative side line Figure 1 Figure 2 Figure 3 Modification Element number Figure 4 A B Figure 5 Figure 6Ls 1 ' Figure 7 Figure 8 Figure 9 Procedural amendment ill Ill A 5 Peace Day 718 1 , Indication of the case 1982 Special, 1'1 Application No. 114.9 ■ (5 No. 2, Title of the invention' Photoelectric conversion device 3, person making the amendment Relationship to the case Patent applicant (037) - A Linbus Optics Kogyo Co., Ltd. 1 Specification No. 6
Correct r HL J in the 7th line of the page to "V," by 1. 2 r MOS FET J in the 8th line of page 10 of the same
hos FET 11. - Correct to IJ. 8. Corrected "saturation level" in the first line of page 12 to "saturation level," and changed "by gate 11-1" to "via gate 18-1" in the beginning of line 15 of the same page. correct. 4, page 19, line 15, “I 0-1-1 fl −
N----first buffer" and line 16 "1l
25.26---MOS FETs that constitute the buffer
Insert J. 5. Delete "25.26 --- Batsuhua" in the 6th line of page 20.

Claims (1)

[Scope of Claims] L A plurality of photoelectric conversion elements, means for accumulating photocurrent charges generated in each of the photoelectric conversion elements, and means for respectively obtaining an output corresponding to the amount of charge accumulated in each accumulation means. It consists of charge-voltage conversion means and means for detecting the timing when the maximum output among the outputs of these charge-voltage conversion means reaches a predetermined level. A photoelectric conversion device characterized in that it is configured to read out photocurrent charges accumulated in the means all at once. Hereinafter, the detection means detects the output of each charge voltage conversion means,
2. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion device is configured such that the signals are combined through diodes, and the combined signals are led to a comparator and compared with the predetermined level. & The detection means has a plurality of Schmitt circuits each receiving each output obtained by each of the charge voltage conversion means as an input and set to a threshold level corresponding to the predetermined level, and the output of each Schmitt circuit. 2. The photoelectric conversion device according to claim 1, further comprising an OR circuit that outputs the logical sum of . Claim 1, characterized in that the photocurrent charge read out simultaneously from each of the storage means is transferred to a de-energized pixel well of a charge-coupled device and extracted as a time-series signal. , the photoelectric conversion device according to item 2 or item 8. 5. A patent characterized in that the photocurrent charges read out all at once from each of the storage means are held in each holding capacitor, and are sequentially read out in a predetermined order as a voltage corresponding to the amount of charge. A photoelectric conversion device according to claim 1, 2, or 8.