JPS596617A - Digital-analog converter - Google Patents

Abstract

PURPOSE:To obtain a small-sized and highly accurate D/A converter by taking out an output current from a weighted current source through a CMOS circuit to execute switching operation complementally. CONSTITUTION:MOS FET Bo...BN are curent sources generating current having weight corresponding to binary numbers when turned on by control signals applied to respective gates. Signals SIGN, SIGN having reversed phases each other are inputted to the gates of two complementary circuits connected to the current sources. At this time, MOS FETs M1, M4 are turned on simultaneously. MOS FETs M1, M4 are turned on complementally to the MOS FETs M1, M4. Therefore, the polarity of current flowing into a load element coupled between the external terminals 0o, 01 is determined by the signal SIGN. AC driving can be available by connecting a load such as a speaker between the terminals 0o, 01.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to digital to analog converters, and more particularly to M
The present invention relates to a BTL (balanced transformerless) D/A (digital to analog) converter configured using OSFETs.

In the weighted current method σ)l)/A converter pc, a plurality of current sources each generating a current with a weight of 1, 2, 4, 8, etc., are provided, By operating these current sources in accordance with the respective digital inputs, a desired load current phase is obtained. The sum current is converted to voltage. That is, as shown in FIG. 1, the current is changed stepwise in response to the digital input.

An object of the present invention is to provide a small-sized and highly accurate digital-to-analog converter using MOSFETs. Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram of a D/A converter showing an embodiment of the present invention.

The D/A converter shown in FIG. 2 is a B1' L type CM.
It consists of an O8FET and a load current type current source. That is, a P-channel MO8FETM.

M! and N-channel MO8FETM3 and M4 each constitute the CMO8, and each has a switch function. In addition, N-channel MO8FETBo~B
constitutes a current source for obtaining an N-bit current ratio.

Each P channel 5lO8FET and each N channel MO
The 8FETs are formed on one semiconductor substrate using well-known CMO8 integrated circuit technology. The commonly connected drains of MO8FETM, and M are coupled to the external terminal OI of the integrated circuit, and similarly the commonly connected drains of MO8FETM, and M4 are coupled to external terminal 0. is combined with

External terminals O8 and 0. of the integrated circuit. A load element such as a speaker is coupled between .

The sources of MO8FETM and M2 are coupled to the power supply terminal Do, and the sources of MO8FETM and M are coupled to the reference potential point (earth point) of the circuit through MO8FETB0 to BN that constitute the current source. 1:3
are arranged so that, when each is turned on by a control signal applied to its respective gate, it produces a current with a weight, for example, corresponding to a binary number. Therefore.

MO8FETBo and BN are sized so that the following relationship holds true.

(W/L)B172・(W/L)B.

(W/L), N=2N・(W/L),.

However, W is the channel width and L is the channel length.

In the figure, MO8l'ETM, and M have their gates supplied with signal 5IGN, and similarly ILMO8FET
M and M4 are supplied with the signal 5IGN. Signals 5IGN and 5IGN are generated from a control circuit (not shown) configured as the same integrated circuit as the circuit in the same figure, and their high level is set to the level of the g power supply terminal vDD, and their low level is determined by the y circuit. Earth level will be destroyed. These two input signals 5IGN and 5I
Gl'J are also made out of phase with each other.

As a result, the illustrated MO8FETM and M4 are simultaneously turned on. MO8FETM2 and M.

is turned on complementary to MO8FETM1 and M.

Therefore, external terminal 0. The polarity of the current flowing through the load element coupled between O8 and O8 is determined by input signals 5IGN and 5ION.

The current that should flow between the external terminal O2 and 0° is determined by the constant current MO8FETBo, BN. This current between the terminals is a constant current MO8FETB.

It is zero if all of ~BN are in the off state. The inter-terminal current takes a value depending on the combination of on-states of MOSFEi'Bo to BN.

Therefore, the fundamental frequency is determined by the input signals 5IGN and 5IGN, and the constant current MO8FETB.

~ By appropriately changing the current level using the control signal applied to the gate of BN, it becomes possible to change the current between the output terminals with a waveform close to a y-sine wave, as shown by the solid curve in Figure 3, for example. .

According to this embodiment, a load element such as a speaker can be driven with alternating current using a single power source.

A voltage of a sufficient level can be applied between the gate and source of MO8FgTM and M2 as switching elements, and the on-resistance of these MOSFETs can be sufficiently reduced. Also MO8FgTQ
, and the on-resistance of O4 can also be reduced optically.

As a result, the level of the '1IIL current to be supplied to the load element is substantially unaffected by the on-resistance of the switch MO8FETM, ~M4, and the constant current MO8FETM
TBo, BN (the exact value that can be determined) Also, since the switches MO8FETM and ~M are complementary, the 'in2 applied to the load element is
x'il source voltage becomes a sufficiently large level.

The D/A converter of this embodiment is small in one dimension and has high precision.

The MOSFET used in the circuit of FIG. 2 may be either an enhancement type or a depletion type; however, in the case of a depletion type, it is necessary to turn it on and off at a voltage lower than the gate voltage .

As described above, according to the present invention, a small and highly accurate D/A converter can be realized, so that it can be implemented as an LSI and can be widely applied to communications and general consumer applications.

[Brief explanation of drawings]

Fig. 1 is a characteristic curve diagram of a D/A converter using a load control method, Fig. 2 is a configuration diagram of a D/A converter showing an embodiment of the present invention, and Fig. 3 is an operation of the circuit shown in Fig. 2. It is a characteristic curve diagram. M, ~M4, MO8FE'l'' for switch, B
o~BN... Current source for load current method, 0. ．． 0.・
...Output terminal, 5IGN, 51 (iN...Sine wave digital input.

Claims (1)

[Claims] a first circuit including a P-channel type first FET and an N-channel type second FE'r connected in series to the first FET; a P-channel type third FET; N-channel type fourth FET connected in series with the FET of
A second circuit including an ET and connected in parallel to the first circuit, and a load current type current source M that supplies a current of a value corresponding to the input signal to the first and second circuits.
O8FET, and the first and fourth FETs are connected to the second FET.
and a load means connected between a common connection point of the first and second FETs and a common connection point of the third and fourth FE'r by performing a switching operation complementary to the 30th FET. The digital circuit is characterized in that it is capable of supplying a signal whose current value is determined by the MO8FET for the current source and whose polarity is alternately changed.
analog converter.