JPS5962293A - Remote monitor control system - Google Patents

Abstract

PURPOSE:To prevent a duplicated address by detecting the assignment of the address at the level judge section of a main operating panel, when the same address is assigned to >=2 terminal devices in error by the main operation panel. CONSTITUTION:In transmitting information to a terminal device from the main operation panel 1, a start pulse, a terminal address and a control data are converted into a format at a transmission signal forming section 18 and the result is transmitted from a signal line driver circuit 17 to a line 2. If the main operation panel 1 transmits the information with the same address to K-set of terminal devices in error, R1-Rk are connected equivalently in parallel to a signal line 2 at the transmission of a return signal. Since the resistance values of the resistance R1-Rk are almost equal, the return current is almost K times as large as the current with no address duplication. Thus, when the level is compared with a prescribed reference level at signal level judge sections 221-22n, the number of terminal devices of the same address connected to the signal 2 is judged.

Description

[Detailed Description of the Invention] This device connects the main operation panel and the terminals of the main operation panel to each other via wires, and centralizes the load connected to each terminal on the main operation panel. +1 ill 1 (In addition to the remote monitoring system dII, the outputs of sensors 1j, switches, etc. that are completely connected to each terminal can be monitored from the main operation panel.
It's about systems.

Figure JV↓This is a lock diagram showing the configuration of a conventional remote monitoring system. 3) ... is connected to the main operation panel (1) and each
：I send and receive the i= issue on 1-11 with iJ end rally 31... and perform remote communication.

Each terminal (3)... has a unique address set therein. Since the address Q is used to identify each terminal (3)..., the Q
, L, terminal devices (3), etc. having the same address are never connected. At the time of construction, the address setting of the terminal device (3)...>j! If you operate the switch incorrectly, the same address may be assigned to two or more terminals (3)..., and in such a case, the return from the terminal (3)... Since the signal timing υ is chained, return it correctly 1
There was a problem that it was not possible to identify the number δ.

In order to solve this problem of JVI Kenmei example of misfiring, A-a Re/Komono is installed, and the main operation panel is used to monitor and control +41 and 71. The same a1 on the yi61 terminal of the 1i7 number
4°response has been reassigned 1. The purpose of this project is to provide a remote monitoring system (1.

The configuration of the ten-dimensional element j411J will now be described with reference to the illustrated embodiment. The overall configuration of an embodiment of the 2nd +, 'jl it misfire 1 size is shown. Main operation panel il+
is operated by the electric power from the electric light line (5) which is branched off from the distribution board (4), and the electric power from the shore line (5) is used to drive the load (6)... As the +li force of -, it is drawn into each terminal (31) l (21...!).On the other hand, each terminal P',, (3□) (32)...
- Full-wave rectifies the 1, A' ``J Iu power sent from the main operation panel (3) via the signal line (2) by time division multiplex transmission method and uses it as a power source for its own production Ir1lJ. , This signal itself is read and the load (6) is controlled. (7) Monitored equipment such as a screwdriver or switch, and its output is sent to the terminal (3a) for all valves. The signal is sent back to the main operation panel f+1 as a monitoring signal.

Each of the terminal devices (31), (32), etc. has the same configuration, and is arranged as shown in the block diagram of FIG. In Figure 3, (8) is a diode bridge that full-wave rectifies the signal power sent from the main operation panel +11 via line 1g (2), and the output voltage of this diode bridge (8) is the power supply. It is smoothed by a large capacity capacitor V provided in the circuit (9), and the electric bullet input terminal VDD% (y N
It is input to D. (10 is a waveform shaping circuit, which shapes the voltage on the 1st line (2) and outputs the terminal logic IC1.
The signal is manually input to the signal input terminal So of 101. On the main line (2), time-division multiplexed transmission signals as shown in FIG. 4 are transmitted from the main operation panel (1) to each terminal (3) K. In this signal, a wide pulse represents a logic value "1", and a narrow pulse represents a logic value "1".
In order to select a wide pulse as a start pulse and a 1-pit pulse with a logical value of 1 for each terminal device (3), it is necessary to select a pulse with a logic value of 1. 8-bit address data AD, 1-bit address parity A
P, 1-pit pulse of logic 1 direct "1", 5-bit control Q (I data CD, 1-pit control data parity CP1 waiting for return signal) that sets the control content in the called terminal (3) All the long pulses corresponding to the period of 5 to 6 pits are sequentially arranged in series and are sent out repeatedly to each address mother one after another. (3) The terminal logic IC (as described above) receives the signal on the Fj liJ line (2) through the waveform shaping circuit (l), and converts the data contents of the address data AD into an address. Setting switch (12
), and when it is determined that it is calling itself, the contents of the control Ill data CD are output to the full control output terminal (13), and a signal input to the monitoring input terminal (14) is output. Parallel to serial conversion and return signal output terminal (1
5). However, the control output terminal (1
The control data CD outputted to 3) is used as control data for the load (6) provided in each terminal (3), and the monitoring input terminal 04) is used to control the load (6) provided in each terminal (3). The output of the device (7) is input. Furthermore, the return signal output to the return signal output terminal 06) is manually input to the base of the transistor (1G).
By turning on and off the transistor OQ during the long pulse sending period from the main operation panel (1), the signal line (2) is short-circuited via the resistor R, and the return signal is sent to the main operation panel i in current mode.
It is sent back to the l+ side.

FIGS. 5(a) to 5(c) show an example of such a return, where the 1st bit to the 5th bit are monitoring data, and the 6th bit C is an odd parity. Figure 5 (
a) is a terminal device (3
Fig. 5(b) shows a return signal R6 sent back in the ammeter mode from the terminal (3, n) to which the same address was incorrectly assigned. It shows that the returned item No. 1g is being sent back. Figure 5(c) is the fifth
The return signal Rn shown in FIGS. 5(a) and 5(b) is originally a return signal Rmn when received at the same timing j on the main operation panel. See ~(c).As is clear, return 16
No. R61-(10001J is return number 1<, nr 10
1+1 (11J), and the odd parity is also a correct value, so if you look only at the logical value, you will not be able to distinguish between 4nJ and 4nJ that the addresses of the terminal device (3) overlap. is the main operation panel (1)
is configured as shown in FIG. 6, and by checking the current level of the return signal, it is possible to determine whether or not the P1z responses of the terminal device (3) are duplicated.

In FIG. 6, 07) is a helix driver circuit, and the transmission 1i-! ``Depending on the output of the Irr generation unit (18), connect the signal line (2) to the non-grounded side?
By driving lE in the negative direction, a bipolar signal of ±24V is output as shown in the waveform diagram of FIG. Equal to 1 + line (2) 4 to earth 11 (+l +J v:
L return 'Po, current detection unit (grounded via resistor γ of 1111. This resistor γ has a sufficiently low resistance value, so that the influence of the 1u pressure drop on the signal line (2) is small. The output of the return current detection section (19) is the absolute value amplification section 1.
．． 2()), the signal is converted into an absolute value signal, further amplified to a required level in the amplification and waveform shaping section 121), and subjected to wave +V shaping.

waveform-shaped signal e'', level determination section (221) to (
22n) with a predetermined reference level, and the signal line (
It is possible to determine the number of terminal devices (3) with the same address connected to the terminal device (2). The output from the waveform shaping section is converted to a D-thick level by the level converting section (4), which is input to the reception signal processing section threshold and sent back.
It is now identified as Figure 7 shows the principle of operation of the main sender.For example, if terminal devices (3) with the same address are connected to the signal line (2) in duplicate, At the time of last transmission, the resistors R0 to Rk are connected in parallel to the wire (2) under the equality constraint. Therefore, assuming that the resistance values of the resistors R1 to Rk are approximately equal, the return current is The size is almost twice that of the case where addresses do not overlap. Therefore, when the return current is equal to twice the normal value (K=1,...,n), the level determination section (221) of the main operation panel (1)
) to (22k) become H level, and the outputs of the other level determination units (+1 to 22) to (22n) become 15 level.
(31 is 11゛) You can easily know whether the connection is complete by going to the bottom of the cart or not.If you want to check if the address is nr loose or not, please check the level publication section (221
) and (222) are sufficient.

The present invention is configured as described above, in which the main operation panel and the multiple terminals are connected to each other via a pair of iE+ lines, and the address (for example, iK”
J and jlil1 data 1. □Long pulse No. 18 for waiting for return and 3I Tobeta No. 18 on the electric line 1 are cyclically transmitted for each address, and the P address on the 1st line is sent to the '6afiJ end device. +1ill (all output means Then, during the period of 1 pulse for waiting for return, the supervisory signal 1 is output by shortening the signal line through the same resistor.
．． A monitoring information return means for sending J as a return current to the main operation panel side is provided, and the main operation panel has a return current detection means for detecting the return current from each terminal device, and the return current detection means Since the system is equipped with a bell judgment unit that judges the thickness of the return current, even if the same address is assigned to two or more terminals by mistake, the level judgment unit provided on the main operation panel By determining whether the return current '4 is greater than the return current for one terminal device, Atlus can easily know the existence of duplicate terminal devices. There is an advantage that R1ir1 can be prevented. In addition, if you tell the L/bevel 1Jw section to determine whether the thick return current corresponds to one terminal device, you can accurately determine the number of devices with duplicate addresses. , which is convenient.

[Brief explanation of drawings]

Fig. 1 is a diagram of a conventional Nozulock, Fig. 2 is a block diagram showing the overall configuration of an embodiment of Motomotobiki, Fig. 3 is a block diagram showing the configuration of the same terminal device, and Fig. 4 is the same as above. Figures 5(a) to (c) are waveform diagrams showing the small current waveforms of the return current of the same as above, and Figure 6 shows the configuration of the main operation panel of the same as above. The circuit diagram, FIG. 7, is an equivalent circuit diagram showing the operating principle of the present invention. (1) is the main operation panel, +21t, No. 1:15 a, 13) is the terminal, +101 is the terminal logic IC, 112! is the address setting switch, (13) is the control output terminal, (+4j is the monitoring input terminal, (151 is the return signal output terminal, (19)
is a return current detection section, and (221) to (22n) are level control sections. Agent Patent Attorney Ishi 1) Choshichi

Claims (1)

[Claims] +l+ Connect the main operation panel and multiple terminals to each other with a pair of signal lines, and send mail from the main operation panel to each terminal to send AT1NOS and control data. Transmits a signal in series with a signal and a pulse signal for waiting for return to each address h; and connects a line to each terminal.
2nd address i+: + rAn atus judgment means that compares it with its own address, and a fu control output that generates a control III force according to the address enlightenment 1'-9 (when Q 1lill 1illll data 1, 1) During the period of the long pulse signal for return standby, the monitoring signal is returned to the main operation panel side as a return current by short-circuiting the f-; A monitoring signal/return means is provided, and each ☆; return current detection means for detecting the return current of the M-terminal Rally is provided, and the magnitude of the return current detected by the return current detection means is provided. 1. A remote monitoring and control system comprising: a level determining section for determining a level.