JPS5961643U - receiving device - Google Patents

receiving device

Info

Publication number
JPS5961643U
JPS5961643U JP15580382U JP15580382U JPS5961643U JP S5961643 U JPS5961643 U JP S5961643U JP 15580382 U JP15580382 U JP 15580382U JP 15580382 U JP15580382 U JP 15580382U JP S5961643 U JPS5961643 U JP S5961643U
Authority
JP
Japan
Prior art keywords
receiving device
amplifier
outputs
pulse modulated
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15580382U
Other languages
Japanese (ja)
Inventor
西沢　隆彦
檀田　正博
小谷野　隆
繁夫 中村
Original Assignee
八木アンテナ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 八木アンテナ株式会社 filed Critical 八木アンテナ株式会社
Priority to JP15580382U priority Critical patent/JPS5961643U/en
Publication of JPS5961643U publication Critical patent/JPS5961643U/en
Pending legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の受信装置を示す回路構成図、第２図はこ
の考案の一実施例に係る受信装置の要部を示す回路構成
図である。 １１・・・増幅器、１２・・・検波器、１３，１６゜１
９・・・ＮＰＮトランジスタ、１４．１７．１８，２３
゜２Ｂ、２９．３０・・・抵抗、１５・・・電灯線、３
１・・・ＡＧＣ回路。FIG. 1 is a circuit diagram showing a conventional receiving device, and FIG. 2 is a circuit diagram showing a main part of a receiving device according to an embodiment of the invention. 11...Amplifier, 12...Detector, 13,16゜1
9...NPN transistor, 14.17.18,23
゜2B, 29.30...Resistance, 15...Light line, 3
1...AGC circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電灯線を利用し、パルス変調波を送信するシステムに用
いられ不受信装置において、入力信号を増幅出力する増
幅器と、この増幅器の出力を検波出力する検波器と、前
記入力信号としてパルス変調波と共に雑音信号が入力し
た場合、当該雑音信号の検波電圧により前記増幅器の利
得を制御する自動利得制御回路とを具備したことを特徴
とする受信装置。A non-receiving device used in a system that transmits pulse modulated waves using electric power lines includes an amplifier that amplifies and outputs an input signal, a detector that detects and outputs the output of this amplifier, and a pulse modulated wave as the input signal. A receiving device comprising: an automatic gain control circuit that controls the gain of the amplifier based on a detection voltage of the noise signal when a noise signal is input.
JP15580382U 1982-10-15 1982-10-15 receiving device Pending JPS5961643U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15580382U JPS5961643U (en) 1982-10-15 1982-10-15 receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15580382U JPS5961643U (en) 1982-10-15 1982-10-15 receiving device

Publications (1)

Publication Number Publication Date
JPS5961643U true JPS5961643U (en) 1984-04-23

Family

ID=30343989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15580382U Pending JPS5961643U (en) 1982-10-15 1982-10-15 receiving device

Country Status (1)

Country Link
JP (1) JPS5961643U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5121415A (en) * 1974-08-15 1976-02-20 Mitsubishi Electric Corp DENRYOKUSENRYOHANSOSOCHINO SOSHINKAIRO
JPS5139416B1 (en) * 1971-07-14 1976-10-27

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5139416B1 (en) * 1971-07-14 1976-10-27
JPS5121415A (en) * 1974-08-15 1976-02-20 Mitsubishi Electric Corp DENRYOKUSENRYOHANSOSOCHINO SOSHINKAIRO

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