JPS5961150A - Resin seal type semiconductor device - Google Patents
Resin seal type semiconductor deviceInfo
- Publication number
- JPS5961150A JPS5961150A JP17125782A JP17125782A JPS5961150A JP S5961150 A JPS5961150 A JP S5961150A JP 17125782 A JP17125782 A JP 17125782A JP 17125782 A JP17125782 A JP 17125782A JP S5961150 A JPS5961150 A JP S5961150A
- Authority
- JP
- Japan
- Prior art keywords
- package
- heat sink
- semiconductor device
- heat dissipation
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
（１） 発明の技術分野
本発明は樹脂封止型ＩＣパ・７ケージに係り、特にヒー
トシンクをパンケージと一体的に形成して放熱効率を高
めた半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a resin-sealed IC package, and particularly to a semiconductor device in which a heat sink is integrally formed with the pan cage to improve heat dissipation efficiency.
（２） 技術の背景
近年、ワンチップマイコン等のＩＣが例えば自動車、ビ
デオ等の比較的密閉された空間でも使用されるようにな
って来ている。しかし、係る場所での使用では、相当劣
悪な環境条件１例えば振動。(2) Background of the Technology In recent years, ICs such as one-chip microcomputers have come to be used in relatively closed spaces such as automobiles and video cameras. However, when used in such locations, there are considerably poor environmental conditions such as vibration.
高温等によるｌｃへの影響は等閑に付せない程に至って
いる。The influence of high temperatures etc. on LC has reached such a level that it cannot be ignored.
（３） 従来技術と問題点
従来ワンチップマイコン等にお４ノるチップの動作時の
発熱を抑えるために例えば放熱板を設けてチップの表面
温度を低減させたり、或いは例えばＣＰＵモジュール等
ではアルミダイキャストのヒートシンクを取付りて放熱
効果を図る等の対策が行なわれてきた。また５例えば第
１図の如くＤＩＰパンケージ１を形成後に別に形成した
ヒートシンク２を接着剤３等で後付けするという方法も
行なわれているが、コスト的に高くしかも接着剤等を使
用するために熱伝導率が低下した放熱効果も悪くなる等
の問題を有している。(3) Conventional technology and problems Conventional one-chip microcomputers, etc., have had four chips. In order to suppress the heat generated during operation, for example, a heat sink has been installed to reduce the surface temperature of the chip, or for example, in CPU modules, aluminum has been used. Countermeasures have been taken, such as installing die-cast heat sinks to improve heat dissipation. 5 For example, as shown in Fig. 1, after forming the DIP pancage 1, a separately formed heat sink 2 is attached afterwards with adhesive 3, etc., but this method is expensive and requires high heat resistance due to the use of adhesive. There are problems such as a decrease in conductivity and poor heat dissipation effect.
（４） 発明の目的
本発明の目的は、上記従来の欠点に鑑み、プラスチック
モールドによりパッケージのキャップ部を形成する際に
、前記パンケージのキャップ部に溝状の凹部若しくは山
伏の凸部を複数形成してヒートシンクを構成し、パッケ
ージと一体化させた樹脂封止型半導体装置を形成するこ
とによって放熱効率の良いヒートシンクモールドの半導
体装置を容易に、且つ大量で低コストにて提供すること
にある。(4) Object of the Invention In view of the above-mentioned conventional drawbacks, an object of the present invention is to form a plurality of groove-shaped recesses or protrusions in the cap portion of the pan cage when forming the cap portion of the package using a plastic mold. To easily provide heat sink molded semiconductor devices with good heat dissipation efficiency at low cost and in large quantities by forming a heat sink and forming a resin-sealed semiconductor device integrated with a package.
（５） 発明の構成
本発明の特徴とするところは、放熱用凹凸部がパッケー
ジと一体的に形成されてなることを特徴とする樹脂封止
型半導体装置を提供することによって達成される。(5) Structure of the Invention The characteristics of the present invention are achieved by providing a resin-sealed semiconductor device characterized in that a heat dissipating uneven portion is formed integrally with a package.
（６） 発明の実施例 本発明の実施例について以下図面を用いて説明する。(6) Examples of the invention Embodiments of the present invention will be described below with reference to the drawings.
第２図（８１乃至（Ｃ１は本発明の一実施例を用いたヒ
ートシンクモールドＤＩＲパンケージの正面図。FIG. 2 (81 to (C1) is a front view of a heat sink mold DIR pancake using one embodiment of the present invention.
平面図、側面図を各々示す。A plan view and a side view are shown respectively.
第２図におい一乙 ＤＩＰパッケージ１はヘ−ス部４と
キヤ・ツブ部５とその間にピン６が設けられて一体とな
されている。また、同キャップ部５の」二部はヒートシ
ンク２を形成しており、該ヒートシンク２には例えば直
線−ヒの深い溝７がＤＩＲパッケージ１の区手方向に平
行に複数段りられでいる。In FIG. 2, a DIP package 1 is integrally formed with a base portion 4, a cap portion 5, and a pin 6 provided therebetween. Further, the second part of the cap part 5 forms a heat sink 2, and the heat sink 2 has, for example, a plurality of deep grooves 7, which are straight-line and horizontal, parallel to the lateral direction of the DIR package 1.
例え４；Ｊ４． Ｄ Ｉ ＋）パッケージの樹脂封止
型半導体装置の製造」−程において、ＤＩＲパッケージ
１の上部すなわちキャンプ部５を金型を用いて樹脂封止
にて成形する際に、係る金型に溝を予め形成しておいて
プラスチイック樹脂等を投入してパノケ〜ジのキャップ
部５を形成することによって放熱用の凹凸部を有するヒ
ートシンクをパッケージと一体的に樹脂封止により形成
されたモールドＤｒＰパッケージを提供できる。Example 4; J4. DI +) Manufacture of a resin-sealed semiconductor device in a package - When molding the upper part of the DIR package 1, that is, the camp part 5, by resin sealing using a mold, a groove was formed in the mold. A molded DrP package in which a heat sink having uneven parts for heat dissipation is integrally formed with the package by resin sealing by forming the cap part 5 of the pano cage by filling plastic resin etc. in advance. can be provided.
なお、第３図（ａｌ、 （ｂｌにおいて、一般に同−領
域へにおける表面積Ｓの大きさは、溝７が深い程また溝
の数が多い程大きくなることは明らかであり。In addition, in FIG. 3 (al, (bl), it is clear that the size of the surface area S in the same region generally increases as the groove 7 becomes deeper and as the number of grooves increases.
従って第３図［ａ）、 ｆｂｌの各々の表面積Ｓａ、Ｓ
ｂはＳａ＜Ｓｂ
である。また、一般的に放熱効果と表面積との間には比
例関係が有ることも周知であり、第３図（ａ）。Therefore, in Fig. 3 [a], each surface area of fbl is Sa, S
b satisfies Sa<Sb. It is also well known that there is generally a proportional relationship between heat dissipation effect and surface area, as shown in FIG. 3(a).
（ｂｌでの各々の放熱効果Ｈａ、ＨｂもＨａ ＜ Ｈｂ となることは明らかである。(Each heat dissipation effect Ha, Hb at bl is also Ha < Hb It is clear that
従って、限られた領域での効果的な放熱を行うためには
なるべく溝（若しくは山）の数が多く。Therefore, in order to effectively dissipate heat in a limited area, the number of grooves (or ridges) should be as large as possible.
且つ深い（若しくは高い）ヒートシンクを形成すること
が必要である。It is also necessary to form a deep (or tall) heat sink.
第４図（８１及び（ｂｌは１本発明の他の実施例を用い
たヒートシンクモールトパノケージの平面図及び側面図
である。FIGS. 4A and 4B are a plan view and a side view of a heat sink mold panocage using another embodiment of the present invention.
第４１１！ｌにおい”乙第２図と同一部分には同一符号
をイλ］して重複説明は略す。411th! Parts that are the same as those in Figure 2 are designated by the same reference numerals, and redundant explanations will be omitted.
１） Ｉ Ｐパッケージの樹脂封止型半導体装置の製造
工程においで、Ｉ］ＩＰパッケージ１の上部ずなわらキ
ャップ部５を金型を用いて成形する際に。1) In the manufacturing process of a resin-sealed semiconductor device of an IP package, I] When molding the upper straw cap portion 5 of the IP package 1 using a mold.
係る金型の溝を金型の短手方向に対して平行に形成して
、プラスチック樹脂等を投入してパッケージキャップ部
５を形成することによって短手方向に溝７を有するヒー
トシンクモールドＤＩＰパッケージが形成される。A heat sink mold DIP package having grooves 7 in the widthwise direction can be obtained by forming grooves in the mold parallel to the widthwise direction of the mold, and forming the package cap part 5 by charging a plastic resin or the like. It is formed.
第５図は本発明のもう１つの実施例のヒートジンクモ〜
ルトバソケージの平面図である。FIG. 5 shows a heat zinc spider according to another embodiment of the present invention.
FIG. 3 is a plan view of the base cage.
第５図中、第２図、第４図と同一部分には同一符号を付
して重複説明は略す。In FIG. 5, the same parts as in FIGS. 2 and 4 are given the same reference numerals, and redundant explanation will be omitted.
第５図において、凹凸の構成は長手方向及び短手方向に
対して何れも部分的に平行となるように組み合せて形成
しである。In FIG. 5, the concavities and convexities are formed in combination so that they are partially parallel to both the longitudinal direction and the transverse direction.
以上の如くヒートシンクを成す溝の構成は１例えばパッ
ケージの長平方向に平行でも、短毛方向に平行でも或い
は任意の°方向でも可能である。金型を用いたプラスチ
ックモールドによる一体化されたパンケージを提供する
ために１例えば側面部に溝を有するヒートシンクでも金
型を用いたプラスチックモールドによる一体化されたパ
ッケージを形成できるのであれば勿論ヒートシンクを有
するパッケージとして提供可能である。As described above, the grooves constituting the heat sink can be configured to be parallel to the long direction of the package, parallel to the short direction of the package, or in any direction. To provide an integrated pan cage using a plastic mold using a metal mold 1. For example, if a heat sink with grooves on the side surface can be formed into an integrated package using a plastic mold using a metal mold, then of course a heat sink can be used. It can be provided as a package with
（７） 発明のす１果
以上１本発明を用いれば、単にパッケージキャップ形成
のための金型に加工を施して溝を形成して用いるのみで
、ヒートシンクを一体化して有するプラスチックモール
ドの樹脂封止型半導体装置が形成できるために容易に、
また人量且り垂コス１−で放熱効果の高い半導体装置を
得ることが可能である。(7) At least one result of the invention If the present invention is used, a mold for forming a package cap can be simply processed to form a groove, and a plastic mold having an integrated heat sink can be resin-sealed. It is easy to form a fixed type semiconductor device.
Furthermore, it is possible to obtain a semiconductor device with high heat dissipation effect with a small number of people and a cost of 1 -.
第１図は従来のＤＩＰパッケージにヒートシンりを接着
剤で取付けた半導体装置の正面図、第２図［８１乃至（
Ｃ）は本発明のヒートシンクモールドＤＩＰパッケージ
のそれぞれ正面図、平面図、側面図、第３図（ａｌ及び
（ｂ）ばヒートシンクを構成する谷溝の比較、第４図（
ａｌ及び（ｂｌは本発明の他の実施例の平面図及び側面
図、第５図は本発明のもう１つの実施例の平面図である
。
１・・・ＤＩＰパッケージ、 ２・・・ヒートシンク
、 ３・・・接着剤、 ４・・・ヘース部、
５・・・キャンプ部、 ７・・・溝。
第３図
）−−−Ａ −、、−、−＠
（ａ） （ｂ）
第５図Figure 1 is a front view of a semiconductor device in which a heat sink is attached with adhesive to a conventional DIP package, and Figure 2 [81 to (
C) shows a front view, top view, and side view of the heat sink molded DIP package of the present invention, FIG. 3 (al) and FIG.
al and (bl are a plan view and a side view of another embodiment of the present invention, and FIG. 5 is a plan view of another embodiment of the present invention. 1... DIP package, 2... Heat sink, 3... Adhesive, 4... Heath part,
5...camping club, 7...ditch. Figure 3) ---A -,, -, -@ (a) (b) Figure 5
Claims (1)
ことを特徴とする樹脂封止型半導体装置。1. A resin-sealed semiconductor device characterized in that a heat dissipating uneven portion is formed integrally with a pan-no-gage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17125782A JPS5961150A (en) | 1982-09-30 | 1982-09-30 | Resin seal type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17125782A JPS5961150A (en) | 1982-09-30 | 1982-09-30 | Resin seal type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5961150A true JPS5961150A (en) | 1984-04-07 |
Family
ID=15919963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17125782A Pending JPS5961150A (en) | 1982-09-30 | 1982-09-30 | Resin seal type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5961150A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5195023A (en) * | 1991-12-23 | 1993-03-16 | At&T Bell Laboratories | Integrated circuit package with strain relief grooves |
| JPH0798195A (en) * | 1993-08-25 | 1995-04-11 | Internatl Business Mach Corp <Ibm> | Cooling module |
| NL1005780C2 (en) * | 1997-04-09 | 1998-10-12 | Fico Bv | Method and cover element for encapsulating electronic components. |
-
1982
- 1982-09-30 JP JP17125782A patent/JPS5961150A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5195023A (en) * | 1991-12-23 | 1993-03-16 | At&T Bell Laboratories | Integrated circuit package with strain relief grooves |
| JPH0798195A (en) * | 1993-08-25 | 1995-04-11 | Internatl Business Mach Corp <Ibm> | Cooling module |
| NL1005780C2 (en) * | 1997-04-09 | 1998-10-12 | Fico Bv | Method and cover element for encapsulating electronic components. |
| WO1998045878A1 (en) * | 1997-04-09 | 1998-10-15 | Fico B.V. | Method and covering element for encapsulating electronic components |
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