JPS5959046U - Television broadcast signal discrimination circuit - Google Patents
Television broadcast signal discrimination circuitInfo
- Publication number
- JPS5959046U JPS5959046U JP15475682U JP15475682U JPS5959046U JP S5959046 U JPS5959046 U JP S5959046U JP 15475682 U JP15475682 U JP 15475682U JP 15475682 U JP15475682 U JP 15475682U JP S5959046 U JPS5959046 U JP S5959046U
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- division ratio
- carrier wave
- frequency division
- detection output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Circuits Of Receivers In General (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はこの考案の一実施例を示す構成説明図、第2図
は第1図のAFT回路の出力特性図、第3図は第1図の
コントロール回路を具体的に示す構成説明図、第4図は
第3図の回路の動作を説明するのに示したフローチャー
ト、第5図a、 −b、、 cも第3図の回路の動作
を説明するのに示した出力 ′信号波形図である
。−
11・・・電圧制御発振器、12・・・プログラマブル
分周器、17・・・コントロール回路、22・・・AF
T回路、35・・・中央演算処理装置(cpu)、36
・・・リードオンリーメモリ(ROM)、37・・・演
算回路、40・・・クロックパルス発生回路、41・・
・速度切換/17 /16
□
第2図
VAFT
J−−+−」と−一一一
−−゛FIG. 1 is a configuration explanatory diagram showing one embodiment of this invention, FIG. 2 is an output characteristic diagram of the AFT circuit of FIG. 1, and FIG. 3 is a configuration explanatory diagram specifically showing the control circuit of FIG. 1. Figure 4 is a flowchart shown to explain the operation of the circuit in Figure 3, and Figures 5a, -b, and c are also output signal waveform diagrams shown to explain the operation of the circuit in Figure 3. It is. - 11... Voltage controlled oscillator, 12... Programmable frequency divider, 17... Control circuit, 22... AF
T circuit, 35... central processing unit (cpu), 36
...Read only memory (ROM), 37... Arithmetic circuit, 40... Clock pulse generation circuit, 41...
・Speed switching /17 /16 □ Figure 2 VAFT J−−+−” and −111−−゛
Claims (2)
のチャンネルの映像搬送波及び音声搬送波の両方の存在
を検出することによって選局完了状態とされるように、
選局動作中に動作する前記映像搬送波及び音声搬送波の
確認手段を備えたことを特徴とするテレビジョン放送信
号判別回路。(1) So that the tuning operation of one channel by the tuning means is brought to a tuning completion state by detecting the presence of both the video carrier wave and the audio carrier wave of that channel.
A television broadcast signal discriminating circuit characterized by comprising a means for confirming the video carrier wave and the audio carrier wave, which operates during a channel selection operation.
制御端に分周比データを加えることによって、電圧制御
発振器の発振周波数を可変する二とのできる位相ロック
ループと、前記電圧制御発振器の発振出力が加えられる
混合器とを少′なくとも具備し、 前記映像搬送波及び音声搬送波の確認手段は、□゛
前記混合器から得られた出力が入力され、この入力され
るべき中間周波が規定の周波数以下であれば第1の検出
出力、規定の周波数よりも高ければ第2の検出出力を得
る自動ファインチューニング回路と、 チャンネル指定のための選局データが入力されることに
よって、指定チャンネルの放送規格周波数よりも低い周
波数受信状態となるような前記分周比データを発1し前
記プログラマブル分周器の分周比制御端に加える第1の
手段と、この第1の手段によって発生された分周比デー
タを、プリセッタブルアップダウンカウンタにプリセッ
トして、前記分周比制御端におけるデータ値を可変する
第2の手段と、 この第2の手段のデータ値可変によって、前記自動ファ
インチューニング回路から、前記第一 1の検出出力
が得られ、さらに第2の検出出力が得られることを検出
する第3の手段と、柔の第3の手段によって前記第2の
検出出力が検出されたときに、前記指定チャンネルの音
声搬送波が存在する周波数への受信状態となるように前
記プログラマブル分周器の分周比制御端子に加えている
分周比データを変更する第4の手段と、 この第4の手段によって設定された受信結果、前記自動
ラアインチューニング回路から前記第2の検出出力が存
在するときのみ前記第3の手、段が第2の検出出力を得
たときにおける分周比データに前記分周比制御端のデー
タを戻し、前記第2の検出出力が得られなくなるまで前
記プリセッタブルアップダウンカウンタを今までとは逆
方向に制御する第5の手段とを具備したことを特徴とす
る実用新案登録請求の範囲第1項記載のテレビジョン放
送信号判別回路。(2) The tuning means includes a phase-locked loop that can vary the oscillation frequency of the voltage-controlled oscillator by adding division ratio data to a division-ratio control end of the programmable frequency divider, and the voltage-controlled oscillator. and a mixer to which the oscillation output of the oscillator is added, and the means for confirming the video carrier wave and the audio carrier wave includes:
Automatic fine tuning in which the output obtained from the mixer is input, and if the intermediate frequency to be input is below a specified frequency, a first detection output is obtained, and if it is higher than the specified frequency, a second detection output is obtained. and a circuit that, upon input of channel selection data for channel designation, emits the frequency division ratio data such that the frequency reception state is lower than the broadcasting standard frequency of the designated channel, and divides the frequency division ratio of the programmable frequency divider. a first means for applying the frequency division ratio data to the frequency ratio control terminal; and a first means for presetting the frequency division ratio data generated by the first means in a presettable up/down counter to vary the data value at the frequency division ratio control terminal. and a third means for detecting that the first detection output and the second detection output are obtained from the automatic fine tuning circuit by varying the data value of the second means. and a frequency division ratio of the programmable frequency divider such that when the second detection output is detected by the flexible third means, the reception state is set to the frequency at which the audio carrier wave of the specified channel is present. a fourth means for changing the frequency division ratio data applied to the control terminal; The third means and stage return the data of the frequency division ratio control terminal to the frequency division ratio data at the time when the second detection output was obtained, and the presettable up/down counter is operated until the second detection output is no longer obtained. The television broadcast signal discriminating circuit according to claim 1, further comprising fifth means for controlling in a direction opposite to the previous one.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15475682U JPS5959046U (en) | 1982-10-13 | 1982-10-13 | Television broadcast signal discrimination circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15475682U JPS5959046U (en) | 1982-10-13 | 1982-10-13 | Television broadcast signal discrimination circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5959046U true JPS5959046U (en) | 1984-04-17 |
Family
ID=30341994
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15475682U Pending JPS5959046U (en) | 1982-10-13 | 1982-10-13 | Television broadcast signal discrimination circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5959046U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6370759U (en) * | 1986-10-27 | 1988-05-12 |
-
1982
- 1982-10-13 JP JP15475682U patent/JPS5959046U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6370759U (en) * | 1986-10-27 | 1988-05-12 |
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