JPS5958953U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5958953U
JPS5958953U JP15559182U JP15559182U JPS5958953U JP S5958953 U JPS5958953 U JP S5958953U JP 15559182 U JP15559182 U JP 15559182U JP 15559182 U JP15559182 U JP 15559182U JP S5958953 U JPS5958953 U JP S5958953U
Authority
JP
Japan
Prior art keywords
envelope
semiconductor element
connection means
control terminal
electrically connected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15559182U
Other languages
Japanese (ja)
Inventor
誠 門脇
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP15559182U priority Critical patent/JPS5958953U/en
Publication of JPS5958953U publication Critical patent/JPS5958953U/en
Pending legal-status Critical Current

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Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電力用平型サイリスタの構造を示す断面
図、第2図及び第3図は上記サイリスタに外部リードを
取付ける方法を示す図、第4図はこの考案の一実施例に
係るゲート端子及びゲートリードの構造を示す斜視図、
第5図は上記ゲート端子及びゲートリードを電力用平型
サイリスタに取付けた状態を示す側面図である。 21・・・ゲート端子、22・・・ゲートリード、23
.24,25,26・・・突出片、27・・・孔、2B
・・・接続子、29・・・突起、30・・・外囲器、3
2・・・アルミニウム線。
Figure 1 is a sectional view showing the structure of a conventional power flat thyristor, Figures 2 and 3 are diagrams showing how to attach an external lead to the thyristor, and Figure 4 is a diagram showing an embodiment of this invention. A perspective view showing the structure of a gate terminal and a gate lead,
FIG. 5 is a side view showing the gate terminal and gate lead attached to the power flat thyristor. 21... Gate terminal, 22... Gate lead, 23
.. 24, 25, 26... Projecting piece, 27... Hole, 2B
...Connector, 29...Protrusion, 30...Envelope, 3
2...Aluminum wire.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 外囲器と、この外囲器内に収納された制御電極を有する
半導体素子と、その両端部が前記外囲器の内壁及び外壁
から突出するように前記外囲器に固定され、その内側端
部が金属線を介して前記半導体素子の制御電極に電気的
に接続されると共にその外側端部に機械的連結手段を有
する制御端子と、このル制御端子の機械的連結手段に対
応した連結手段を有し、前記制御端子に電気的に接続さ
れかつ機械的に結合される外部リードとを具備したこと
を特徴とする半導体装置。
an envelope; a semiconductor element having a control electrode housed in the envelope; fixed to the envelope so that both ends of the semiconductor element protrude from an inner wall and an outer wall of the envelope; a control terminal whose portion is electrically connected to the control electrode of the semiconductor element via a metal wire and has a mechanical connection means at its outer end; and a connection means corresponding to the mechanical connection means of the control terminal. and an external lead electrically connected to and mechanically coupled to the control terminal.
JP15559182U 1982-10-14 1982-10-14 semiconductor equipment Pending JPS5958953U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15559182U JPS5958953U (en) 1982-10-14 1982-10-14 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15559182U JPS5958953U (en) 1982-10-14 1982-10-14 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS5958953U true JPS5958953U (en) 1984-04-17

Family

ID=30343591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15559182U Pending JPS5958953U (en) 1982-10-14 1982-10-14 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5958953U (en)

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