JPS5953725B2 - receiving device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiving device capable of performing preset tuning.

Conventionally, this type of receiving frequency device has only one storage device for storing the receiving frequency, which causes the following problems.

For example, if multiple people separately store and preset the frequencies of their own selected broadcasting stations in a single storage device, then at the time of reception, they will select the receiving frequency stored in the storage device, If you tune your tuning means based on this, it may become impossible to distinguish between the broadcasting station you have selected and others, or the frequency of the broadcasting station you have selected stored in the storage device may be different from the one you selected. There is a possibility that the frequency of a different broadcasting station may be changed by someone else.
This was inconvenient in practical terms. Also, even if you are a single person, if there are many broadcasting stations with different types of broadcasting, such as broadcasting bands, broadcasting methods, and broadcasting contents, you can select any station from these broadcasting stations and receive it. If frequencies are mixed and stored in a single storage device, it becomes difficult to select reception frequencies stored in the storage device for each type of broadcast at the time of reception.

Therefore, a plurality of storage devices for storing reception frequencies are provided, and a selection means for selecting the plurality of storage devices is provided.
If a plurality of storage devices are selected by changing the operation switch in the selection means, the above-mentioned problem can be easily solved without providing a plurality of receivers.

However, if this is done, the following new problem arises.

If the storage device is switched to another storage device while the reception frequency is being written to one of the multiple storage devices, the writing of the reception frequency to the storage device before switching will not be completed, and the reception frequency will not be completely written. You will not be able to write anything. Also, if the reception frequency is read from one storage device and the storage device is switched to another storage device, the reception frequency read from the previous storage device is supplied to the tuning means halfway and remains as it is. If the reception frequency read out from the storage device is later supplied to the tuning means, there is a possibility that the tuning frequency of the tuning means may not be reliably set to the later reception frequency.

In view of this point, it is an object of the present invention to provide a receiving device that solves all of the above-mentioned problems. Below is the first
An embodiment in which the present invention is applied to an AM/FM synthesizer radio receiver will be described in detail with reference to the drawings and FIG.

In Figure 1, 1 is an antenna, 2 is a high frequency amplification circuit, and 3 is an antenna.
is a mixing circuit, 4 is an intermediate frequency amplification circuit, and 5 is a demodulation circuit (A
M detection circuit or FM detection circuit), 6 is a low frequency amplification circuit,
7 is a speaker.

Reference numeral 9 denotes a local oscillation circuit, which is constituted by a variable frequency oscillation circuit of a PLL (phase locked loop) frequency synthesizer 8.

In reality, two receiving circuit systems, AM and FM, are required, but only one system is shown in FIG. 1 for simplicity. Next, the PLL frequency synthesizer 8 will be explained. In the PLL frequency synthesizer 8, the oscillation output of the variable frequency oscillation circuit 9 as a local oscillation circuit is output from the prescaler 10.
The frequency is divided to an appropriate frequency division ratio by the programmable frequency divider 11.
supplied to

This frequency divider 11 is set to a predetermined frequency division ratio by output data of a frequency division ratio setting register 15, which will be described later. Frequency divider 1
The divided output of 1 is supplied to a phase ratio circuit 12 and compared in phase with the oscillation output of a reference frequency oscillator (crystal oscillator) 13.
The comparison error output is supplied to the low-pass filter 14, and its output is supplied to the variable frequency oscillation circuit 9 as an oscillation frequency control signal. Reference numerals 16 and 17 indicate a plurality of storage devices, two in this example, each of which is complex and includes eight received frequency memory sections 16a and 17a in this example.

These receiving frequency memory sections 16a and 17a can store, for example, the receiving frequencies of eight stations arbitrarily selected in advance. 59 is a selection means for selecting one of the plurality of storage devices 16 and 17; 80 is a programmable frequency divider 11 and frequency divider for tuning to the reception frequency read out from the selected storage device 16 or 17; This tuning means is composed of a ratio setting register 15.

The frequency division ratio setting register 15 is provided with control pulse supply terminals 33 and 34 for manually setting the reception frequency, and the power switch button 70 and FM/ AM changeover switch button 71. By operating the up and down frequency setting buttons 43 and 44, control pulses for frequency division ratio setting are supplied from an oscillator (not shown) to the terminals 33 and 34, thereby changing the frequency division ratio of the programmable frequency divider 11. The reception frequency based on the setting is digitally displayed on the display section 72. Next, the selection means 59 for selecting the plurality of storage devices 16 and 17 will be explained.

This means that when switching between the plurality of storage devices 16 and 17 by operating the operation switch 21, the selection of switching to another storage device is held until the writing or reading of the storage device that is currently being written or read is completed. and a holding means 75 for holding. The operation switch 21 is a switch that is temporarily turned on each time the switching knob 21a shown in FIG. 2 is switched to programs 1 and 2 corresponding to the storage devices 16 and 17.

One end of the operating switch 21 is grounded through a DC power supply 22, and the other end is grounded through a resistor 51. switch 2
1 and the resistor 51 is connected to the input terminal of a differentiating circuit 52 consisting of a capacitor 53 and a resistor 54, and the output terminal of the differentiating circuit 52 is connected to a monostable multivibrator 55.
connected to the input terminal of Monostable multivibrator 5
5 is triggered by a positive differential pulse of the differential output of the differentiating circuit 52, and its output is supplied to an AND circuit 56.
Also, write and read control signals from a write and read control signal generation circuit 36 of the central processing unit 18, which will be described later, are supplied to the AND circuit 56 through a NOR circuit 57. The output of the AND circuit 56 is the D-type flip-flop circuit 5.
It is supplied to the C (clock) input terminal of No.8. In the flip-flop circuit 58, the Q output terminal is connected to the D (data) input terminal, and the S (set) input terminal and the R (reset) input terminal are grounded. Outputs from the Q and Q output terminals of the flip-flop circuit 58 are supplied to chip select terminals of the storage devices 16 and 17, respectively. Note that the time width of the rectangular wave output from the monostable multivibrator 55 is selected to be slightly larger than both the write time and read time for each memory section of the storage device 16 or 17. Thus, when the operating switch 21 is turned on, a rectangular wave signal is output from the monostable multivibrator 55, and the storage device 1
When reading or writing of 6 or 17 is completed or when neither reading nor writing is performed, NOR circuit 5
7, an output is obtained from the AND circuit 56, which drives the flip-flop circuit 58,
Switching from one of the storage devices 16, 17 to the other is performed.

Further, in order to write the desired reception frequency into the memory sections 16a and 17a of the storage devices 16 and 17, the following procedure is performed.

Memory button 61 and buttons 62 to 6 on the front panel 60 of the housing
9 to supply the address data signal from the address register 20 of the central processing unit 18 to the storage device 16, ]7 via the address bus, and at the same time supply the write/read control signal of the central processing unit 18. By supplying the write control signal from the generation circuit 36 to the storage devices 16 and 17, the frequency division ratio data of the frequency divider 11 corresponding to the receiving frequency being received is transferred from the frequency division ratio setting register]5 to the central processing unit 18.
storage device selected via the data register 37]
6 or 17, the received frequency memory section 16a or 17a is written as appropriate. Also, storage devices 16 and 17
The receiving frequency is read out from any one of the receiving frequency memory sections 16a, 17a, and the tuning means 80 is adjusted accordingly.
To obtain synchronization, do the following:

By switching the switch knob 21a to select one of the storage devices 16 and 17, and then selecting and operating one of the buttons 62 to 69, a signal from the write/read control signal generation circuit 36 of the central processing unit 18 is activated. The read control signal is transmitted to the storage devices 16 and 17.
At the same time, the address signal from the address register 20 is supplied to the storage devices 16 and 17, and the number of reception frequencies is determined from the selected reception frequency memory section 16a or 17a of the selected storage device 16 or 17. read out,
This is supplied to the frequency division ratio setting register 15 via the data register 37, and thereby the programmable frequency divider 1
A frequency division ratio of 1 is set, and the tuning means 80 is tuned to the receiving frequency. According to the above-mentioned receiving device of the present invention, since a plurality of storage devices for storing reception frequencies are provided and one of them is selected, there are the following advantages.

That is, since multiple people can separately store and preset the frequency of the broadcasting station that they have selected in separate storage devices, they can select the receiving frequency stored in the storage device when receiving. , when tuning the tuning means based on the above, it is possible to clearly distinguish between the broadcasting station related to one's selection and another, or if the frequency of the broadcasting station related to one's selection stored in the storage device is different from that of another. This is convenient in practice because there is little possibility that someone else will change the frequency to a different broadcasting station. Also, even if you are a single person, if there are many broadcasting stations with different types of broadcasting, such as broadcasting bands, broadcasting methods, and broadcasting contents, you can select any station from these broadcasting stations and check its reception frequency. By storing the information in separate storage devices for each type of broadcast, it becomes easy to select the reception frequency stored in the storage device at the time of reception for each type of broadcast.

Further, according to the receiving apparatus of the present invention, the selection means for selecting a plurality of storage devices is provided with the above-mentioned holding means, so that there are the following advantages.

In other words, even if the reception frequency is written in one of the plurality of storage devices, even if the storage device is switched to another storage device, the reception frequency can be completely written to the storage device before switching. In addition, when switching to another storage device while reading reception frequencies from one storage device, the reception frequency read from the previous storage device is supplied to the sinusoidal tuning means halfway and does not remain as it is. Therefore, when the reception frequency read out from the storage device is later supplied to the tuning means, the tuning frequency of the tuning means is reliably set to the later reception frequency.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a front view showing the front panel of the casing of the embodiment of FIG. 16 and 17 are storage devices, 16a and 17a are reception frequency memory units thereof, 21 is an operation switch, 59 is a selection means,
75 is a holding means.

Claims (1)

[Claims] 1 comprising a tuning means, a plurality of storage devices for storing reception frequencies, and a selection means for selecting the plurality of storage devices, and the selection means includes an operation switch and the plurality of storage devices by operating the operation switch. and holding means for suspending the selection of switching to another storage device until the writing or reading of the storage device currently being written or read is completed, and the tuning means is configured to select one of the plurality of storage devices. A receiving device characterized in that tuning is performed according to a receiving frequency read out from a selected storage device.