JPS5951040B2 - Pulse detection and measurement processing circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention includes a failure detection circuit that detects physical quantities such as radiation, light, and magnetism as pulse numbers and detects damage, malfunction, and characteristic deterioration of each component of a circuit that performs measurement processing. This invention relates to pulse detection and measurement processing circuits.

FIG. 1 is a block diagram showing a conventional pulse detection and measurement processing circuit.

In the figure, 1 mainly includes a detector 2 that detects physical quantities such as radiation, light, and magnetism as pulse numbers, and a preamplifier 3 that amplifies the pulse signal and sends out the pulse signal shown in Figure 2a. A detection device 4 is a transmission cable, 5 is a pulse height discriminator 6 which receives the pulse signal and sends out the pulse signal shown in FIG. 2, and a D/A converter 7 is shown in FIG. 2C.
The main components are a DC amplifier 8 for amplifying an analog signal and a bistable amplifier failure detection circuit 9 shown in FIG.

Next, the operation of the pulse detection and measurement processing circuit according to the above configuration will be explained with reference to FIGS. 2a to 2d.

First, the detection device 1 converts physical quantities such as radiation, light, and magnetism into pulse signals as shown in FIG. 2a.

This converted pulse signal is then sent via a transmission cable 4 and input to a measurement processing device 5.

Of the pulse signals received by the pulse height discriminator 6 of the measurement processing device 5, only those having a predetermined pulse height value or more are converted into standardized pulse signals (see FIG. 2).

Then, the D/A converter 7 converts it into an analog signal (see FIG. 2C) corresponding to the counting rate.

Then, this analog signal is converted into a voltage level that can be easily handled by a DC amplifier 8, and outputted from an output terminal 5a to an indicator, computer recorder, etc. (not shown), and also to a failure detection circuit 9. Send.

When the voltage level input to this fault detection circuit 9 becomes lower than the lower limit level 1 shown in FIG. It becomes "1" and a system failure can be detected.

(In this case, it goes without saying that the level expressing the failure may be set to 0.

) For example, the waveform portion 10 in FIG. 2a indicates that the pulse signal has been lost due to some kind of failure, and the voltage level input to the failure detector 9 has fallen below the lower limit level 1, causing the above-mentioned System failures can be displayed as shown below.

However, in the conventional pulse signal detection and measurement processing circuit, the above-mentioned components such as the detector 2 and the preamplifier 3
, the transmission cable 4, the wave height discriminator 6, the D/A converter 7, malfunctions, malfunctions, characteristic deterioration, etc. can be detected, but since the DC amplifier 8 is handled at the DC level, the mode of failure is not necessarily determined. There is no guarantee that it will be below a predetermined lower limit level.

For this reason, when a failure of the detector 2, preamplifier 3, transmission cable 4, wave height discriminator 6, D/A converter 7 and DC amplifier 8 overlap, it may not be possible to detect the failure.

That is, if the failure mode of the DC amplifier 8 does not fall below the predetermined lower limit level 1, there is a drawback that failures in this system cannot be detected.

Therefore, the purpose of the present invention has been made to eliminate the above-mentioned drawbacks, and focuses on the fact that the failure mode of a DC amplifier is at the upper or lower limit of its range. The present invention provides a pulse detection and measurement processing circuit equipped with a failure detection circuit capable of detecting a failure even in the event of a failure.

In order to achieve such an object, the present invention has a bistable amplifier which has a lower limit level L1 as a slice level, receives an output signal of a DC amplifier, and sends out an output signal when this voltage becomes lower limit level L1 or less. , a bistable amplifier that has an upper limit level L2 as a slice level and sends out an output signal when this voltage reaches the upper limit level L2 after receiving the output signal of the DC amplifier, and the logical sum of the output signals of these bistable amplifiers. The present invention includes a failure detection circuit consisting of an OR circuit and an OR circuit, and will be described in detail below using embodiments.

FIG. 3 is a block diagram showing an embodiment of the pulse detection and measurement processing circuit according to the present invention.

In the figure, reference numeral 11 denotes a failure detection circuit composed of bistable amplifiers 9 and 12 and an OR circuit 13.

Note that the bistable amplifier 9 has a lower limit level L1 as a slice level, and when the input voltage ■1 is Vl>Ll, the output is °゛0゛, and when the input voltage ■1 is ■1<Ll, the output is 1. It is.

Further, the bistable amplifier 12 has an upper limit level L2 (L2>Ll) as a slice level, and the input voltage V2
If (V2 > Vl) is ■2>L2, the output is ``1'',
When the input voltage (2) is (2) (L2), the output is "0".

Next, the operation of the pulse detection and measurement processing circuit according to the above configuration, particularly the failure detection operation of the system, will be explained with reference to FIGS. 4a to 4i.

First, in the case of a failure in the system of the detector 2, preamplifier 3, transmission cable 4, pulse height discriminator 6, and D/A converter 7, or in the case of a failure that leads to a drop in the output voltage of the DC amplifier, the explanation will be given in Fig. 1. As shown in FIG. 4C, the output voltage of the DC amplifier 8 becomes below the lower limit level 1.

Therefore, the output of the bistable amplifier 9 becomes 0.1 as shown in FIG. 4d.

This 14194 signal is output via the OR circuit 13.

Therefore, the output of the failure detection circuit 11 becomes "1",
System failures can be detected.

Note that since the level input to the bistable amplifier 12 is lower than its upper limit level L2, its output becomes "0".

On the other hand, if the failure of the DC amplifier 8 is due to an increase in the output voltage, the fourth
As shown in FIG. f, the upper limit level rises to 2 or more.

Therefore, the output of the bistable amplifier 12 becomes 1' as shown in FIG. 4g.

The output of the bistable amplifier 9 is as shown in the fourth diagram.
It is “0”.

Therefore, the output of the OR circuit 13 becomes "1" and the output of the failure detection circuit 11 becomes "1", making it possible to detect a failure in the system.

It goes without saying that the pulse signal detection and measurement processing operations are the same as those shown in FIG. 1.

Moreover, although two bistable amplifiers 9 and 12 are provided as the failure detection circuit 11 in the above description, it goes without saying that only one bistable amplifier may be used as long as it is provided with a lower limit level L1 and an upper limit level L2.

In addition, we have explained the case where a physical quantity is detected as the number of pulses (counting rate) and then processed for measurement. However, we have also explained the case where a physical quantity is detected as the number of pulses (counting rate) and processed for measurement. Of course, it can also be applied in the same way.

As explained in detail above, the pulse detection according to the present invention,
The measurement processing circuit has advantages such as being able to detect failures in a system including a DC amplifier with a simple configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional pulse detection and measurement processing circuit, FIGS. 2a to 2d are time charts showing waveforms of each part in FIG. 1, and FIG. 3 is a block diagram showing a conventional pulse detection and measurement processing circuit. A block diagram showing one embodiment of the measurement processing circuit, and FIGS. 4a to 4i are time charts showing waveforms of each part in FIG. 3. 1...detection device, 2...detector, 3.
...Preamplifier, 4...Transmission cable,
5... Measurement processing device, 6... Wave height discriminator, 7... D/A converter, 8°... DC amplifier, 9... ... Failure detection circuit (bistable amplifier), 10 ... Waveform part, 11 ... Failure detection circuit, 12 ... Bistable amplifier, 13 ...
...OR circuit.

Claims (1)

[Claims] 1. A detection device that detects and amplifies physical quantities such as radiation, light, and magnetism as pulse numbers, a transmission cable that transmits this pulse signal, and a D/A converter that receives the transmitted pulse signal and discriminates the wave height. It has a circuit that converts it into an analog signal, amplifies it with a DC amplifier, and processes it for measurement, and a lower limit level L1 as a slice level, and receives the output signal of the DC amplifier and sends out an output signal when this voltage becomes lower limit level 1 or less. a bistable amplifier which has an upper limit level L2 as a slice level and which receives the output signal of the DC amplifier and sends out an output signal when this voltage reaches the upper limit level L2, and the output of these bistable amplifiers. A pulse detection and measurement processing circuit characterized by comprising a failure detection circuit consisting of an OR circuit that calculates the logical sum of signals.