JPS5949750B2 - Variable scanning line density control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a variable scanning line density control method for an image transmission device such as a facsimile machine.

In this type of image transmission apparatus, various band compression transmission methods have been proposed that utilize the correlation of information to be transmitted in the main scanning direction.

In order to increase the degree of compression, it is conceivable to further utilize the correlation in the sub-scanning direction, but the present invention proposes one such method. It changes the density. By the way, when analyzing the information of a document transmitted by a facsimile machine, one document contains information of various densities that require resolutions of 3 lines/mm, 4 lines/mm, and 6 lines/mm.

However, facsimile machines have conventionally transmitted document information at a fixed resolution; for example, a facsimile machine with a resolution of 6 lines/mm can transmit all information at a resolution of 6 lines/mm, regardless of the density of the information in the document. to transmit. As a result, parts of the manuscript with low information density (resolution 3 lines/mm, 4 lines/mm)
For parts where information can be transmitted sufficiently in mm, there was a drawback that transmission time was wasted. Therefore, in the present invention, the scanning line density is made variable depending on the information density of each line of the document, thereby shortening the time required for signal transmission.

In the present invention, compression is performed using correlation in the sub-scanning direction. Generally, the information contained in adjacent scanning lines has high similarity, and especially when the information density is low, the information contained in one scanning line can represent the information contained in the other scanning line. Therefore, by determining the transmitted scanning line density in the sub-scanning direction based on the density of information contained in one scanning line, and transmitting information at the determined scanning line density, it is possible to perform scanning that is suitable for the information density of the document. The present invention provides a variable scanning line density method that enables information transmission at line density. The variable scanning line density control method of the present invention detects the length of each piece of adjacent dissimilar information in one scanning line, and if these lengths are less than a predetermined value and are consecutive, the The scanning line density is determined, and the transmitted scanning line density is changed according to the determined scanning line density.Next, the sub-scanning shown in FIGS. 1 and 2 is performed by a step motor. The present invention will be explained in detail regarding a facsimile apparatus with band compression using run-length encoding.

FIG. 1 shows the circuit on the transmitting side, and FIG. 2 shows the circuit on the receiving side.

First, in Figure 1, IN has a constant scanning line density, specifically 6 lines/
SYN is an image signal obtained by scanning a document with 1.5 mm, converting it into an electrical signal using a photomultiplier tube, etc., amplifying it with a preamplifier circuit, and converting it into a binary value with a binarization circuit. This is a synchronization signal generated for each line. Binarized image signal 1
N is sampled by the sampling circuit 1 to obtain change point signals ML from white to black and from black to white, which are input to the run length encoding circuit 2, encoding control circuit 6, and scanning line density determination circuit 8. be done.

A synchronization signal SYN is also input to the encoding control circuit 6, and the control circuit 6 thereby classifies the signal to be encoded by the run-length encoding circuit line by line. The run-length encoding circuit counts the sampling pulses between each change point using the change point signal ML and the sampling pulse S, encodes this counted value, and generates a run-length code for each encoded line (one scanning line). The conversion signal is input to the memory circuit 4 through the memory control circuit 3. Reference numeral 5 denotes an end signal generating circuit for adding an end signal (END signal can be substituted with a synchronization signal added at the beginning of the signal of one line) for each end of one line, and is connected to the encoding control circuit 5 from the control circuit 6. An end signal is generated in response to the encoding end signal TS and the memory 4 output end signal ES from the memory control circuit 3, and one line of run-length encoded information from the memory circuit 4 is sent to the receiving side through the gate circuit 7. It is sent immediately after the completion of sending.

After generating the end signal, the end signal generating circuit 5 sends an end signal end signal FS to the scanning line density determining circuit 8. In the normal case where the information density is high, the above operation is repeated for each line. The pattern of this transmitted signal is shown in FIG. 3A. In the present invention, a scanning line density determination circuit 8 is provided, and this circuit 8 has the configuration shown in FIG. Then, if the information density is medium, it is decided to be 6 lines/mm, and if the information density is medium, it is decided to be lower, for example, 4 lines/mm.If the information density is low, it is decided to be even lower, for example, 3 lines/mm, and these scans are A linear density command GS is given to the memory control circuit 3.

As shown in FIG. 4, the scanning line density determining circuit 8 uses a counter 21 . Flipflops 22-25, 31. A similar system having NAND gates 27 to 30 is also provided for a scanning line density of 3 lines/mm.

In the figure, the suffix A is attached to the 3 lines/mm system, and the scanning line density of 4 lines/mm is realized by sharing the 6 lines/mm and 3 lines/mm systems. S1 is the aforementioned sampling signal and is input to the counter 21. ML is a change point pulse generated at each turn of white information W and black information B in one scanning line, and R1 is a panorez generated slightly later than this, which clears the counter 21. Therefore, the counter 21 counts the number of sampling pulses approximately corresponding to the length of the white information or black information at that time from when the counter 21 is cleared by the panorez R1 until it is cleared again by the next pulse R1. FIG. 5 shows the time relationship of each pulse.
The synchronization signal SYN is generated for each line, and for example, for an A4 size document, it is generated every 210 mm. When the sampling pulse S1 is 6 pulses/mm, 210×6=1 in one line
It occurs at a rate of 260 pulses. S is 1 line scan, D
indicates the transmission, and END indicates the end signal. Now, if the length of the white or black information is long and the pulse R1 is input after the counter 21 has counted 32 or more, the flip-flop 22 will output the counter 2.
1, its output terminal 22a becomes high level, and the output terminal 23a of flip-flop 23 becomes low level.

If the next black-and-white information is also long, the output of the flip-flop 22 becomes high level, and in this state, a shift is performed by the pulse ML, and the output terminal 24a of the flip-flop 24 also becomes low level. Therefore, while relatively long black and white information continues, the outputs 23a of the flipflops 23 to 25,
24a and 25a are at low level. When the outputs of flip-flops 23 to 25 are all at low level and the pulse ML is input before the counter 21 can count 32, the output of flip-flop 22 is at low level and the output 23a of flip-flop 23 is at high level. change to le.

If the following two black and white signals are short, the outputs 23a, 24a, 25a of all flip-flops 23 to 25 will be at high level, and the output of NAND gate 27 will be at low level.
The output of NAND gate 28 goes high, triggering flip-flop 31 to generate a signal specifying the scan line density of 6 lines/mm. The counter 21A and flip-flops 22A to 25A, 31A, etc. operate in the same way, but this force counter 21A has a sampling pulse of 25
The output is taken out when 6 pieces are input. Therefore, the flip-flop 31A of the output stage is long, corresponding to 256 or more pieces of black and white information counted by sampling pulses, and when 3 pieces are consecutive, the scanning line density is set to 3 lines/mm. generates a signal specified by

In addition, each flip-flop 23 to 25, 23A to 25A
The output of the flip-flop 205 is input to the reset terminal of the flip-flop 205.

Since the flip-flop 20 is inverted by the end signal output termination signal 5, each of the flip-flops 23 to 25,
23A to 25A are allowed to operate every other scanning line.
In other words, the information density of adjacent information is measured every other scanning line.
I will be watching. In other words, for example, 6 consecutive scanning lines (1st line, 2nd line, ... 6th line)
In the case of even lines, information density measurement is performed only on the second, fourth, and sixth lines. Then, depending on the information density of this line, it is determined whether to transmit one line or to thin out the line. The following describes the operation of outputting the scanning line density designation signal GS based on the length measurement results of black and white information by each counter 21, 21A. The circuit that generates this designation signal GS includes two stages of flip-flops 322 and 33.
, a flip-flop 34, NAND gates 35 to 42, and a Noah gate 43. As mentioned above, each counter 21, 2
The length of black and white information counted at 1A includes sampling pulses of 132 or less (less than), 2256 or more, 3
Each case of 32 or more and less than 2256 is determined.

The set/reset states of the flip-flops 31 and 31A are determined by each of the above measurement results 1 to 3 occurring a plurality of times. The operation in each case will be explained below. When short monochrome information with 51 sampling pulses equal to or less than 32 continues: In this case, as described above, each count output (32, 256 output) of each counter 21, 21A is at a low level, and each flip-flop 23-2j5, 23A-25A is set, and finally flip-flops 31 and 31A are also set.

Therefore, the NAND gate 37, to which the Q output (low level in this case) of the flip-flop 31 is supplied, will output a high level regardless of the state of the input at the other end. As a result, the flip-flop 34 is set and the designation signal GS becomes high level. In other words, assuming that the scanning line density is high (monochrome information is short), it is set to 6 lines/mm. ) When long monochrome information with sampling pulses of 256 or more is continuous: In this case, each flip-flop 31, 31A is not set (reset state).

That is, each counter 21, 21A issues its respective count output (32 output, 256 count output) until the pulse R1 arrives. As a result, each flip-flop 22,
The output of 22A becomes high level and resets the subsequent flip-flops 23-25, 23A-25A. As a result, the NAND gates 27, 27A are at high level, the NAND gates 28, 28A are at low level, and each flip-flop 31, . 3] Both A are held in the reset state. In this case, the Q of each flip-flop 31, 31A is
Both outputs show high level.

Therefore, NAND gate 35 is at low level, NAND gate 3
6 indicates a high level. As a result, a high level is applied to both inputs of the NAND gate 37, the NAND gate 37 outputs a low level, and the flip-flop 34 outputs a low level.
will be reset. As a result, the designation signal GS shows a low level, and the information density of the line is considered to be low, and the transmission of the line is stopped. As described above, this information density O measurement is performed line by line, so when the designated signal GS reaches the level on each measurement line, the transmitted density becomes 3 lines/mm. In other words, in the example above, 6
Only the first, third and fifth lines of the book are transmitted. ? When black and white information with a sampling pulse of 32 or more and less than 256 continues: In this case, the counter 21 returns 3.
This is when the pulse R1 arrives after counting 2 and before counting 256 at the counter 21A.

It will be apparent that at this time flip-flop 31 remains in the reset state, while flip-flop 31A is set. NAND gate 39 outputs a low level only in this state, that is, when the Q output of flip-flop 31 is at high level (reset state) and the Q output of flip-flop 31A(7) is at high level (reset state).

This output causes the NAND gate 40 to indicate a high level,
Set the flip-flop 32. In other words, it is temporarily stored that flip-flop 31 is not set and flip-flop 31A is set. At this time, the flip-flop 33 remains in the reset state (Q output is at high level). That is, the set/reset timing (operating clock) of these flip-flops 32 and 33 is generated by NAND gates 41 and 42 based on the synchronizing signal SYN (SYS in FIG. 4) and the output of flip-flop 20.

As mentioned above, the output of the flip-flop 20 is generated every other scanning line (every even numbered line). Further, the synchronization signal SYN is issued every time one line of scanning is completed. These flip-flops 32, 33 are therefore activated (set/reset) only at the end of the scan of even lines that are permitted to measure the information density. As a result, flip-flop 33
is set on two consecutive even lines,
This is only when the condition that the information density is 32 or more and 256 or less is satisfied. More specifically, when the flip-flop 32 is set on the previous even line (the Q output is low level) and the NAND gate 39 shows a low level again on the next even line, the reset by the NOR gate 43 is released. be done. The set output (Q output is low level) of the flip-flop 33 is outputted to the NAND gate 36. As described above, the flip-flop 31A is not set and the flip-flop 31A is set. In this case, this state is 2
The designation signal GS does not go to low level unless it occurs twice in succession.

Therefore, if the second and fourth lines of the six scanning lines continuously exhibit the above state, transmission of the fourth line is stopped. Furthermore, the 6th line is also in the above state town.
Transmission on the line is also stopped. As a result, the number of lines actually transmitted is the first, second, third, and fifth, and a scanned line density of 4 lines/mm has been selected. In addition, with the flip-flop 32 set, when monitoring the information density on the next even-numbered line, the information density is 3 lines/mm and 6 lines/m.
When m is specified, the flip-flop 32 is reset by a reset signal (not shown) (for example, a signal generated based on the condition that the NAND gate 39 falls to a low level when the synchronization signal SYN is generated).

When the memory control circuit 3 receives a scanning line density command from the circuit 8, the memory control circuit 3 transfers the information of the line to the memory circuit 4 according to the command.
Prevent output from.

For example, if the scanning line density is specified as 3 lines/01m, this device is designed to have a density of 6 lines/mm, so it will prohibit the transmission of information on one out of every two lines, and simply send an end signal. Only the end signal is sent from the generating circuit 5, and the information is compressed. A transmission signal of this compressed information is shown in FIG. 3B.

As is clear from this figure, two end signals continue on the line where transmission is omitted. Note that in this embodiment, it is determined whether or not to transmit the monitored scanning line according to the monitoring result, but this also applies if it is determined whether or not to transmit the next scanning line according to the monitoring result. good. In FIG. 2, IN is a signal transmitted from the transmitter shown in FIG. 1, and this is input to the register circuit 11.

From the register circuit 11, the run-length code is input word by word to the run-length code decoding circuit 12, and the end signal is input to the decoding control circuit 18, respectively. The decoding circuit 12, the matching circuit 13, and the decoding counter 14 operate until the end signal is input, and the run-length code decoding circuit 12 receives the signal from the register circuit 11 by one line of decoding signal from the decoding control circuit 18. The run length code of 1 word (for example, 16 pits) is inputted to the matching circuit 13, and on the other hand, the decoding counter 14 starts counting by the start signal from the decoding control circuit 18, and the counted value is inputted to the matching circuit 13. are compared, and when they match, a match signal is output to the decoding control circuit 18, the decoding control circuit 18 controls the decoding counter 14, and the output of the decoding counter 14 is written to the memory circuit 15. The signals thus decoded word by word are written into the memory 5. When the end signal indicating the end of one line is input to the decoding control circuit 18, the decoding control circuit 18 inputs the one line end signal to the memory control circuit 17.

The memory control circuit 17 outputs a signal to the memory circuit 15 and the memory circuit 16, and shifts the decoded signal for one line input to the memory circuit 15 to the memory circuit 16 at high speed. This operation allows the memory circuit 15 to store the next line of information, and the memory circuit 16 outputs the signal shifted from the memory circuit 15 to the recording circuit with the signal from the memory control circuit 17, and outputs the signal shifted from the memory circuit 15 to the recording circuit. can be done simultaneously. In conventional facsimile machines, the above operations are repeated to record information. In the present invention, signals input to the receiving device are transmitted in the configuration shown in FIG. 3B.

That is, two end signals may be transmitted successively, such as a run-length code, an end signal, an end signal, a run-length code, an end signal, etc. One simple method for reproducing in such a case is that when there are two consecutive end signals, the decoding control circuit 8 sets the sub-scanning step motor to one for the end signal without a run-length code.
It is conceivable to step it up. Although this operation changes the scanning line density and shortens the recording time, the recorded image deteriorates. In other words, the thickness of the scanning line is determined according to the density6.
In the case of lines/mm, the width is about 160μ, and in the case of 3 lines/mm, the width is about 320μ. Therefore, if a scanning line determined corresponding to 6 lines/mm is used at a density of 3 lines/mm, for example, a vertical solid line becomes a vertical dotted line, and a rough feeling becomes noticeable.
Therefore, in this implementation, in order to improve the deterioration of the recorded image, if the end signal continues, when reading the output of the memory circuit 16, this is also sent to the input to perform rewriting, and if the end signal continues, the step motor In addition to performing sub-scanning by moving one step, main scanning is also performed to record the same information as the previous line.

This makes it possible to shorten the transmission time and improve the deterioration of recorded images. In the present invention, 6 lines/mm means that 6 scanning lines are transmitted per 1 mm, and 4 lines/mm means that 6 scanning lines are transmitted per 1 mm. Regarding the density, it refers to thinning out and transmitting four lines.

Also, what is expressed as 3 lines/mm is 6 lines/mm.
Regarding the scanning line density of a book, it refers to conducting an interrogation and transmitting three lines. As explained in detail above, according to the present invention, if there is a part in one scanning line in which several short black and white signals are consecutive, the transmitted scanning line density is specified to be high, and if there is no such part, it is specified to be low. Thereby, the time required for image signal transmission can be shortened without degrading the quality of reproduced images.

This method does not select the scanning line density based on the information density of the entire line or its average, but rather determines the scanning line density in response to any local information density within the line. It has the characteristic of being able to faithfully reproduce even when detailed information is recorded on the disc.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 and 2 are circuit diagrams showing the configurations of a transmitting section and a receiving section of a facsimile device to which the present invention is applied, and FIG. 3A
, B are explanatory diagrams showing the structure of the transmission signal, FIG. 4 is a block diagram showing the circuit structure of the scanning line density determining circuit, and FIG. 5 is a pulse waveform diagram for explaining the operation. ] is a sampling circuit, 2 is a run-length encoding circuit, 3 is a memory control circuit, 4 is a memory circuit, 5 is an end signal generation circuit, 6 is an encoding control circuit, 7 is a gate circuit, and 8 is a scanning line density This is a decision circuit.

Claims (1)

[Claims] 1. In an image transmission device that scans an image to be transmitted at a constant scanning line density and transmits the scanned image information, the length of each piece of adjacent different information in one scanning line is detected, and when these lengths are determined by a predetermined A variable scanning line density control method characterized by thinning out a part of adjacent scanning lines according to the length and changing the transmission scanning line density when the number of scanning lines exceeds a value and there are a plurality of consecutive scanning lines.