JPS594891B2 - power transistor switch device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power transistor switch device, and particularly to a power transistor switch device used at a relatively high voltage, such as a chopper or an inverter, to prevent breakdown during turn-off.

A conventional power transistor switch of this type includes a transistor 3 inserted in series in an electrical path connecting a power source 1 and a load 2, as shown in FIG. 1a.

If the closed loop is only a pure resistance, the Lissajous regarding the collector voltage vcF and the collector current c due to the on-off operation of the transistor 30 will be as shown by the straight line A in FIG.

However, since the closed loop has wiring inductance and load inductance, it is practically impossible to draw a Lissajous like straight line A, especially in a power switching device.

In normal applications where load inductance cannot be ignored, a diode 4 is often added to shunt (commutate) the load current when the transistor is off.

In such a case, the Lissajous will look like curve B in Figure 1.

Also, due to the effect of wiring inductance, after the transistor is turned off and the reapplied voltage increases, an overshoot of this reapplied voltage occurs, but in order to suppress this overshoot voltage, a series resistor is connected to the capacitor 6. 5 is connected in parallel to the transistor.

However, with the normally used surge absorber for the purpose of suppressing overshoot, the Lissajous is no different from B in Figure 1.

If you are forced to improve the Lissajous, it is necessary to change the constant of the surge absorber by about one order of magnitude or more.

In particular, it is necessary to extremely reduce the resistance value of the resistor 5.

Now, if we quantitatively examine the case of lowering the resistance value in this way, we will get the following.

In other words, when the power supply voltage is E and the load current is The resistance value R5 is as follows.

On the other hand, due to the above, when transitioning from the OFF state to the ON state, a current is applied that discharges through the resistor 5 of the capacitor 6, so the ICVCE locus becomes like the curve C in FIG. 1C, and the collector current P Vc.

I'm just straight.

P becomes (IL+-)=2IL. However, when the transistor's collector current is close to its rated collector current and exceeds the rated collector current, the current amplification degree suddenly decreases and the collector voltage increases.

Therefore, it is not practical under surge conditions as shown in FIG. 1C.

For the above reasons, in the past, only the surge absorber 100 was used which had only the surge condition of curve B in FIG.

Next, when using a transistor as a power switch device, local thermal breakdown phenomena due to secondary breakdown, local temperature rise, local breakdown that progresses in a very short time, local concentration, local heat escape, etc. (hereinafter referred to simply as secondary breakdown) occur. It is easy to break down due to breakdown (abbreviated +), and in practical terms, the maximum rated collector current and the maximum rated collector-emitter breakdown voltage VCE are
A large derating (actual current and It was necessary to reduce the voltage by 1/2 to 1/4 respectively.

Figure 2a is a diagram that was developed to eliminate the drawbacks of the conventional device.
This is an example of a circuit connection diagram that is the technical basis of this invention. It prevents breakdown breakdown at turn-off and fully utilizes the maximum rating of the transistor without extensive derating, thereby increasing its utilization rate. This is an improvement.

In other words, the actual power usage that can be handled by the same element is improved.

In the figure, reference numeral 200 denotes a re-applying voltage suppressing means for suppressing the rising speed of the re-applying voltage during a transition when the transistor 3 transitions from an on state to an off state.

In the figure, it consists of a capacitor 8, a diode 9 in series with it, and a discharge resistor 10.

Therefore, when the transistor 3 transitions from the ON state to the OFF state, the reapplied voltage VCE (j2) at the time t2 when the collector current IC is substantially cut off is:
The capacitance of the capacitor 8 can be selected so that the applied voltage VCE (t3) is lower than the applied voltage VCE (t3) at the time t3 when it reaches a steady level determined by the power source 1 or the like.

Moreover, the discharge resistor 10 is selected to complete the discharge during the on-state period, and may have a resistance several times to several tens of times higher than that of the conventional surge absorber resistor 5.

Therefore, this discharge flow during the transition from the OFF state to the ON state can be ignored.

Therefore, it turns off through the locus of curve E in Figure 2,
It turns on through the locus of curve B.

On the other hand, if we consider the secondary breakdown breakdown of transistors from actual usage conditions, the secondary breakdown breakdown limit when transitioning from off to on is large, and the secondary breakdown breakdown limit when transitioning from on to off is small. .

Moreover, this difference is huge. For example, the latter limit is two to three times larger than the former limit when expressed in terms of switching power (instantaneous power).

The reason for this difference is that the breakdown phenomenon itself is a transition from an OFF state to an ON state.

When the base control is used to transition from the OFF state to the ON state, even if the state enters the primary breakdown state, which is a precursor to the secondary breakdown, carriers from the base are removed before the transition to the secondary breakdown state. It is forward biased upon injection and enters the normal ON state.

On the other hand, when transitioning from the on state to the off state, the primary breakdown state in the middle of the transition transitions to the secondary breakdown state due to thermal runaway.

That is, the primary breakdown phenomenon itself, which is a precursor, is in an opposite direction to the direction of transition to the OFF state, which is the original target state.

Then, there is a difference in the fracture limit depending on the direction of the state transition described above.

Furthermore, at turn-off, the voltage must be stopped immediately after the junction temperature rises due to the switching power, which is the most severe condition.

For the reasons discussed above, in the example of FIG. 2a, the collector voltage VCE-collector current IC Lissajous becomes as shown in the figure, thereby achieving a cooperative balance with the difference in the respective secondary breakdown limits.

As a result, the 11 switch 11 can be turned from off to on under the same voltage and current conditions as the 11 switch 11 can be turned from off to on.

Furthermore, it has become possible to perform switching with 2.5 to 4 times the voltage-current product as compared to the conventional transistor switch device shown in FIG.

In other words, it can be used with almost no derating with respect to the maximum rated breakdown voltages VCEO to VCBO and current Icmax, and can be used only with derating against surges similar to those of thyristors and diodes.

That is, in the conventional device, the reapplying voltage steady value VCE (OFF) that can be turned off (for example, the DC power supply voltage E in FIG. 1)
The maximum limit of is constrained by the collector-emitter sustaining voltage (VcEC8US) (maximum voltage that can be reached in the turn-off process) from the current cut-off condition, and E<'VCE(OFF)<V
CE (SUS) was an absolute requirement for tar-off.

In contrast, in the present invention, the current cutoff point voltage VCE (t
2) is lower than the sustaining voltage VcE (SUS), turn-off is possible.

What restricts the steady value of the reapplied voltage VcE (OFF) is the static withstand voltage VcEo ~ VcEs ~ VcEB (Vcg
o: "-"-mitter open, VCES: base-emitter short circuit, VCEB: base reverse bias, collector-emitter ffi stop voltage under each condition], and in reality, vc B
O (blocking voltage between collector and base when emitter is open)
approximately equal to.

Therefore, VCE (OFF) that can be turned off (Fig. 2 V
CE (t3) equivalent) can be greatly improved, and Vc
E(OFF)<VcBo is the original turn-off requirement.

VCBO generally reaches 1.3 to 2.5 times as much as vcE (SUS), and has a practical turn-off limit of 1.3 to 2.
This means that it can be improved five times.

Moreover, since a transistor with low VcE (SUS) can be used, the transistor can be manufactured easily.

Furthermore, from these reasons, the ratio of VcBo/vcE (SUS) is 1.5 as a power switching transistor.
~3 can also be said to be desirable.

These matters will be further confirmed by the examples described below.

In Fig. 2, the explanation was given using a junction transistor as an example.
It goes without saying that the same method can be implemented in a device using a field effect transistor 3 as shown in FIG.

FIGS. 3a" to 3c, which are the same in the above description, are connection diagrams showing another example serving as the technical basis of the present invention, which eliminates the drawbacks of the conventional device.

FIG. 3a is a modification of FIG. 2a, in which one end of the capacitor 8 is connected to the terminal on the opposite side of the transistor of the DC power source, so that it is connected in parallel with the load.

In this case, capacitor 8 is slowly charged through resistor 10 to the illustrated polarity while transistor 3 is on.

Then, when the transistor 3 turns off, when the potential at the load connection point of the transistor 3 tries to rise, the load current ■L is supplied through the diode 9 - capacitor 8 - load 2, and is again applied to the transistor 3. The voltage increase speed is suppressed.

Then, before the voltage reaches a steady value, transistor 3
The collector current of the transistor 3 can be cut off, and the voltage can be increased to a high voltage after the transistor 3 returns to the off state.

Therefore, as in the case of FIG. 2, it is possible to turn off the power up to the maximum withstand voltage.

Figures 3 and 3c show an example that can be used in a switch device that turns on and off at low frequencies, and the connection between the diode 9 and the capacitor 8 is the same as in Figures 2a and 3a.

On the other hand, the capacitor 8 is discharged or charged by a resistor 10', and the connection thereof is modified.

In this case, the resistor 10' serves as a shunt for the transistor 3 in the off state, resulting in a high resistance and a long time constant for the capacitor 8, so that it can be used in low frequency switching devices.

Further, when the transistor 3 is in the off state, a predetermined base current is passed (suitable for the purpose).

For example, it is suitable for connecting a transistor switch and a main resistor in parallel to perform average effective variable resistance adjustable power control.

FIG. 4 is a diagram showing a further improved example that forms the technical basis of the present invention. (capacitance, power consumption of the resistor 10, etc.) is reduced.

In the embodiment shown in FIG. 2a, the capacitor 8 has a voltage increase rate sufficient to compensate for the rate of current decrease when the transistor 3 cuts off the current (collector current fall time tf is used as a quantitative symbol to express this). (As a quantitative symbol representing this, collector voltage rise time trvc
e) is selected to be slow.

That is, the capacitance of the capacitor 8 is selected so that tf≦trvce.

However, the collector current fall time tf has a high dependence on the junction temperature (tf becomes long at the rated junction temperature, and as a result, the means for controlling the required re-applying voltage increase rate becomes large).

Furthermore, since the switching loss energy is a time integral value, if the collector current fall time is delayed, the re-applied voltage must be suppressed even lower in order to maintain the same loss.

That is, as the junction temperature rises, the required capacity of the required re-applying voltage suppressing means increases synergistically.

Figure 4 shows the time relationship between base current I'b, collector current i'c, and collector voltage V'CE in the above problem.
20 are each indicated by a dotted line.

That is, the decreasing speed of collector current i'c is slow (if it becomes slow, the reapplied voltage VCE(t'2) at current cutoff time t'2)
The figure shows that the voltage becomes high.

The example shown in FIG. 4a solves the above problem, and in the figure, the base drive circuit 29 applies a pulsed reverse bias eI for a predetermined time or more immediately after cutting off the forward base current Ib.
Give b1.

After that, a normal small reverse bias 0Ib2 is applied.

This relationship is shown by the solid line in FIG.

Although the base current is shown, the base voltage may be used instead.

In the case where the base current is provided, if the voltage of the reverse bias source of the base circuit is high, it is desirable to connect the diode 11 (or Zener diode) in antiparallel between the base and emitter.

According to the above example, the time relationship between the collector current ic and the collector voltage VCE is as shown by the solid line at the beginning of FIG.

That is, it is possible to prevent an increase in the fall time tf of the collector current ic due to an increase in junction temperature.

In other words, dependence on junction temperature can be substantially eliminated.

Therefore, improvements have been made so that the effect of suppressing the reapplying voltage can be synergistically, stably and reliably exhibited.

In other words, it is not only the effect of reducing the switching speed due to the reverse bias pulse (but also the fact that it is practically easy to match this with the suppression of the re-applied voltage (reducing the required means of suppressing the re-applied voltage), and the maximum rated conditions Switching can now be performed reliably.

Furthermore, since the dependence on junction temperature has been eliminated, re-inversion switching immediately after switching (such as turning off again immediately after being turned on, or turning on again immediately after turning off) is now possible.

As a result, the minimum on-time tonm and the off-time maximum toff have been greatly improved, making it possible to switch at an extreme time ratio.

Therefore, when using a chopper or an inverter, it has become possible to freely perform time ratio control (pulse width modulation, complex multiple modulation switching).

In conventional devices, switching under the maximum high frequency rating was not possible unless the time ratio was set to 30 to 70%.

This is because in conventional devices, when repeating switching is performed for a short period of time (within approximately several tens of microseconds), even if the repetition period is long, the junction temperature rises due to the switching power generated during the previous switching (local The amount of heat (including a significant temperature increase) is not sufficiently diffused during the time interval (within a few tens of μsees).

Therefore, on top of the previous temperature rise, the junction temperature rise due to the subsequent switching power overlaps, causing secondary breakdown failure.

In contrast, in the example shown in Figure 4, the switching power from on to off is small even under a considerable junction temperature rise (average temperature rise due to current flow and switching). ).

Even if the two switching operations (ON→OFF and OFF→ON) are repeated within a short time, one switching power is suppressed to a low level, so that the amount of superimposed local temperature rise due to switching is small.

Therefore, a remarkable effect is produced on fold-back switching, and it becomes possible to freely control the time ratio.

In addition, in FIG. 4, constant voltage reverse bias (reverse bias voltage vbO value is not changed like Vb1tVb2)
In this case, if the impedance of the reverse bias source 20 is set to a relatively impedance within an appropriate range, the necessary pulsed reverse bias current QIb1 will naturally increase as shown in FIG. flow, and a minute reverse bias current ○ as the chiaria emission is completed.
■It becomes b2.

Of course, in the case of this constant voltage reverse bias, the diode 11
is not used, and the voltage ○vb is kept within the allowable base-eminter voltage Vb0.

FIG. 5a shows another improved example which forms the technical basis of the present invention, in which transistors are connected in a Darlington manner.

The second transistor 3b has almost the same rating as the first transistor 3a.

In particular, the secondary breakdown breakdown limit for switching from on to off of the second transistor 3b is different from the secondary breakdown breakdown limit for switching from off to on of the first transistor 3a (conditions in which the reapplying voltage suppressing means 200 is provided). This is done so that it almost coincides with the fracture limit (destruction limit below).

That is, the present invention is not intended to reduce the drive base current by the current amplification factor of the second transistor 3b, with the normal current amplification factor as a reference.

The Darlington connection is intended to improve the sharing of switching power and the resulting high frequency, high power switching limits.

Now, in the example of FIG. 5A, base driving is performed as shown in the waveform shown in FIG.

The pulsed reverse bias base current QIb1 is commonly applied to both the first and second transistors 3at and 3b.

Therefore, the reverse bias pulse current QIb1 has an absolute value several times to more than ten times larger than the forward bias current ■Ib.

Also, when performing reverse bias like a constant voltage source, diode 1
Remove 1a.

At this time, as in the case of FIG. 4, a pulsed reverse bias current ○■b1 whose impedance peak value of the reverse bias source is limited flows as carriers are discharged from the transistor 3a.

Transistor 3b is reverse biased by 1 from the carrier emission base current e of transistor 3a.

Therefore, when transitioning from off to on, the second transistor 3b first conducts and shares the initial turn-on load current.

After a delay, the first transistor 3a becomes conductive and shares most of the load current.

On the other hand, when transitioning from on to off, the second transistor 3b becomes non-conductive, and then later the first transistor 3a becomes non-conductive, and the collector voltage begins to rise.

This time relationship is shown in Figure 2.

As can be understood from the above explanation of the operation, when turned on, the second transistor 3b takes part in the entire load current.

Then, the steady load current and the load current at turn-off are
Transistor 3a shares this responsibility.

That is, the second transistor 3b shares the switching power during turn-on, and the first transistor shares the steady-on state collector loss and the turn-off switching power reduced in the above-mentioned scheme.

On the other hand, the second transistor 3b has a small steady-state collector loss, so the average temperature rise is low, and therefore it can share a large turn-on switching power (compared to its maximum rated capacity).

On the other hand, since the first transistor 3a has a large collector loss in the steady on state, the average temperature rise is high, but since the turn-off switching power is suppressed by the above-mentioned scheme, it is still possible to turn off a large amount of power.

A highly coordinated and optimal power transistor switching arrangement is thus obtained.

In other words, a synergistic effect is achieved by suppressing the re-applied voltage and sharing the switching power through the Darlington connection.

This invention was made in order to further improve the above-mentioned idea, and aims to make the turn-off switching power negligible and to completely suppress the re-applied voltage at turn-off.

FIG. 6a is a circuit connection diagram showing one embodiment of the present invention, in which 12 and 13 are diodes, 14 are capacitors, 15 are inductances, and 16 is an auxiliary switch, which is a thyristor 16 or a transistor 16'. .

This is an attempt to improve the turn-off ability to a level equivalent to the turn-on ability by taking advantage of the fact that the semiconductor switch has a relatively large allowable switching power for turn-on.

In Fig. 6, Ib, & are the base current of transistor 3, 1g16 is the firing pulse of auxiliary switch 16, ■c is the collector current of transistor 3, ■ is the current of diode 12, and v14 is the current of capacitor 214. The voltage, 114, is the current of the capacitor 14, and VCE is the waveform of the collector voltage of the transistor 3.

Now, in FIG. 6a, while the transistor 3 is off, the capacitor 14 is charged to the polarity shown.

Then, when the transistor 3 is turned on, the current of the load 2 is conducted.

Then, when the transistor 3 is turned off, the base current is cut off or reverse biased at a time point t earlier than the time point when the base current is cut off or reverse biased.
2 to conduct the auxiliary switch 16.

The capacitor 14 oscillates through the auxiliary switch 16 and the inductance 15, is charged to the opposite polarity shown, and subsequently serves to supply a pulsed current through the diode 12.13.

On the other hand, the base current of the transistor 3 is cut off or reverse biased at time t3 before and after the pulse current of the capacitor 14 is reversed.

This timing t3 is from the time t2 when the auxiliary switch 16 is turned on to the time t4 when the diode 12 starts energizing.
Until then.

Capacitor 14 continues to vibrate and is charged again to the polarity shown, while diode 12 becomes non-conducting and the collector voltage is reapplied.

At the time of this re-application, the transistor 3 had previously recovered to the off state.

Therefore, the turn-off switching power at this time is negligible, and the power transistor switching device of the present invention can perform switching up to the permissible breakdown limit when turning on each of the transistor 3 and the auxiliary switch 16 or 16', and turning off the transistor 3. is not constrained to a low value by the secondary yield failure limit.

It goes without saying that applying a reverse bias to the base or gate of a transistor and connecting transistors in a differential manner can also be applied to the present invention.

As described above, the present invention provides a reapplying voltage suppressing means that applies a reverse bias between the emitter and collector of the transistor or between the drain and source, and restores the transistor to a non-conducting state before the reverse bias is completed. Therefore, turn-off switching power can be ignored and breakdown breakdown at turn-off can be prevented.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing a conventional transistor switch device, Fig. 2 is a diagram showing an example of the technical basis of this operation, and Fig. 3 is a diagram showing a conventional transistor switch device.
Figures a to C are diagrams showing other examples that serve as the technical basis of this invention, respectively. Figures 4 and 5 are diagrams that illustrate a further improved embodiment that is the technical basis of this invention. Figure 6. 1 is a diagram showing one embodiment of this invention, and FIG. 1 is a diagram showing another example which is the basis of this invention. In the figure, 1 is a power supply, 2 is a load, 3 is a power transistor, 3a is a first transistor, 3b is a second transistor,
8, 14 are capacitors, 9, 12゜13 are diodes,
10 is a charging/discharging resistor, 200 is a re-applying voltage suppressing means, 20
is the base drive circuit.

Claims (1)

[Claims] 1. A transistor inserted in series in an electric circuit connecting a power source and a load, and a control means for controlling the base or gate of a writing transistor to switch the transistor, and the transistor is charged during an off period to turn on the transistor. Then, a capacitor that conducts current to the load, an inductance inserted in series with this capacitor, and a parallel connection between the capacitor and the inductance, and a predetermined period of time earlier than the point at which the base current is cut off or reverse biased when the transistor is turned off. means for reverse biasing between the emitter and collector or between the drain and source of the transistor, comprising an auxiliary switch that is turned on at the time of , and a diode that is connected in parallel to the capacitor and inductance and forms a closed circuit with the auxiliary switch; A power transistor switching device, comprising: recovering the transistor to a non-conducting state before the reverse bias between the emitter and collector or between the drain and source ends.