JPS5946468B2 - High frequency amplifier circuit - Google Patents

High frequency amplifier circuit

Info

Publication number
JPS5946468B2
JPS5946468B2 JP51153970A JP15397076A JPS5946468B2 JP S5946468 B2 JPS5946468 B2 JP S5946468B2 JP 51153970 A JP51153970 A JP 51153970A JP 15397076 A JP15397076 A JP 15397076A JP S5946468 B2 JPS5946468 B2 JP S5946468B2
Authority
JP
Japan
Prior art keywords
capacitor
circuit
input
transistor
high frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51153970A
Other languages
Japanese (ja)
Other versions
JPS5377126A (en
Inventor
南海夫 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP51153970A priority Critical patent/JPS5946468B2/en
Publication of JPS5377126A publication Critical patent/JPS5377126A/en
Publication of JPS5946468B2 publication Critical patent/JPS5946468B2/en
Expired legal-status Critical Current

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  • Amplifiers (AREA)
  • Television Receiver Circuits (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Description

【発明の詳細な説明】 本発明はテレビジョン受像機に用いる高周波増幅回路の
改良、特に局部発振周波数の安定化に用いるAFC回路
の高周波増幅回路の改善に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in high frequency amplification circuits used in television receivers, and particularly to improvements in high frequency amplification circuits for AFC circuits used to stabilize local oscillation frequencies.

近年、テレビジョン受像機のIC化にともなつて、中間
周波映像増幅回路(以下VIF増幅回路と称する)、映
像検波回路、自動局部発振周波数制御回路(以下AFC
回路と称する)等の高周波回路がIC化され小型、高性
能化されてきている。
In recent years, with the adoption of ICs in television receivers, intermediate frequency video amplification circuits (hereinafter referred to as VIF amplifier circuits), video detection circuits, and automatic local oscillation frequency control circuits (hereinafter referred to as AFC
High-frequency circuits (referred to as "circuits") are being integrated into ICs and becoming smaller and more sophisticated.

これに伴つて、映像検波回路には同期検波回路が採用さ
れ、画質の向上および回路動作の安定性の向上が図られ
てきているが、その一例を図面に基づいて説明する。第
1図においてVIF増幅回路1で増幅された中間周波映
像信号はキャリア信号発生回路2、同期検波回路3、キ
ャリア信号増幅回路4、映像増幅回路5を内蔵するVI
E検波回路6の工Cに入力され、その出力はAFC回路
および映像増幅器に入力される。前記キャリア信号発生
回路2は前記VIF増幅器1から出力される中間周波映
像信号を増幅し、キャリア信号に共振したタンク回路で
選択し、振幅制限することにより、同期検波に用いるキ
ャリア信号を作る回路であり、前記同期検波回路3は中
間周波映像信号と前記キャリア信号とを乗算検波するも
ので、従来用いられていたようなダイオードによる包絡
線検波に比べ入力信号が小さくても直線性の良い検波を
行なうことができるのでLLD(LowLevelDe
tector)とも称され、入力を10Omvrms、
出力を0.1〜0.2vppC′動作させるのが普通で
あり、その出力は前記映像増幅器5により1〜2vpp
に増幅される。また、キャリア信号増幅器4はAFC回
路に供給するキャリア信号を増幅するためのもので、共
振回路Tの一方から入力を得ており、通常200mvr
ms程度を400〜500mvrmsに増幅する。なお
、キャリア信号発生回路2は後に接続されるAFC用I
Cに内蔵させてもよいがAFC回路に内蔵させるりミッ
タ増幅器の利得が、26dB以上と大きくなり発振の可
能性が大きくなるのでVIF検波回路6のICで6〜8
dB程度と増幅しておいてAFC回に内蔵したリミツタ
増幅器の利得を20dB程度におさえ発振をなくすのが
設計的に良い方法であると考えられている。また、第2
図は第1図における同期検波回路3とキヤリア発振回路
2およびキヤリア増幅器4の具体的回路の一例を示した
ものである。図において中間周波映像信号はトランスT
,を通つて、トランジスタQ5,Q7のベースに入力さ
れる。なお、バイアスはRl,,Rl,を通してVOが
加えられている。前記トランジスタQ5,Qlからの出
力は第1の差動増幅器のトランジスタQ6,Q8および
第2の差動増幅器のトランジスタQ9l,QlOのベー
スに加えられ、該第2の差動増幅器のトランジスタQ,
,Q,Oのコレクタにはキヤリア周波数(日本では58
75「MH2」)に共振したタンク回路イが接続され、
中間周波映像信号だけを選別し、ダイオードDl,D,
で振幅制限を加えてキヤリア信号を発生させる。即ち前
記トランジスタQ,,QlOlコイルL1コンデンサC
2、ダイオードDl,D,、抵抗R2,R,は前記キヤ
リア発生回路に相当する。また、トランジスタQl,Q
2,Q,,Q4は前記第1の差動増幅器で噌幅された中
間周波映像信号とキヤリア信号とを乗算する同期検波部
である。映像出力は抵抗R1または抵抗R4から得られ
る。CWはトランジスタQ,,のベースにも加えられ、
トランジスタQl,で増幅されてトランジスタQl,の
エミツタから出てAFC回路へ入力される。トランジス
タQl2のエミツタには10PFf)IC内容量が入つ
ていて交流利得を上昇させている。このタイプの増幅器
は回路が簡単なうえ電流も少なくて高周波でもうまく動
作するし、全回路をICチツプ内で作ることができるの
でICピンを多く必要としない利点をもつ。しかし、ト
ランジスタQl,、コンデンサC,、抵抗RlOの接続
関係は通常のトランジスタ検波に用いられる回路とほ〜
同一で、トランジスタQl2のベースエミツタダイオー
ドと、コンデンサC,で包絡線検波をおこす可能性が大
きい。
Along with this, synchronous detection circuits have been adopted as video detection circuits to improve image quality and stability of circuit operation. One example of this will be explained based on the drawings. In FIG. 1, the intermediate frequency video signal amplified by the VIF amplifier circuit 1 is transferred to a VI which includes a carrier signal generation circuit 2, a synchronous detection circuit 3, a carrier signal amplification circuit 4, and a video amplification circuit 5.
The signal is input to the circuit C of the E detection circuit 6, and its output is input to the AFC circuit and the video amplifier. The carrier signal generation circuit 2 is a circuit that amplifies the intermediate frequency video signal output from the VIF amplifier 1, selects it with a tank circuit that resonates with the carrier signal, and limits the amplitude to generate a carrier signal used for synchronous detection. The synchronous detection circuit 3 performs multiplication detection of the intermediate frequency video signal and the carrier signal, and can perform detection with good linearity even if the input signal is small compared to envelope detection using a diode that has been used in the past. LLD (LowLevelDe)
It is also called a
Normally, the output is operated at 0.1 to 0.2 vppC', and the output is 1 to 2 vpp by the video amplifier 5.
is amplified. Further, the carrier signal amplifier 4 is for amplifying the carrier signal supplied to the AFC circuit, receives an input from one side of the resonant circuit T, and normally has a frequency of 200 mvr.
ms to 400 to 500 mvrms. Note that the carrier signal generation circuit 2 is connected to the AFC I which will be connected later.
It is possible to incorporate it into the VIF detector circuit 6, but if it is incorporated in the AFC circuit, the gain of the transmitter amplifier will be as large as 26 dB or more, increasing the possibility of oscillation.
It is considered that a good design method is to amplify the signal to about dB and then suppress the gain of the limiter amplifier built in the AFC circuit to about 20 dB to eliminate oscillation. Also, the second
The figure shows an example of a specific circuit of the synchronous detection circuit 3, carrier oscillation circuit 2, and carrier amplifier 4 in FIG. In the figure, the intermediate frequency video signal is
, and is input to the bases of transistors Q5 and Q7. Note that VO is applied as a bias through Rl, , Rl. The outputs from the transistors Q5, Ql are applied to the bases of the transistors Q6, Q8 of the first differential amplifier and the transistors Q9l, QlO of the second differential amplifier, and
, Q, and O have a carrier frequency (58 in Japan).
75 "MH2") is connected to the resonant tank circuit A,
Only intermediate frequency video signals are selected, and diodes Dl, D,
A carrier signal is generated by adding amplitude limitation to the signal. That is, the transistor Q, , QlOl coil L1 capacitor C
2. The diodes Dl, D, and the resistors R2, R correspond to the carrier generation circuit. Also, transistors Ql, Q
Reference numerals 2, Q, and Q4 are synchronous detection units that multiply the intermediate frequency video signal amplified by the first differential amplifier and the carrier signal. Video output is obtained from resistor R1 or resistor R4. CW is also added to the base of transistor Q,,
The signal is amplified by the transistor Ql, outputs from the emitter of the transistor Ql, and is input to the AFC circuit. The emitter of the transistor Ql2 has an IC internal capacity of 10PFf to increase the AC gain. This type of amplifier has a simple circuit, requires little current, operates well even at high frequencies, and has the advantage of not requiring many IC pins because the entire circuit can be fabricated within an IC chip. However, the connection relationship between transistor Ql, capacitor C, and resistor RlO is similar to that of a circuit used for normal transistor detection.
Similarly, there is a high possibility that envelope detection will occur with the base-emitter diode of the transistor Ql2 and the capacitor C.

抵抗RlOの抵抗値が大きいほどその可能性が大きい。
検波が行こなわれると高周波が発生してくる。高周波レ
ベルが大きく、次数が高くなると放送電波とビードを起
し、画面に妨害を与えるという欠点を有する。ところで
設計段階でRlO,C3をうまくえらべば増幅だけして
検波しないようにできるが、IC化した場合バラツキに
より検波する可能性が出てくる。 (IC化した時、抵
抗バラツキは±20%、容量バラツキは±50%はあり
、更に入力信号の大きさもばらつく。)本発明は第2図
に示す回路中のトランジスタQl,のエミツタとトラン
ジスタQ,lのベース間にインピーダンス素子を挿入す
る事によつて上記の如き欠点のない高周波増幅回路を提
供せんとするものである。
The possibility of this happening increases as the resistance value of the resistor RlO increases.
When the detection is performed, high frequency waves are generated. When the high frequency level is high and the order is high, it has the disadvantage that it creates beads with the broadcast radio waves and interferes with the screen. By the way, if RlO and C3 are selected well at the design stage, it is possible to only amplify and not detect the signal, but if it is integrated into an IC, there is a possibility that the signal will be detected due to variations. (When integrated into an IC, the resistance variation is ±20%, the capacitance variation is ±50%, and the input signal size also varies.) .

以下、本発明の一実施例を第2図に基づいて説明する。Hereinafter, one embodiment of the present invention will be described based on FIG. 2.

図において、C4はトランジスタQl,のエミツタとト
ランジスタQ,lのベース間に挿入されたコンデンサで
、その容量は1〜3PF程度の小さなものである。 (
なお、該コンデンサC4以外は前述したと同一のもので
ある。)次に、その動作について説明する。まずIC回
路のばらつきによりトランジスタQllのベース入力が
大きくなつた場合を考えると、トランジスタQl,のベ
ースでは高周波信号振幅が大きくなるので検波作用がお
こり、トランジスタQl2のエミツタには高調波が現わ
れる。
In the figure, C4 is a capacitor inserted between the emitter of transistor Ql and the base of transistor Ql, and its capacitance is small, about 1 to 3 PF. (
Note that the components other than the capacitor C4 are the same as those described above. ) Next, its operation will be explained. First, considering the case where the base input of transistor Qll increases due to variations in the IC circuit, the high frequency signal amplitude increases at the base of transistor Ql, so a detection action occurs, and harmonics appear at the emitter of transistor Ql2.

高調波はキヤリアもろともトランジスタQl,、抵抗R
lO..コンデンサC,、抵抗Rllのエミツタピーキ
ング増巾により増幅され、トランジスタQ,,のエミツ
タから出てAFC回路へゆく。高次の高調波は途中の接
続リードなどをアンテナにして空中へとんでゆき、画像
に妨害を与える事になるが、コンデンサC,があると高
次高周波はコンデンサC4を通り、トランジスタQll
のベースに入つて負帰還され、その帰還信号はトランジ
スタQl2のエミツタで高調波をキヤンセルするように
作用する。また、前記コンデンサC4で負帰還している
ので、高調波が高次になればなるほどよく作用する。こ
のことは第4図、第5図に示すところからも明らかであ
る。即ち、コンデンサC,をつけた場合のトランジスタ
Q,,のエミツタに現われる出力の周波数スペクトル悌
5図)は、コンデンサC4をつけない場合の周波数スペ
クトル悌4図)に比して高次高調波が大巾に減衰してい
る事がわかる。基本波は2dB程度しか減衰しないが、
第4次高調波では20dB以上減衰している。)また、
抵抗RlOの抵抗値、コンデンサC,の容量が大きくな
つた場合にも検波がおこりやすくなり、高調波が出やす
くなるが、この場合もトランジスタQl3のエミツタと
トランジスタQllのベースとの間にコンデンサC4で
フイードバツクする事によつて防止できる。以上から明
らかなように本発明によれば、同期検波回路のキャリア
信号を入力とし、コンデンサによるエミツタピーキング
を施したトランジスタ増幅器の入力と出力との間に負帰
還となるようにコンデンサを挿入するという簡単な構成
で、IC化に適し、高次の高調.波を大巾に減衰させる
ことができるので画像に何等悪影響をおよぼす事のない
高調波増幅器を得る事ができる。
The harmonics are the carrier, transistor Ql, and resistor R.
lO. .. It is amplified by the emitter peaking amplification of capacitors C, and resistor Rll, and goes out from the emitters of transistors Q, , and goes to the AFC circuit. High-order harmonics use intermediate connection leads as antennas and fly into the air, causing interference with the image. However, with capacitor C, high-order high-frequency waves pass through capacitor C4, and transistor Qll
The feedback signal enters the base of transistor Ql2 and is negatively fed back, and the feedback signal acts to cancel harmonics at the emitter of transistor Ql2. Further, since negative feedback is provided by the capacitor C4, the higher the harmonic, the better the effect. This is clear from what is shown in FIGS. 4 and 5. In other words, the frequency spectrum of the output appearing at the emitter of transistor Q, when capacitor C, is attached (Figure 5) has higher harmonics than the frequency spectrum when capacitor C4 is not attached (Figure 4). It can be seen that there is a large attenuation. Although the fundamental wave is only attenuated by about 2 dB,
The fourth harmonic is attenuated by 20 dB or more. )Also,
If the resistance value of the resistor RlO and the capacitance of the capacitor C increase, detection will occur more easily and harmonics will be generated more easily, but in this case as well, a capacitor C4 is connected between the emitter of the transistor Ql3 and the base of the transistor Qll. This can be prevented by providing feedback. As is clear from the above, according to the present invention, a capacitor is inserted between the input and output of a transistor amplifier that receives a carrier signal of a synchronous detection circuit and performs emitter peaking using a capacitor so as to provide negative feedback. It has a simple structure, is suitable for IC implementation, and is capable of high-order harmonics. Since waves can be attenuated to a large extent, it is possible to obtain a harmonic amplifier that does not have any adverse effect on images.

なお、前記コンデンサC,を挿入する代りに、第3図A
に示すような妨害を与える高次高調波の周波数に共振し
た直列共振回路を挿入しても前述1,たと同様、その周
波数がフイードバツクされて減衰させられる。
Note that instead of inserting the capacitor C, the capacitor C shown in FIG.
Even if a series resonant circuit that resonates at the frequency of a high-order harmonic that causes interference as shown in 1 is inserted, the frequency will be fed back and attenuated as in 1 above.

また第3図Bは基本周波数に共振した並列共振回路で第
5図に示すような基本周波数の2〔DB〕の減衰を防止
するもので高調波のみが減衰する。更に第2図に示すコ
ンデンサC4のみの場合はQllのベースとQl,のエ
ミツタをICの隣接したピンに設ければ、ピン間容量(
2〜3PF)で代用し、外はコンデンサを設ける必要も
ない。
Further, FIG. 3B shows a parallel resonant circuit resonating with the fundamental frequency, which prevents attenuation of 2 [DB] of the fundamental frequency as shown in FIG. 5, and only harmonics are attenuated. Furthermore, in the case of only capacitor C4 shown in Fig. 2, if the base of Qll and the emitter of Ql are placed on adjacent pins of the IC, the inter-pin capacitance (
2~3PF), and there is no need to install a capacitor outside.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロツクダイヤグラム
、第2図は第1図の要部の具体的回路図、第3図は第2
図におけるコンテンサC4の変形例、第4図、第5図は
第2図のコンデンサC4を挿入しない場合、およびコン
デンサC4を挿入した場合の周波数スペクトルを示した
ものである。
FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a specific circuit diagram of the main part of FIG. 1, and FIG.
Modifications of the capacitor C4 shown in FIGS. 4 and 5 show frequency spectra when the capacitor C4 shown in FIG. 2 is not inserted and when the capacitor C4 is inserted.

Claims (1)

【特許請求の範囲】 1 同期検波回路のキャリア信号を入力とし、コンデン
サによるエミッタピーキングを施したトランジスタ増幅
器の入力と出力との間に負帰還手段を挿入した事を特徴
とする高周波増幅回路。 2 コンデンサによるエミッタピーキングを施したトラ
ンジスタ増幅器の入力と出力との間に負帰還となるよう
にコンデンサを挿入した事を特徴とする特許請求の範囲
第1項記載の高周波増幅回路。 3 コンデンサによるエミッタピーキングを施したトラ
ンジスタ増幅器の入力と出力との間に負帰還となるよう
に挿入したコンデンサの容量としてICピン間容量を用
いた事を特徴とする特許請求の範囲第2項記載の高周波
増幅回路。 4 コンデンサによるエミッタピーキングを施したトラ
ンジスタ増幅器の入力と出力との間に負帰還となるよう
にキャリア信号基本周波数に共振した並列共振回路を挿
入した事を特徴とする特許請求の範囲第1項記載の高周
波増幅回路。 5 コンデンサによるエミッタピーキングを施したトラ
ンジスタ増幅器の入力と出力との間に負帰還となるよう
に高次高調波に共振した直列共振回路を挿入した事を特
徴とする特許請求の範囲第1項記載の高周波増幅回路。
[Scope of Claims] 1. A high-frequency amplifier circuit which receives a carrier signal of a synchronous detection circuit as an input and is characterized in that a negative feedback means is inserted between the input and output of a transistor amplifier which is subjected to emitter peaking using a capacitor. 2. The high frequency amplifier circuit according to claim 1, characterized in that a capacitor is inserted between the input and output of a transistor amplifier subjected to emitter peaking using a capacitor so as to provide negative feedback. 3. The IC pin-to-pin capacitance is used as the capacitance of a capacitor inserted between the input and output of a transistor amplifier subjected to emitter peaking using a capacitor so as to provide negative feedback. High frequency amplifier circuit. 4. Claim 1, characterized in that a parallel resonant circuit that resonates with the fundamental frequency of the carrier signal is inserted between the input and output of a transistor amplifier subjected to emitter peaking using a capacitor so as to provide negative feedback. high frequency amplification circuit. 5. Claim 1, characterized in that a series resonant circuit that resonates with high-order harmonics is inserted between the input and output of a transistor amplifier with emitter peaking using a capacitor so as to provide negative feedback. high frequency amplification circuit.
JP51153970A 1976-12-20 1976-12-20 High frequency amplifier circuit Expired JPS5946468B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51153970A JPS5946468B2 (en) 1976-12-20 1976-12-20 High frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51153970A JPS5946468B2 (en) 1976-12-20 1976-12-20 High frequency amplifier circuit

Publications (2)

Publication Number Publication Date
JPS5377126A JPS5377126A (en) 1978-07-08
JPS5946468B2 true JPS5946468B2 (en) 1984-11-13

Family

ID=15574046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51153970A Expired JPS5946468B2 (en) 1976-12-20 1976-12-20 High frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5946468B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4599652A (en) * 1984-02-17 1986-07-08 Rca Corporation Dual channel IF TV receiver with AFT derived from the picture carrier in the sound channel
WO2023238818A1 (en) * 2022-06-08 2023-12-14 株式会社村田製作所 Power amplification circuit

Also Published As

Publication number Publication date
JPS5377126A (en) 1978-07-08

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