JPS5943451A - Signal processor with intelligent stand-by function - Google Patents

Abstract

PURPOSE:To simplify stand-by facilities, by detecting and switching a faulty processor to a stand-by processor when a fault occurring to the output of one of plural microprocessor which arithmetically process input signals to generate output signals is detected. CONSTITUTION:Plural in-use units 2-5 are provided with one switching arithmetic unit 6 which has an intelligent function. The switching unit 6 is connected to inputs of all the in-use units 2-5. Outputs of the in-use units 2-5 are connected to a control part 9, a CPU, and digital output circuits DOC1-DOC2 through an I/O interface 8. When the control part 9 detects an absence or fault among outputs from the in-use units 2-5, the unit is detected and the analog input switching circuit ASC of the switching unit 6 is put in operation; and arithmetic for the substitution of the faulty unit is performed to input the result to the control part 9 and inputted to the DOC1-DOC2 as well as normal units. The switching unit includes all functions of the in-use units. Consequently, a stand-by circuit is simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal processing device (1) having a plurality of processing units and a switching processing unit with intelligent preliminary functions, and in particular, the present invention relates to a signal processing device (1) having a plurality of processing units and a switching processing unit with intelligent preliminary functions. The present invention relates to a measurement processing device equipped with a plurality of processing sections that perform processing, and a switching processing section that has an intelligent standby function that selectively performs processing on inputs from a failed processing section.

Automatic control and remote monitoring of electric power equipment, etc. are widely practiced due to demands for labor saving, but duplication of equipment is required to ensure reliability of control.

Conventional duplication of control equipment is a complete duplication method in which at least the main parts of the control equipment are provided with both the active unit and its backup unit, which not only makes the equipment complex and expensive, but also requires a large installation floor space or mounting area. There was a drawback.

The object of the invention is to overcome the above-mentioned drawbacks of the prior art. The probability that a specific working unit and its spare unit will fail at the same time is as follows: when each working unit is provided with an independent spare unit, and when a single secondary unit has all the functions of each working unit. Comparing the two cases, if the function selection means of the cormorant equipment is ignored, the two cases are almost equal. Therefore, from the perspective of the probability of simultaneous failure of the working device and the standby device, the failure of all the working devices (
(By providing a single spare unit that can selectively perform the functions, it is possible to obtain almost the same effect as providing separate spare units for all the active units.

The present invention addresses this point by providing a plurality of processing units that perform various types of calculation processing in order to ensure high reliability of a visual measurement processing device that processes a large number of input signals, such as a visual measurement processing device that processes measurement signals. In contrast, the present invention provides a signal processing device such as an open-side processing device that is equipped with a switching arithmetic processing section having an intelligent preliminary function that selectively performs these arithmetic processing operations.

The present invention will be described in detail below with reference to the attached base.

FIG. 1 shows a block diagram of a signal processing device for power equipment embodying the present invention, and FIG. 2 shows its circuit diagram.

The signal processing device 1 shown in both figures samples the voltages and currents of each of the four power lines L1 to L4 such as power transmission lines, the value at time i, and the cycle, and calculates the effective values of the voltage and current, and the effective power. , calculate reactive power, frequency, and phase, and convert the results into digital transmission signals for remote control and monitoring, etc. Processing unit 2B, voltage transformer P of power line L1
Take input voltage and current 1 from T and current transformer CT,
Input transformer circuit TIC converts to an appropriate voltage l~, further analog input conversion circuit AIC and frequency input conversion circuit F
An input/output control unit that samples the instantaneous values and cycles of voltage and current using an IC, and processes the effective values of voltage and current, active power, reactive power, frequency, phase, etc. using a central processing circuit (CPU) equipped with a microprocessor. 7 as signal S.

processing unit) 3,4. and 5 have the same configuration as the processing unit 2 except for the frequency input conversion circuit FIC.

However, in the present invention, the processing units 2 to 4 may all have different configurations. In the illustrated example, a switching arithmetic unit 6 having one reserve function is provided for four processing units, but the number of active processing units, the number of switching arithmetic units, and the relationship between the two are limited to the illustrated example. It's not a thing.

The circuit shown in FIG. 3 is the switching arithmetic unit 6 in FIG.
An example of 7q configuration is shown. The analog input switching circuit ASC is controlled by the central processing circuit CPU and selects one series of input signals from the inputs L1 to T and 4. The selected input signal is input to the analog input conversion circuit AIC.
Four elements (voltage x 2. current x 2) are selected by PXl and sampled by sample hold S/H. Furthermore, for each of these four sampled elements, each input element is A
Analog-to-digital conversion is performed using DC and the data is recorded in the memory element RAM. By this means, data obtained by sampling a plurality of input elements every four elements is recorded in the RAM.

Similarly, the input signal selected by the ASC is also input to the frequency input converter FIC. The input signal is counted and the data is recorded in the memory element RAM.

All data sampled by the AIC and FIC are stored in each storage element, and when sampling is completed, an interrupt signal is generated to the central processing circuit CPU. C.P.
U takes in sampled data into AIC and FIC according to a program stored in storage element ROMK, and performs arithmetic processing as described below.

Note that the processing units 2 to 5 shown in FIG. 2 have a configuration in which the switching input circuit of the switching calculation unit described above is omitted.

As an example of the ↑γ processing, let S be the output signal S of the processing unit 2 that is expressed in terms of active power and voltage.

Assuming that the sample and hold S I-I performs sampling 8 times per second, the processing unit 2
The central n-circuit CPU performs the following calculations, for example.

P4= P12×Tt + P32 X hHere, P
lz is the voltage between wires 1 and 2 of the 3 wires when the line L1 is a 3-phase 3-wire system, P32 is the voltage between wires 3 and 2, Il
is a signal indicating the current in line 1, t is a signal indicating the current in line 3, and t
L is a code that indicates the order of the sacred trees using consecutive numbers when eight target trees are extracted every cycle of the commercial frequency. When n is 1 to 81, it is the measurement value of the 1st cycle, and when n is 9 to 16.
1 indicates the measured value of the second cycle, and so on.

Equation (1) above calculates the instantaneous power value calculated by the two-power meter method to 1
Corresponds between integrations to average over 6 cycles.

V7 == PI3 X PI3 The above equation (2) corresponds to the integration amount for determining the effective value obtained by averaging the 11 o'clock voltage value over 16 cycles when sampling is performed 8 times/Hz.

It is known that the processing unit output signal Sq indicating reactive power can be obtained by applying appropriate phase conversion to the measured values of voltage and current, and then performing arithmetic processing similar to equation (1). The signal S representing current and current is calculated by applying the same operation as equation (2) to the measured value of current.
It can be obtained by doing.

The input/output control unit 7 receives the processing unit quantity signals SA and Sv, etc., and receives signals D7. etc. (After 7, the next operation!1' processing is performed to calculate the effective 7 power P and the effective voltage value Va.

Pa = ■GuI Dp = IguI SF
'・””
(3) However, ■gl is a constant determined by the sampling frequency, the number of cycles used to calculate the average value R1 in equation (1), the required output scale, etc.

V, -Tgu2, rl); = K2 JT
v′−”・(4) However, K2 is a constant determined by the sampling frequency, the number of cycles included in the average value calculation of equation (2), the required output scale, etc.

The reactive power Q4 and the effective current value a are obtained by subjecting the processor quantity power signals Sg and S (2) to the same calculation process as in equations (3) and (4), respectively.

The frequency f is, for example, the measurement of the period T of the voltage @'4.
It is counted inside the frequency μ input converter FIC shown in the figure.

After digitization 1-2), the inverse number is calculated. The phase angle .theta. can be converted into an angular digital signal - for example by counting the phase difference between the voltages of different lines inside the frequency input converter FIC and comparing it with the period T.

As mentioned above, arithmetic processing is applied to the analog measured value input signals such as No. 4g treatment unit 1, voltage, current, etc. of the illustrated embodiment,
Active power, reactive power, frequency, phase angle.

Generates digital output signals representing effective current values, effective voltage values, etc. However, the input signals and output signals of the present invention are respectively i1 analog (not limited to g-signals and digital signals, and one illustrated embodiment has four processing units). 2.3.4, and 5 The processing unit 2 has a frequency input converter FICk and performs wave number calculation, but the three processing units 1 nit 3.4 and 5 do not perform frequency calculation. In general, it is possible for the plurality of steel processing units Q' included in the signal processing device I to perform different dredging treatments.

Due to the redundancy of the signal processing device 1, the present invention provides a plurality of common processing units 2.3.4. and 5 against zono1. Instead of providing all stages of a plurality of corresponding preprocessing units, only a small number, for example, one switching arithmetic unit (6) having an intelligent preprocessing function is provided. In one embodiment of the invention shown in FIG. 2, the switching R-L unit 6 is connected to the inputs of all common processing units 2, 3, 4, and 5.

The input/output control unit 7 includes regular processing units 2.3.
4.5 and an input/output interface circuit 8 connected to the switching arithmetic unit 6 and having an input section, and a control section 9 connected to the input/output interface circuit 8,
Ru. One of the outputs of the control section 9 is connected to the switching calculation unit 6, and the other output is connected to the central processing circuit CPU and digital output circuits DOCI and DOC2. Digital output circuit J) OCI and DOC2 process the measurement conversion values given via the control unit 9 from several processing units 2 to 5 into a required format and output them as digital output signals DOI and DO2 to other devices. (not shown).

In Figure 2, for convenience of explanation, the system ? Although the 1111 section 9'lf is shown as an independent means, all the functions of the control section 9 described below are input/output? Central processing circuit CPU of li control unit 7
The command may be included in the function of 7 and processed by a program, and the command may be transmitted to the switching arithmetic unit by transmission processing via an input/output interface circuit.

The malfunction of the switching arithmetic unit 6 and the control yitX9 will be explained with reference to FIGS. 4 and 5. The input/output interface 8 of the signal processing device output control unit 7 receives the output signal S from the processing section as a reception signal. As shown in FIG. 4, when one of the processing units fails, its output signal S is lost.

The received signal at the input/output interface 8 of the input/output control unit 7 is lost. The logic circuit 10 of the control unit 9 shown in FIG. 5 transmits the received signal to I4. (Kade 5f digital circuit DOCI
, DOC2, etc., continuously.

However, if, for example, a signal dropout is detected five times in a row in the received signal, the logic circuit 10 of the control section 9 will detect the missing signal [immediately cause a failure!]. 41. Detect the science part, the fifth
As shown in the figure, the analog input switching circuit ASC of the switching calculation unit is operated to switch the input of the failure processing unit to 1.
．． 71 switching arithmetic unit 7, and selecting it as input to the analog input converter of this unit, the program switching means PRLK transfers the arithmetic program of the fault processing unit to, for example, the central processing circuit CPU of the human output control unit 7. Switching is performed by the central processing circuit CPU of the switching calculation unit 6 according to the command from υ.

Therefore, in this case, the switching arithmetic unit 6 needs to have program information for the slightly different parts of the arithmetic programs of the processing units 2 to 5. The switching operation unit 6 is started by the signal indicating the completion of this switching, the signal indicating the detection of the failure processing unit, and the output signal of the AND circuit (in addition to the AND circuit in Figure 5. When activated, the switching arithmetic unit output signal S8 shown in FIG.
-7's input/output interface 8 to the human input signal 1〕8
As reached 1, input signal to its ft1li supra9 ■)8
is added.

It is clear from the switching of the input and arithmetic processing of the switching arithmetic unit 6 that this input signal D8 coincides with the input signal from the failure processing unit.

Therefore, the control section 9 impairs the normal operation of the signal processing device 1 due to the presence of the null signal D8 from the switching arithmetic unit 6 which replaces the input signal from the failed processing unit.

1. When a processing unit failure is detected, the control unit 9 energizes the light emitting diode LED shown in FIG. 4 [- to indicate the occurrence of failure. As a result, maintenance personnel repair the failure processing unit, and when the repair is completed, manually switch the processing unit 6f.
The stopped and repaired processing unit is connected to the signal processing device 1 and returned to operation by the regular processing unit, and the switching arithmetic unit 6 returns to the standby state. As a result, the operation of the preliminary function of the switching arithmetic unit 6 is completed, and the state becomes ready for the primary operation.

The inventors succeeded in setting the time t from the start of the loss of the processing unit output S shown in FIG. 4 to the reception of the output S8 of the switching arithmetic unit 6 to about 2.2 seconds.

Failure of the regular processing unit can be detected simply by the lack of its output S; it is also possible to detect a failure by using other information, such as an abnormality in the signal.

As explained above, according to the tree invention, one. A switching arithmetic unit with an intelligent standby function is installed, and when a regular processing unit fails, the input of the switching arithmetic unit is switched to the input of the faulty processing unit, and the arithmetic program of the central processing circuit of the switching arithmetic unit By switching +1'j to the arithmetic program of the faulty processing unit, it is possible to achieve highly reliable signal processing with only one switching arithmetic unit.

In order to further improve reliability, as shown in Figure 6, 6 switching units are provided, as well as a preliminary input/output control unit. Connect a in parallel with the regular input/output control unit 7
This portion of the signal processing device 1 can also be duplicated.

The effects achieved by the wood invention are as follows.

(1) Processing 3Bl of a signal processing device having several processing units
Since the J-section knee evolution can be realized by providing one processing section with intelligent backup capability, reliability can be improved economically.

(2) Since the number of parts can be reduced as a dual storage device, miniaturization is possible.

[Brief explanation of the drawing]

Fig. 1 - Appearance of an embodiment of the present invention 1. Light diagram, 2. 161g
'+'+ Figure 1 is a block diagram of the disaster example, Figure 3 is the input analog circuit 7□゛) 4th side, 4th IL1 failure RoJ1
1), 1, 5, wa!: fl
Figure 11 and Figure 6 (showing the four sides of another embodiment of the Amagi invention) 1...Signal processing device, 2.3.4.5...Processing Unit, 6... Switching calculation unit, 7... Input/output control 1.1 nits, 8... Input/output intern eighth circuit, 9...?Ii control section, 10... Fault detection disorder Hand F, ■...Input signal, Dot, DO
2...output signal, CPU...central p-circuit,
ASC...Analog manual switching circuit, l) R
L...Program switching means. Figure 3 Figure 4 LED @

Claims (1)

[Scope of Claims] A plurality of processing units each having a microprocessor that performs arithmetic processing on an input signal and outputs an output signal. a switching arithmetic processing section having means for selecting inputs of the plurality of processing sections and a spare microprocessor for selectively performing arithmetic processing of the microprocessor; and means for detecting a failure processing section; A signal processing device having an intelligent standby function, comprising: an input switch means for causing the selection means to select; and a control section having an arithmetic switching means for causing the standby microprocessor to select the arithmetic processing by the microprocessor of the failure processing section. .