JPS594313A - Impedance matching circuit - Google Patents

Impedance matching circuit

Info

Publication number
JPS594313A
JPS594313A JP11284482A JP11284482A JPS594313A JP S594313 A JPS594313 A JP S594313A JP 11284482 A JP11284482 A JP 11284482A JP 11284482 A JP11284482 A JP 11284482A JP S594313 A JPS594313 A JP S594313A
Authority
JP
Japan
Prior art keywords
circuit
impedance
matching
antenna
transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11284482A
Other languages
Japanese (ja)
Inventor
Miki Kobayashi
小林 三樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11284482A priority Critical patent/JPS594313A/en
Publication of JPS594313A publication Critical patent/JPS594313A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/28Impedance matching networks

Landscapes

  • Networks Using Active Elements (AREA)
  • Transmitters (AREA)

Abstract

PURPOSE:To obtain a matching circuit suitable for the transmission of a transmission signal of large power, by using a reactance tube for a circuit network for impedance matching. CONSTITUTION:Matching circuits 10-1, 10-2 are connected between a transmission output circuit 1 and an antenna 6. The matching circuits consist of the reactance tube and a matching capacitor C using an FET10. The capacitance of the FET10 is changed by changing a gate voltage. Thus, a variable capacitance of the FET is added to the matching capacitor C by changing the gate voltage of the FET10, the matching between the antenna circuit and a transmitter output circuit is done easily.

Description

【発明の詳細な説明】 (a)  発明の技術分野 本発明は携帯無線機等の送信出力回路とアンテナインピ
ーダンスとを整合させるためのインピーダンス整合回路
に関す。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to an impedance matching circuit for matching an antenna impedance with a transmission output circuit of a portable radio device or the like.

(b)  従来技術と問題点 携帯用無線機のアンテナインピーダンスハ使用形態によ
って変化する。
(b) Prior Art and Problems The antenna impedance of portable radio equipment changes depending on the usage pattern.

上記の解決策として従来第1図及び第2図に示すごとき
方法がとられている。
As a solution to the above problem, the methods shown in FIGS. 1 and 2 have conventionally been used.

第1図において無線機の送信出力回路1よ多出力される
送信4号はインダクタンス(Lo) 2と可変コンデン
サ(Cvl、Cv2)3 # 4によって構成されるイ
ンピーダンス整合用の回路網5を経てアンテナ6に出力
される。この時の回路網5の特性インピー1−7 スZ
。=no7τ誉、(但しCvl= Cv2 )となシ、
その入力インピーダンスR1nはR1n= (Zo’ 
)’/RLとなる8、それ故、送信出方回路1の出方イ
ンピーダンスRout gをアンテナインピーダンスに
整合させるにはコンデンサ(Cvl ) 3、g変コン
デンツ°(CV2 ) 4を変化さぜることにょシ入カ
インピーダンスRinをRoutに一致させる。この場
合コンデンサ3,4は機械的に回転させる必要がある0 第2図は#!1図の可変コンデンサ3,40代シに電圧
可変容量ダイオード7.8を使用したものである。この
場合、電圧可変容量ダイオード7.8の電圧特性が低い
ため送信出力が増加したとき送信々号が該電圧可変容量
ダイオード7.8で歪を受けることに々る。
In Fig. 1, the transmitting signal 4, which is output more than the transmitting output circuit 1 of the radio, is connected to the antenna via an impedance matching circuit network 5 composed of an inductance (Lo) 2 and variable capacitors (Cvl, Cv2) 3 #4. 6 is output. At this time, the characteristic impedance of the circuit network 5 is 1-7 Z
. = no7τ Homare, (however, Cvl= Cv2) Tonashi,
Its input impedance R1n is R1n= (Zo'
)'/RL 8. Therefore, in order to match the output impedance Rout g of the transmission output circuit 1 to the antenna impedance, change the capacitor (Cvl) 3 and the g variable content ° (CV2) 4. The input impedance Rin is made to match Rout. In this case, capacitors 3 and 4 need to be rotated mechanically 0 Figure 2 shows #! A voltage variable capacitance diode 7.8 is used for the variable capacitor in the 3rd and 40th generation shown in Figure 1. In this case, since the voltage characteristics of the voltage variable capacitance diode 7.8 are low, when the transmission output increases, the transmitted signal is often distorted by the voltage variable capacitance diode 7.8.

以上従来方式では可変コンデンサ或い線電圧可変容量ダ
イオードを使用しているため該整合回路が大形化したシ
、またコンデンサ制御用の電力を必要としたシ或いは送
信信号の出力増加に対し直線性が劣化したシする欠点が
ある0 ((+)  発明の目的 本発明は上記の欠点を解決するためにインピーダンス整
合用の回路網にリアクタンス管を用いて伝送電力の大き
い電子制御方式の新規のインピーダンス整合回路を提供
することを目的とする。
As mentioned above, the conventional system uses a variable capacitor or a line voltage variable capacitance diode, which increases the size of the matching circuit, requires power to control the capacitor, or reduces linearity when the output of the transmission signal increases. 0 ((+) Purpose of the Invention In order to solve the above-mentioned drawbacks, the present invention provides a novel impedance control method using a reactance tube in an impedance matching circuit network, which uses a high transmission power and is electronically controlled. The purpose is to provide a matching circuit.

(d)  発明の構成 本発明は上記の目的を達成させるために無線装置の送信
出力回路と、アンテナとのインピーダンスを整合させる
回路網において、核回路網の容量をリアクタンス管を用
いて構成し、核リアクタンス管の容量を可変して核回路
の特性インピーダンスを可変してアンテナと送信出力回
路のインピーダンスとを整合させることを特徴とする。
(d) Structure of the Invention In order to achieve the above object, the present invention configures the capacity of the nuclear circuit network using a reactance tube in a circuit network that matches the impedance of a transmission output circuit of a wireless device and an antenna. It is characterized in that the characteristic impedance of the nuclear circuit is varied by varying the capacity of the nuclear reactance tube to match the impedance of the antenna and the transmission output circuit.

(e)  発明の実施例 以下本発明を図面に基づいて説明する。第3図は本発明
を説明するための回路網を示す。同図で回路網5はイン
ダクタンス(LD ) 2とコンデンサ(CO)9.9
′とで構成され、核回路網5の特性インピーダンスZo
は2゜=a=Z羽で表示され、出力側にアンテナ負荷R
Lを接続したときの入力インピーダンスR1nはRi 
n = Zo”/RLとなる。ここで変化するアンテナ
インピーダンスRLを送信出力回路1の出力インピーダ
ンスに整合させるべくコンデンサ(Co ) 9.9’
をアクタンス管回路を用いて調整する0 第4図は電源効果トランジスタを用いたりアクタンス管
回路の原理図を示す。同図において、電界効果トランジ
スタ(以下FETと記す)10のス トレインDとアーj/E間が作る容量COはC6中CR
ggmで与えられる。ここでRgijFETのゲートG
のバイアス用抵抗、Cはコンデンサ、gmは相互コンダ
クタンスを示す。
(e) Examples of the Invention The present invention will be explained below based on the drawings. FIG. 3 shows a circuitry for explaining the invention. In the same figure, the circuit network 5 has an inductance (LD) of 2 and a capacitor (CO) of 9.9.
', and the characteristic impedance Zo of the nuclear network 5 is
is expressed as 2゜=a=Z wings, and the antenna load R is on the output side.
The input impedance R1n when L is connected is Ri
n = Zo''/RL. In order to match the changing antenna impedance RL to the output impedance of the transmission output circuit 1, a capacitor (Co) 9.9' is used.
0 is adjusted using an actance tube circuit. Figure 4 shows a principle diagram of an actance tube circuit using a power effect transistor. In the same figure, the capacitance CO created between the strain D and the arc j/E of the field effect transistor (hereinafter referred to as FET) 10 is CR in C6.
It is given in ggm. Here, the gate G of RgijFET
, C is a capacitor, and gm is mutual conductance.

FETl0のゲート電圧を変化させるとgmが変化し、
容■Coを変化させることが出来、これによシアンテナ
インピーダンスRLに対応した回路網の動性インダクタ
ンスを作るととが出来る。
When the gate voltage of FETl0 is changed, gm changes,
This allows the dynamic inductance of the circuit network to correspond to the antenna impedance RL.

毘5図は本発明の実施例で、1は送信出力回路、10−
1.10−2は第4図に示したFETを用いたリアクタ
ンス管で、flS3図に示したコンデンサ(C4)9.
9′と等価容量を示す。即ち第5図で1o−i。
Figure 5 shows an embodiment of the present invention, in which 1 is a transmission output circuit, 10-
1.10-2 is a reactance tube using the FET shown in Fig. 4, and the capacitor (C4) 9. shown in Fig. flS3.
9' indicates the equivalent capacitance. That is, 1o-i in FIG.

10−2のりアクタンス管で作られるコンデンサ(によ
って終端、され、その入力インピータンスRimはRl
m += Zo’/RL=L6 /IもL 11 Co
となるから、送信出力回路1の出力インピーダンスRo
u、tがRimに近似するようにFETのgmを髪化さ
ぜることによシ所望のCoを得ることが出来る。これに
よ、i7Rim#Routとなp送信出力回路の出力を
九人電力でアンテナIより送出できる。
The input impedance Ri is Rl
m += Zo'/RL=L6 /I is also L 11 Co
Therefore, the output impedance Ro of the transmission output circuit 1 is
The desired Co can be obtained by adjusting the gm of the FET so that u and t approximate Rim. As a result, the output of the p transmission output circuit such as i7Rim#Rout can be sent out from the antenna I with nine people's power.

第6図は本発明の他の笑施向で、同図は特に第1図の可
変答ii3,4にFETの回路10−3 、10−4に
tit、換したものでFETの電流容量または電力容量
、耐圧を大きくして任意の電力で伝送線路のアンテナイ
ンピーダンスへの貼合が出来るようにしたものである。
FIG. 6 shows another embodiment of the present invention, in particular, the variable answers ii3 and 4 in FIG. The power capacity and withstand voltage are increased so that it can be attached to the antenna impedance of the transmission line with any power.

ダイオードCD1lは送信信号を直流再生してFETの
ドレン電源(直流成分)を得るために挿入しである。
The diode CD1l is inserted to regenerate the transmission signal into DC and obtain a drain power source (DC component) for the FET.

上記の第5図、あ6図においてFETl0−1〜10−
4のゲート電圧を適宜に制御することによシ回路網のイ
ンピーダンスを制御1出来るので、アンテナのインピー
ダンスの変化に対応てきる電子制御方式のインピーダン
ス整合回路が得ら、する。
In the above figures 5 and 6, FET10-1 to 10-
Since the impedance of the circuit network can be controlled by appropriately controlling the gate voltage of 4, it is possible to obtain an electronically controlled impedance matching circuit that can respond to changes in the impedance of the antenna.

(f)  発明の効果 υ正本発明によれば、アンテナインピーダンスの変化に
対応出来る整合回路網の特性インピーダンスをFETの
ゲート電圧を制御することにより整合できる利点を有す
る(、 またFET1j電力容完が、大きいので大電力の送信信
号の伝送に適している。
(f) Effect of the invention υ Positive According to the present invention, there is an advantage that the characteristic impedance of the matching network that can respond to changes in antenna impedance can be matched by controlling the gate voltage of the FET (also, the power capacity of FET 1j is Because it is large, it is suitable for transmitting high-power transmission signals.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来例のインピーダンス整合回路、第
3図は整合回路網の等価回路、第4図はFETのりアク
タンス管回路、第5図は本発明の実施例、第6図は本発
明の他の実施例を示す。 図中、lは送イh出力回路、2はインダクタンス、3.
4は可変コンデンサ、5は整合回路網、6はアンテナ、
又は負荷、7,8は′電圧可変容量ダイオード、9,9
′は、コジグンサ\ 10はFET、10−1.10−
2.10−3.10−4はFETのリアクタンス管回路
を示ブ0 第づ図 り 第4斤 CR1ぴ。
Figures 1 and 2 are conventional impedance matching circuits, Figure 3 is an equivalent circuit of the matching network, Figure 4 is an FET actance tube circuit, Figure 5 is an embodiment of the present invention, and Figure 6 is an equivalent circuit of the matching network. Another example of the present invention is shown. In the figure, 1 is the transmission output circuit, 2 is the inductance, and 3.
4 is a variable capacitor, 5 is a matching network, 6 is an antenna,
Or load, 7, 8 are 'voltage variable capacitance diodes, 9, 9
' is Kojigunsa\ 10 is FET, 10-1.10-
2.10-3.10-4 shows the FET reactance tube circuit.

Claims (1)

【特許請求の範囲】[Claims] 無線装置の送信出力回路とアンテナとのインピーダンス
を整合させるための回路網路において、該回路網の容量
をリアクタンス管を用いて構成し、該リアクタンス管の
容量を可変して該回路網の特性インピーダンスを可変さ
せて前記アンテナのインピーダンスと送信出力回路のイ
ンピーダンスとを整合させることを特徴とするインピー
ダンス整合回路。
In a circuit network for matching the impedance between a transmission output circuit of a radio device and an antenna, the capacity of the circuit is configured using a reactance tube, and the characteristic impedance of the circuit is changed by varying the capacity of the reactance tube. An impedance matching circuit characterized in that the impedance of the antenna and the impedance of the transmission output circuit are matched by varying the impedance of the antenna.
JP11284482A 1982-06-30 1982-06-30 Impedance matching circuit Pending JPS594313A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11284482A JPS594313A (en) 1982-06-30 1982-06-30 Impedance matching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11284482A JPS594313A (en) 1982-06-30 1982-06-30 Impedance matching circuit

Publications (1)

Publication Number Publication Date
JPS594313A true JPS594313A (en) 1984-01-11

Family

ID=14596942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11284482A Pending JPS594313A (en) 1982-06-30 1982-06-30 Impedance matching circuit

Country Status (1)

Country Link
JP (1) JPS594313A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9680441B2 (en) 2012-09-28 2017-06-13 Taiyo Yuden Co., Ltd. Impedance matching circuit and antenna system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9680441B2 (en) 2012-09-28 2017-06-13 Taiyo Yuden Co., Ltd. Impedance matching circuit and antenna system

Similar Documents

Publication Publication Date Title
US4051475A (en) Radio receiver isolation system
US9647631B2 (en) Tunable impedance matching network
US3973089A (en) Adaptive hybrid circuit
AU662186B2 (en) Amplifier circuit for electret condenser microphone
KR20080007635A (en) System and method for dynamic impedance tuning to minimize return loss
DE102013217545B4 (en) SYSTEM AND METHOD FOR SENDING A HIGH FREQUENCY SIGNAL BY A SPEAKER COIL
US20050206448A1 (en) Apparatus, methods and articles of manufacture for electromagnetic processing
KR20010102417A (en) Method and circuit for providing interface signals between integrated circuits
US4763087A (en) Impedance matching network
US20230072796A1 (en) Tracker module, power amplifier module, radio frequency module, communication device, and radio frequency circuit
US7187231B2 (en) Apparatus, methods and articles of manufacture for multiband signal processing
CN109039288A (en) Tunable gain equalizer
US12068720B2 (en) Barely Doherty dual envelope tracking (BD2E) circuit
JPS594313A (en) Impedance matching circuit
US5915223A (en) Multimode radiotelephone
JPH0583086A (en) Analog variable phase shifter for microwave signal
US6222928B1 (en) Universal impedance matcher for a microphone-to-radio connection
JPS61161028A (en) Antenna input circuit
JP2005027246A (en) Group delay time regulator
US20230179242A1 (en) Radio frequency device and multi-band matching circuit
JPH0413855Y2 (en)
US4050072A (en) Signal combining apparatus
JPS63185213A (en) Input circuit
JPH06260885A (en) Variable impedance circuit
GB2536678A (en) Reconfigurable multi-band circuit network with negative impedance converter