JPS5941922A - Channel selecting device - Google Patents

Channel selecting device

Info

Publication number
JPS5941922A
JPS5941922A JP15375382A JP15375382A JPS5941922A JP S5941922 A JPS5941922 A JP S5941922A JP 15375382 A JP15375382 A JP 15375382A JP 15375382 A JP15375382 A JP 15375382A JP S5941922 A JPS5941922 A JP S5941922A
Authority
JP
Japan
Prior art keywords
tuning
voltage
frequency
digital
counting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15375382A
Other languages
Japanese (ja)
Inventor
Tsugio Suzuki
次男 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15375382A priority Critical patent/JPS5941922A/en
Publication of JPS5941922A publication Critical patent/JPS5941922A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J7/00Automatic frequency control; Automatic scanning over a band of frequencies
    • H03J7/18Automatic scanning over a band of frequencies
    • H03J7/20Automatic scanning over a band of frequencies where the scanning is accomplished by varying the electrical characteristics of a non-mechanically adjustable element
    • H03J7/28Automatic scanning over a band of frequencies where the scanning is accomplished by varying the electrical characteristics of a non-mechanically adjustable element using counters or frequency dividers

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To pull-in tuning frequencies in a wide range, by pulling in a tuning frequency which is given to an electronic tuning tuner, to an optimum tuning frequency by an AFC circuit after changing the tuning frequency to the low frequency side by counting-down if the tuning frequency is shifted from the optimum tuning frequency to the high frequency side. CONSTITUTION:When an AFC voltage is lower than a reference voltage V1 and os higher than a reference voltage V2, and the tunig frequency is higher than an optimum tuning point, a channel selecting circuit 2 sends a signal to a count- down circuit 8 to count down the value, which is set in an up/down circuit 3 by the circuit 8 by a prescribed value, and changes the tuning frequency to the low frequency side. The circuit 2 discriminates the compared result between the AFC voltage due to an AFC circuit 4 and voltages V1 and V2, and the tuning frequency is hifted to the high frequency side by counting-up when the AFC voltage is shigher than the voltage V1, and the tuning frequency is shifted to the low frequency side by counting-down in the circuit 3. Thus, the tuning frequency is approximated to the optimum tuning frequency.

Description

【発明の詳細な説明】 本発明はテレビジョン受像機及びFM、AMラジオ受信
機等に利用できるディジタル同調選局装置に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital tuning tuning device that can be used in television receivers, FM and AM radio receivers, and the like.

近年、テレビジョン受像機及びFM、AMラジオ受信機
等において、同調回路の容量に可変容量ダイオードを用
い、これに同調電圧を加えて同調をとる電子同調チュー
ナが主流となってきたが、可変容量ダイオードに与える
同調電圧をディジタル量として処理するいわゆるボルテ
ージ・シンセサイザ方式により、同調周波数を制御し選
局することができる。
In recent years, electronic tuning tuners have become mainstream in television receivers, FM, AM radio receivers, etc., which use variable capacitance diodes as the capacitance of the tuning circuit and tune by applying a tuning voltage to this. Tuning frequency can be controlled and channel selection can be performed using a so-called voltage synthesizer method in which the tuning voltage applied to the diode is processed as a digital quantity.

以下、第1図に示す従来のボルテージ・シンセサイザ方
式による選局装置を説明する。
Hereinafter, a conventional channel selection device using a voltage synthesizer method shown in FIG. 1 will be explained.

第1図において、スイッチ手段(1)から選局手段(2
1に信号が送られ、これによって選局手段(2)は、同
調電圧に相当するディジタル量を記憶手段(5)から読
み出し、アップダウンカウント手段(31に与える。ア
ップダウンカウント手段(3)のディジタル出力は、デ
ィジタル/アナログ(D//\)変換器(6)に送られ
て、直流電圧に変換され、そのアナログ出力は、同調電
圧の少なくとも一部として電子同調チューナ(7)に印
加されて同調周波数が与えられる。アップダウンカウン
ト手段(3)は、カウントアツプすると同調周波数は高
周波数側え変化し、カウントダウンすると同調周波数は
、低周波数側へ変化する。(4)は自動周波数調整(A
FO)手段である。
In FIG. 1, from the switch means (1) to the channel selection means (2),
1, the tuning means (2) reads a digital amount corresponding to the tuning voltage from the storage means (5) and gives it to the up/down counting means (31). The digital output is sent to a digital-to-analog (D//\) converter (6) and converted to a DC voltage, the analog output of which is applied to an electronic tuning tuner (7) as at least part of the tuning voltage. The up/down count means (3) changes the tuning frequency toward a higher frequency when counting up, and changes toward a lower frequency when counting down.(4) is an automatic frequency adjustment ( A
FO) means.

第2図(a)ib)および(C1は、AFO手段(4)
の動作を説明するための信号波形図である。第2図(a
lは同調周波数を所定放送周波数の低周波数側から高周
波数側へ変化させたときに、同調点近傍において8字カ
ーブに変化をする自動周波数調整(AFC)電圧を示し
、v1招よびV2は基準電圧で、AFO電圧の中央電圧
をVOとすると、Vl ) ’Vo > V2に選ばれ
ている。
Figure 2 (a) ib) and (C1 is the AFO means (4)
FIG. 3 is a signal waveform diagram for explaining the operation of FIG. Figure 2 (a
l indicates the automatic frequency adjustment (AFC) voltage that changes in a figure-8 curve near the tuning point when the tuning frequency is changed from the low frequency side to the high frequency side of the predetermined broadcasting frequency, and v1 and V2 are the reference voltages. In terms of voltage, if the center voltage of the AFO voltage is VO, then Vl)'Vo>V2.

第2図ft)lは、AFO電圧と基準電圧Vlとを比較
した信号波形、AFO電圧がvlより大きいとき゛Hル
ベル、AFO電圧が■1より小さいとき1Lルベルとな
る。また、第2図(O)はAFO電圧と基準電圧V2と
を比較した信号波形、AFO電圧がv2より大きいとき
t Llレベル、A、FO電圧が■2より小さいときは
°Hルベルとなる。
ft)l in FIG. 2 is a signal waveform obtained by comparing the AFO voltage and the reference voltage Vl. When the AFO voltage is larger than vl, it is a H level, and when the AFO voltage is smaller than 1, it is a 1L level. Further, FIG. 2(O) shows a signal waveform comparing the AFO voltage and the reference voltage V2, and when the AFO voltage is larger than v2, it is t Ll level, and when the FO voltage is smaller than ■2, it is the °H level.

AF’O手段(4)は、電子同調チューナからのノ〜F
C電圧と基準電圧Vl、V2とを比較し、A F O電
圧がVlより大きいとき(第2図(a)の点Aから点B
の範囲)、アップダウンカウント手段(3)でカウント
アツプさせ、同調周波数を高周波数側へ変化させる。A
FO電圧がV2より小さいとき(第2図(a)の点りか
ら点Eの範囲)、A F 0手段(4)はアップダウン
カウント手段(3)でカウントダウンさせ、同調周波数
を低周波数側へ変化させる。上記のようにA F 0手
段(41は、)\FO電圧を判断し、アップダウンカウ
ント手段(3)で同調周波数を変化させて、WS2図(
a)の最適同調点Cに近づけるように働く。
The AF'O means (4) is an electronically tuned tuner.
Compare the C voltage with the reference voltages Vl and V2, and when the AFO voltage is greater than Vl (from point A to point B in Figure 2 (a)
range), the up/down counting means (3) counts up and changes the tuning frequency to a higher frequency side. A
When the FO voltage is smaller than V2 (range from the dot to point E in Figure 2 (a)), the A F 0 means (4) counts down with the up/down count means (3) and shifts the tuning frequency to the lower frequency side. change. As mentioned above, the A F 0 means (41) judges the \FO voltage, changes the tuning frequency with the up/down count means (3), and calculates the WS2 figure (
It works to get closer to the optimal tuning point C in a).

したがって、記憶手段(5)から読み出した同調電圧が
、電子同調チューナに与えられたとき、へFG電圧が基
準電圧Vl及びV2と比較した結果、第2図←)の点A
から点Eの範囲ならば、AEO手段(4)はアップダウ
ンカウント手段(3)を制御し、同調周波数を最適同調
点Cに、引き込むことができる。
Therefore, when the tuning voltage read from the storage means (5) is applied to the electronic tuning tuner, the FG voltage is compared with the reference voltages Vl and V2, and as a result, the point A in FIG.
to point E, the AEO means (4) can control the up/down count means (3) to pull the tuning frequency to the optimum tuning point C.

ところで、選局手段(2)により記憶手段から読み出し
た同調電圧が、温度や電子同調チューナのドリフトなど
の原因によりAFO手段(4)により、引き込めない場
合がある。例えば第2図(A)の点Fのような同調電圧
が電子同調チューナに与えられた場合、ノ\FO手段(
4)により点(01に引き込むことはできない、 本発明は、上記の欠点を改善し確実に最適同調点に引き
込めるようにした選局装置を提供するものである。
By the way, the tuning voltage read from the storage means by the tuning means (2) may not be pulled in by the AFO means (4) due to reasons such as temperature or drift of the electronic tuning tuner. For example, when a tuning voltage like point F in FIG. 2(A) is applied to an electronic tuning tuner, the
4) It is not possible to pull in to the point (01).The present invention provides a tuning device that improves the above-mentioned drawbacks and makes it possible to reliably pull in to the optimum tuning point.

9J3図は本発明の一実施例を示すブロック構成図であ
る。第3図において、111は選局手段(2)に対して
選局を開始させるための信号を発生するスイッチ手段、
(3:はパルス信号を受けてこのパルス信号をカウント
アツプまたカウントダウンするアップダウンカウント手
段、(6)はアップダウンカウント手段(3)のディジ
タル出力信号を直流電圧に変換するディジタル/アナロ
グ変換器、(71はこの直流電圧が同調電圧の少なくと
も一部として加えられる電子同調チューナ、(5)は同
調電圧に相当するディジタル量を記憶しておく記憶手段
、(2)はスイッチ手段(1)からの信号により、記憶
手段(5)から同調電圧のディジタル量を読み出し、ア
ップダウンカウント手段に与え選局を制御する選局手段
、(4)は電子同調チューナ(7)からのAP’O電圧
を、基準電圧Vlとv2とで比較するAFO手段、(8
)は選局手段(2)により、アップダウンカウント手段
(3)に設定されている値を所定値だけカウントダウン
させるカウントダウン手段である。
FIG. 9J3 is a block diagram showing an embodiment of the present invention. In FIG. 3, 111 is a switch means that generates a signal for the channel selection means (2) to start channel selection;
(3: an up/down count means that receives a pulse signal and counts up or down the pulse signal; (6) a digital/analog converter that converts the digital output signal of the up/down count means (3) into a DC voltage; (71 is an electronic tuning tuner to which this DC voltage is applied as at least a part of the tuning voltage, (5) is a storage means for storing a digital amount corresponding to the tuning voltage, and (2) is an electronic tuning tuner to which this DC voltage is applied as at least a part of the tuning voltage. (2) is a storage means for storing a digital amount corresponding to the tuning voltage. The tuning means (4) reads the digital amount of tuning voltage from the storage means (5) according to the signal and supplies it to the up/down counting means to control tuning. AFO means (8) for comparing reference voltages Vl and v2;
) is a countdown means for causing the tuning means (2) to count down the value set in the up/down count means (3) by a predetermined value.

このような構成において、スイッチ手段(1)からの選
局開始信号を受けた選局手段(2)により、記憶手段(
5)からアップダウンカウント手段に、同調電圧に相当
するディジタル値が送られ、アップダウンカウント手段
(3)によりディジタル出力を、ディジタル/アナログ
変換器を介して直流電圧に変換して、電子同調チューナ
(7)の可変容量ダイオードに印加する。A20手段(
4)は、印加された同調周波数によるAFO電圧を基準
電圧v1及びV2と比較し、選局手段に結果を供給する
。選局手段(4)は、A F O電圧が基準電圧V1よ
り小さくがっ、基準電圧■2より大きい場合、例えば同
調周波数が最適同調点Cより上側の点Fにある場合、カ
ウントダウン手段(8)に信号を送り、カウントダウン
手段により、アップダウンカウント手段(3)に設定さ
れている値を、所定値だけカウントダウンし、同調周波
数を低周波数側へ変化させる。次いで、選局手段(4)
は遂次、A20手段(4)によるAFO電圧と基準電圧
V1とv2との比較結果を判断し、AFO電圧が基準電
圧V1より大きいとき、アップダウンカウント手段(3
)でカウントアツプし、同調周波数を高周波数側へ変化
させ、AFO電圧が基準電圧■2より小さいとき、アッ
プダウンカウント手段(3)でカウントダウンし、同調
周波数を低周波数側へ変化させる。このことにより、同
調周波数は選局手段(4)、アップダウンカウント手段
(3)とA20手段により、最適同調周波数に近づけら
れていく。
In such a configuration, the tuning means (2) receiving the tuning start signal from the switching means (1) causes the storage means (
A digital value corresponding to the tuning voltage is sent from 5) to the up/down counting means, and the up/down counting means (3) converts the digital output into a DC voltage via a digital/analog converter, and then outputs the digital value to the electronic tuning tuner. (7) is applied to the variable capacitance diode. A20 means (
4) compares the AFO voltage according to the applied tuning frequency with the reference voltages v1 and V2, and supplies the result to the tuning means. When the AFO voltage is smaller than the reference voltage V1 and larger than the reference voltage ■2, for example, when the tuning frequency is at a point F above the optimum tuning point C, the tuning means (4) starts the countdown means (8). ), the countdown means counts down the value set in the up/down count means (3) by a predetermined value, and changes the tuning frequency to the lower frequency side. Next, channel selection means (4)
successively judges the comparison result between the AFO voltage and the reference voltages V1 and v2 by the A20 means (4), and when the AFO voltage is greater than the reference voltage V1, the up/down count means (3)
) to change the tuning frequency to the higher frequency side, and when the AFO voltage is smaller than the reference voltage (2), count down by the up/down count means (3) to change the tuning frequency to the lower frequency side. As a result, the tuning frequency is brought closer to the optimum tuning frequency by the tuning means (4), the up/down counting means (3), and the A20 means.

記憶手段(5)から最初に読み出された同調電圧による
AFO電圧が基準電圧■1より大きいか、あるいは基準
電圧v2より小さいときは、アップダウンカウント手段
(3)に設定された値は、そのままでA20手段(4)
により最適同調周波数に引き込む動作が開始される。
When the AFO voltage based on the tuning voltage first read out from the storage means (5) is larger than the reference voltage ■1 or smaller than the reference voltage v2, the value set in the up/down count means (3) remains unchanged. A20 means (4)
This starts the operation of pulling in the optimum tuning frequency.

以上のように本発明によれば選局手段(2)により記憶
手段(5)から読み出され、電子同調チューナ(7)に
与えられた同調周波数が最適同調周波数より高周波数側
へずれていた場合、カウントダウン手段(8)によりカ
ウントダウンし低周波数側へ変化させ、その後AFO手
段(4)により最適同調周波数に引き込むようはなされ
ているので、従来のものより広い範囲の同調周波数を引
き込むことができる。
As described above, according to the present invention, the tuning frequency read from the storage means (5) by the tuning means (2) and given to the electronic tuning tuner (7) deviates to a higher frequency side than the optimum tuning frequency. In this case, the countdown means (8) counts down and changes to the lower frequency side, and then the AFO means (4) pulls in the optimum tuning frequency, so it is possible to pull in a wider range of tuning frequencies than the conventional one. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の選局装置を示すブロック図、第2図は自
動周波数調整動作を説明するための信号波形図、第3図
は本発明の一実施例を示すブロック図である。 図において、+I+はスイッチ手段、(2)は選局手段
、(3)はアップダウンカウント手段、(4)は自動周
波数調整(AFO)手段、(5)は記憶手段、(6)は
ディジタル/アナログ変換器、(7)は電子同調チュー
ナ、(8)はカウントダウン手段である。 なお、図中同一符号は同一または相当部分を示す。 代理人 葛野信− 第1図 第3図 第2図 手続補正書(自発) 特許庁長官殿 1、事件の表示    特願昭57−158758号3
、補正をする者 代表者片山仁へ部 4、代理人 5、補正の対象 明細書の発明の詳細な説明の欄 6、 補正の内容 (1)明細書をっぎのとおり訂正する。
FIG. 1 is a block diagram showing a conventional channel selection device, FIG. 2 is a signal waveform diagram for explaining automatic frequency adjustment operation, and FIG. 3 is a block diagram showing an embodiment of the present invention. In the figure, +I+ is a switch means, (2) is a channel selection means, (3) is an up/down count means, (4) is an automatic frequency adjustment (AFO) means, (5) is a storage means, and (6) is a digital/ An analog converter, (7) an electronic tuning tuner, and (8) a countdown means. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent Makoto Kuzuno - Figure 1 Figure 3 Figure 2 Procedural amendment (voluntary) Commissioner of the Japan Patent Office 1, Indication of case Japanese Patent Application No. 158758-1983 3
, To the representative of the person making the amendment, Hitoshi Katayama, Department 4, Agent 5, Detailed explanation of the invention in the specification subject to amendment, Column 6, Contents of the amendment (1) The specification is corrected as shown.

Claims (1)

【特許請求の範囲】[Claims] パルス信号の供給を受けてこのパルス信号をカウントア
ツプまたはカウントダウンするアップダウンカウント手
段、このアップダウンカウント手段のディジタル出力信
号を直流電圧に変換するディジタル/アナログ変換器、
上記直流電圧が同調電圧の少なくとも一部として加えら
れる電子同調ヂューナ、選局を開始するための信号を発
生するスイッチ手段、上記アップダウンカウント手段に
パルス信号として与える同調電圧に相当するディジタル
量を記憶しておく記憶手段、上記スイッチ手段からの信
号によって上記記憶手段から上記アップダウンカウント
手段に、ディジタル量を出力させ選局を制御する選局手
段、この選局手段により指定された所定受信周波数に対
する自動周波数調整電圧(AFO電圧)を発生し、上記
アップダウンカウント手段およびディジタル/アナログ
変換器を介して、上記電子同調チューナの同調周波数を
上記所定受信周波数に一致させる自動周波数調整手段、
上記選局手段からの信号により上記AFO電圧を第1の
所定電圧およびこれより大きい第2の所定電圧と比較し
、上記AFO電圧が第1の所定電圧より小さくかつ、第
2の所定電圧より大きいときに上記アップダウンカウン
ト手段に設定されているディジタル値を所定値だけカウ
ントダウンさせるカウントダウン手段を備えた選局装置
up/down counting means for receiving a pulse signal and counting up or down the pulse signal; a digital/analog converter for converting the digital output signal of the up/down counting means into a direct current voltage;
An electronic tuning tuner to which the DC voltage is applied as at least a part of the tuning voltage, a switch means for generating a signal to start tuning, and a digital quantity corresponding to the tuning voltage applied as a pulse signal to the up/down counting means. a storage means for storing a digital signal from the storage means to the up/down count means according to a signal from the switch means, and a tuning means for controlling tuning by outputting a digital amount from the storage means to the up/down counting means; automatic frequency adjustment means for generating an automatic frequency adjustment voltage (AFO voltage) and matching the tuning frequency of the electronic tuning tuner to the predetermined receiving frequency via the up/down counting means and the digital/analog converter;
The AFO voltage is compared with a first predetermined voltage and a second predetermined voltage larger than the first predetermined voltage according to a signal from the channel selection means, and the AFO voltage is smaller than the first predetermined voltage and larger than the second predetermined voltage. A channel selection device comprising countdown means for counting down a digital value set in the up/down count means by a predetermined value.
JP15375382A 1982-09-01 1982-09-01 Channel selecting device Pending JPS5941922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15375382A JPS5941922A (en) 1982-09-01 1982-09-01 Channel selecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15375382A JPS5941922A (en) 1982-09-01 1982-09-01 Channel selecting device

Publications (1)

Publication Number Publication Date
JPS5941922A true JPS5941922A (en) 1984-03-08

Family

ID=15569363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15375382A Pending JPS5941922A (en) 1982-09-01 1982-09-01 Channel selecting device

Country Status (1)

Country Link
JP (1) JPS5941922A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389403A (en) * 1986-10-01 1988-04-20 Sumitomo Chem Co Ltd Method for recovering halogen

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389403A (en) * 1986-10-01 1988-04-20 Sumitomo Chem Co Ltd Method for recovering halogen

Similar Documents

Publication Publication Date Title
CA2104182C (en) Double conversion digital tuning system
US6104252A (en) Circuit for automatic frequency control using a reciprocal direct digital synthesis
US5179726A (en) Automatic tuning method and apparatus of double conversion tuner
JPS627728B2 (en)
US5220684A (en) Channel selecting circuit
US4320530A (en) Channel selecting apparatus employing frequency synthesizer
US6091943A (en) Combining oscillator with a phase-indexed control circuit for a radio receiver
EP0406851A2 (en) Station selecting apparatus
JPH0149051B2 (en)
JPS5941922A (en) Channel selecting device
CA1181878A (en) Channel selection system for an electronic tuner
US6233023B1 (en) Automatic fine tuning circuit
EP0181658A1 (en) Synchronizing circuit for an oscillator
EP0406949B1 (en) Oscillator circuit
EP0629084B1 (en) Apparatus and method for extending pulling range of automatic fine tuning of television receiver
JPS5924191Y2 (en) Synthesizer-receiver AFC circuit
JPH0418876A (en) Rf modulator
KR950001646Y1 (en) Tuning circuit for video if signal
JPH06164387A (en) Phase locked loop frequency synthesizer
JPH0448020Y2 (en)
JPH0514569Y2 (en)
JPS6035302Y2 (en) automatic tuning circuit
KR900002147Y1 (en) Aft circuit for television
JPS6146611A (en) Tuner
JPH0374058B2 (en)