JPS594189A - Semiconductor light emitting device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor light emitting device of double hetero structure having a diffraction grating of less threshold current with ready manufacture by providing an active layer buried in a groove formed on a semiconductor layer which exists above the diffraction grating surface. CONSTITUTION:A diffraction grating 2 is formed by utilizing interference moire of gas laser on the main surface of an n type InP semiconductor substrate 1 of surface index (100). Then, an n type InGaAsP semiconductor layer 4 of the first semiconductor layer matched in lattice constant to the substrate 1 is grown with a p type InP semiconductor layer 6 of the second semiconductor layer. A wafer is removed from a growing furnace, dioxidized silicon film mask 6 is, for example, formed, and a groove 7 which extends to the periodic direction of the diffraction grating 2 is formed. Then, an n type InP semiconductor layer 8, an n type InGaAsP active layer 3, a p type InP semiconductor layer 9, and p type InGaAsP contacting layer 10 are sequantially grown by a normal method, electrodes are then formed, thereby completing a semiconductor light emitting device.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention comprises 2. The present invention relates to improvements in semiconductor light emitting devices, particularly semiconductor light emitting devices having a double heterojunction structure.

Conventional technology and problems In the past, ordinary semiconductor lasers were
If modulation is performed at a relatively high speed, a multi-wavelength spectrum will be generated in addition to the desired oscillation spectrum.

When this light is transmitted through a fiber, the waveform is distorted and modal distribution noise is added to it, degrading the signal quality and making it difficult for the receiving side to obtain an accurate signal.

Therefore, a semiconductor light emitting device called a distributed valence iM type laser has been developed which can maintain a single oscillation spectrum even when modulated at high speed.

FIGS. 1 to 3 are cut-away oblique views of essential parts of different conventional examples.

In the figure, ■ indicates the substrate, 2 indicates the diffraction grating, and 3 indicates the active layer.

A common feature of all the illustrated conventional examples is that they have a diffraction grating 2, and the structure of the other parts is as follows:
It is no different from what was previously known.

Now, the period of the unevenness of the diffraction grating 2 is made to match the Rede oscillation range, and the waves reciprocate within the diffraction grating and resonate.

By the way, all of the above-mentioned conventional examples have drawbacks such as requiring special techniques for manufacturing and having a low threshold current.

OBJECTS OF THE INVENTION The present invention provides a double heterostructure semiconductor light emitting device having a diffraction grating that is easy to manufacture and has a structure with a low threshold current.

(2) Structure of the Invention The present invention is based on a combination of an active layer buried structure and a distributed feedback structure.

Embodiment of the Invention First, the steps for manufacturing an embodiment of the present invention are shown in FIGS. 4 to 8.
This will be explained with reference to the figures.

See Figure 4 (1) n-type 1nP semiconductor substrate 1 with plane index (100)
A diffraction grating 2 is formed on the main surface using interference fringes of a gas laser.

A He-Cα laser was used as the gas laser to obtain a first-order diffraction grating with a pitch of 0.23 (μm).

See Figure 5 (2) Next, by applying the liquid phase epitaxial growth method, In
An n-type 1nGaAsP (λ-1,05(#m)) semiconductor layer 4, which is a first semiconductor layer with a lattice constant matched to that of the P semiconductor substrate 1, is formed on the p-type InP semiconductor layer, which is a second semiconductor layer.
The semiconductor layer 5 was grown at a growth start temperature of 600 ('C).

(3) See FIGS. 6 and 7. (3) The wafer is taken out of the growth furnace, a mask 6 made of, for example, a silicon dioxide film is formed, and grooves 7 extending in the periodic direction of the diffraction grating 2 are formed.

The cross-sectional shape of this groove 7 can be selected as appropriate;
For example, it may be approximately V-shaped.

If you choose an appropriate etching solution when forming a7, In
It is possible to etch only the P semiconductor layer 5 so that the InGaAsI' semiconductor M4 is hardly affected. As such an etching solution, for example, M
C1,: A mixture of H3P O4 can be mentioned. In the example described later, etching must be performed on the TnGaAsP semiconductor As without affecting the InP semiconductor layer, but it is preferable to use, for example, II2SO4:H202:H2O as the etching solution at that time. .

In the figure, only one groove 7 is shown, but in reality, a large number of grooves 7 are formed.

Refer to Figure 8 (4) After this, using the usual technique, an n-type TnP semiconductor (4
) 1ii8. n-type 1nGaAsP active layer 3 (λ-1,3
[μm)), p-type 1nP semiconductor layer 9 + p-type 1nGaAs
A P contact layer 10 (λ-1,3 [μm)] is sequentially grown, and electrodes and the like are formed to complete the process.

When the wafer on which the semiconductor light emitting device was formed in this way was folded with a cavity length of 150 [μm] and its characteristics were investigated, a single oscillation with a wavelength of about 1.3 [μm] was obtained.

In the present invention, many modifications other than the embodiments described above are possible.

FIG. 9 is a cutaway front view of main parts of another embodiment, and FIG.
It is a main part cutaway side view according to the line AA of a figure.

In the figure, 11 is an n-type InP semiconductor substrate, and 12 is an n-type 1nGaAsr' semiconductor layer (λ-~1.05 [μm]
), 13 is a 1111-fold lattice, 14 is a p-type InP semiconductor layer, 15 is an n-type 1nP semiconductor layer, 15A is an n-type 1nP cladding layer, 16 is a TnGaAsP semiconductor As, and 6A is an InP semiconductor layer.
17 is a p-type InP cladding layer, and 18 is a p-type 1nGaAsP contact (5) layer.

The thickness of each part is as follows.

11:~100 [μm] 12: 0.3~0.5 cμm] 14:1 [μm] 15: ~0.2 [μm] 15A: 0. 3 (μm) 16.16A: 0.1~0.2 Cμm) 17:1~
2 (μm) 181.5 to 1 [μm] The height of the diffraction grating 13 is 0.1 to 0.2 [μm].

The impurity concentration and impurities in each main part are as follows.

12: ~5 X 10I7(am-3) (S
n) 14:0.5~I x 1018 (cm-3)
(Cd or Zn) 15.15A: ~5XI O” (cm-3)
(Sn) 16.16A: Non-doped 17: 0. 5~I x 1018 (cm-3)
(Cd or (6) m; IZn) 1 11: -1018(cm-3) (Zn
) In this example, the n-type [nGaAsr' semiconductor layer 12
As long as selective etching with Inl' is possible, it is better to increase the composition of H1', gear, and energy.

The diffraction grating formed on the surface of this n-type 1nGaAsP semiconductor layer 12 consists of grooves formed at a period of λ/2·n times the oscillation wavelength, and the diffraction grating is arranged so that the first-order diffraction light or second-order diffraction light coincides with the oscillation mode. It is composed of

If the groove for embedding the active layer 16A is shaped as shown in the figure and the active layer 16A is provided as far down as possible, the stripe width will naturally become narrower, making it easier to achieve a lower threshold value. and in that case, the diffraction grating 1
Since the coupling with 3 becomes stronger, the wavelength selectivity becomes better.

This embodiment differs from the embodiments described with reference to FIGS. 4 to 8 in that there is only one semiconductor layer between the surface of the diffraction grating and the active layer. By narrowing the distance between the active layer and the diffraction grating, the coupling between the diffraction grating and the generated light can be increased. Making it two layers and making it thinner increases the difficulty in terms of manufacturing technology.

FIG. 11 is a cutaway front view of the main part of another embodiment, and FIG. 12 is a cutaway side view of the main part taken along line A-A in FIG. 11.

In the figure, 21 is an n-type 1nP semiconductor substrate, 22 is an n-type 1nP semiconductor layer, 23 is a diffraction grating, and 24 is a p-type 1nP semiconductor substrate.
AsP semiconductor layer (λ-1,05(,+1m)), 25 is n-type 1nGaAsP semiconductor layer, 25A is n-type 11Ga8sP cladding 1M (λ-1,05Cμm)), 26
is an InGaAsP semiconductor layer, 26A is an InGaAsP active layer, 27 is a p-type 1nP cladding layer, and 28 is a p-type 1nG layer.
The aAsP contact layer is shown respectively.

The thickness of each part is as follows.

21: ~IOO (μm) 22: 0. 3 to 0. 5 (/
71Tl) 24: ~1 [μm] 25: 0.2 ~ 0.3 [μm] (8) 25A: ~0. 4 [x! m) 26.26A:0. 1~0. 2 Cp+n)27
:1~2 [μcn] 28 : 0. 5~] (l+m) Note that the height of the diffraction grating 23 is 0.1 to 0.2 [μm].

The impurity concentration and impurities in each main part are as follows.

214~10" (cm-3) (S'n)22:
5 x 1017 (cm-3) (S n) 24:
0.5-1×1018 ccIn-3] (Zn or Cd) 25.25A:5XIO17 (cm-3) (Sn)26
．． 26A: Non-doped 27: 0. 5~I x 10Ia (cm-3)
(Cd or Zn) 282~l Q10 (cm-3) (Zn) The composition of the n-type InP semiconductor layer 22 in this embodiment is the band gear of the n-type 1nP semiconductor substrate 21, 2p.

It is equal to energy.

(9) This embodiment differs from the embodiments described with reference to FIGS. 4 to 8 in the same way as the embodiments described with reference to FIGS. 9 and 10.

Further, the difference between this embodiment and the embodiments explained with reference to FIGS. 9 and 10 is that the semiconductor layers between the semiconductor layer in which the diffraction grating is formed and the active layer, that is, the semiconductor layer 25A and the semiconductor layer 15A The composition of the two is opposite. If rnGaAsP is used as this layer, the difference in refractive index with the active layer will be small, and light seepage will be large, so the layer thickness can be increased.

Effects of the Invention According to the present invention, a semiconductor light emitting device having a structure in which a groove is formed in a semiconductor layer on a diffraction grating surface and at least an active layer is buried in the groove is obtained, and The oscillation spectrum is always single regardless of the operating mode, the threshold current is low, and manufacturing is easy.

[Brief explanation of drawings]

Figures 1 to 3 are cross-sectional views of main parts of the conventional example, (10) Figures 4 to 8 are diagrams of the equipment at key points in the process for explaining the case of manufacturing an embodiment of the present invention. Cutaway slope diagram of main part (
4, 5, and 7), main part cutaway front views (Figs. 6 and 8), Fig. 9 is a main part cutaway front view of another embodiment, and Fig. 1O is Fig. 9. Fig. 11 is a cross-sectional side view of the main part FJJ of the embodiment shown in Fig. 12 is a cross-sectional side view of the main part taken along the line A-Aζ in Fig. 11. FIG. In the figure, C8l IJ: n-type 1nP semiconductor substrate, 2 is a diffraction grating, 3 is 4 (i-type layer, 4 is n-type 1nGaAsP semiconductor layer, 5 is p-type I gate p'4!, conductor layer, 6 is The mask, 7 is a groove, 8 is an n-type rnP semiconductor layer, 9 is a p-type JnP semiconductor layer, and 10 is a p-type 1nGaAsP contact layer. Patent applicant: Fujitsu Limited representative patent attorney Tools: Kugobe (3 others) ) (11) Figure 4 Figure 1 and Figure 2 Figure 3 Figure 5 Figure 6 Figure 7 Figure 8

Claims (1)

[Claims] A semiconductor light emitting device comprising: a semiconductor layer located above a diffraction grating surface; a groove formed on the semiconductor layer; and an active layer embedded in the groove.