JPS594059B2 - data collector - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a data collector that digitally records necessary information magnetically.It has a simple configuration and is convenient to carry, and can be used for inventory surveys in stores, warehouses, etc., meter reading for gas, water, electricity, etc. The aim is to provide an excellent data collector that can be used effectively.

Recently, computers and their peripherals have become widespread, but in many cases where original data is generated, information is still processed using paper and pen.
In this case, it is necessary to reprocess the information onto cards, paper tapes, magnetic tapes, etc., which poses an obstacle in data processing. The present invention eliminates the above-mentioned obstacles by immediately recording the original data or the secondary data that has been processed based on the original data on a cassette tape when the original data is generated, and after that, without any manual intervention. The present invention provides a data collector as an excellent information terminal that can be processed directly by a computer without any need for data processing.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the data collector of the present invention. In the figure, A is a calculator consisting of a display section 1 that displays 8 digits, an arithmetic control section 2, and a keyboard section 3, and an 8-digit signal port T1 for display obtained by the arithmetic control section 2. ~T8 are configured to be applied to the display section 1 and the keyboard section 3, respectively, and the display data of each digit obtained by the arithmetic control section 2 is applied to the display section 1, and the 8-digit display data is applied to the display section 1. It is configured to do the following. Then, the keyboard section 3 uses the display digit signal port received from the arithmetic control section 2 as a key sampling signal, and applies this signal and a matrix-configured return signal A to the arithmetic control section 2 to determine the type of key input. It is configured to check and display or perform arithmetic processing. 4 is a decoder that converts the segment signal into a BCD signal 2 when the display data 8 of each digit obtained by the arithmetic control unit 2 of the calculator A is a segment signal, and the display data 8 was originally a BCD signal. In this case, it is not necessarily necessary.

Reference numeral 5 denotes a 1-digit, 4-bit buffer memory for synchronizing the display cycle of the calculator A with the recording speed of the information recording section, and the BCD signal 2 obtained by the decoder 4 is processed by a comparison and matching circuit 10, which will be described later. The above-mentioned B is set by the matched signal signal until the next matching signal comes.
It outputs a CD signal.

Reference numeral 6 denotes a data select circuit controlled by a select signal O obtained by a recording control circuit 12, which will be described later.
It selectively outputs the X and ETX signals.

7 is a 4-bit shift register that sets the signal obtained by the data select circuit 6 in parallel with the set signal 7 obtained by the recording control circuit 12;
A serial signal is output based on the shift signal power obtained by the recording control circuit 12.

8 is a recording circuit, 9 is a recording head, and 10 is a recording control circuit 12, which compares the signal of the next digit to be taken in with the display digit signal port from calculator A, and when they match, 11 is a record key, 12 is a basic clock signal obtained by an oscillator 13, and is divided or counted down to generate data select signal O, parallel set signal W, shift signal power,
A recording control circuit outputs a write clock signal, a write gate signal, a digit signal to be taken in, and a motor control signal. 14 is a motor, and 15 is a power supply circuit composed of a battery.

The above-mentioned circuits constituting the calculator A and the daily report recording section are all constructed using CMOS type transistors with low power consumption.

FIG. 2 is a timing chart showing the operation of each part of the above embodiment, where A and B are display digit signal ports, b is display data ports, c is variable set signal wires, d is shift signal power, and e
is the light block signal Y, f is the write signal L, g is the signal for motor control, h is the light gate signal Y, i is the signal N of the digit to be taken in, j is the match signal L, and k is the one digit taken into the buffer memory 5. The signal is gone! is the data select signal O, m is the data set by the parallel set signal W, and n is the data recorded on the miterokasette tape.

In the above embodiment, the data to be recorded is entered into the calculator A, or the result of the arithmetic processing is displayed.
When turned on, the motor 14 is driven one time by the recording control circuit 12, and the force setting tape starts running.

On the other hand, since the recording signal H is inhibited in the recording circuit 8 by the write gate signal L, IRG is recorded on the power set tape as shown in FIG. 2N until the write gate signal L is turned on.

When the write gate signal is turned on, the STX selected by the data select signal appears at the output terminal of the data select circuit 6 and is set in the shift register 7 in parallel. Then, the bit serial STX is sequentially recorded on the power set tape by the write clock signal and the shift signal. When STX is set in the shift register 7, it is necessary to take in the data of T8 ([1J in FIG. 2) to be recorded next into the buffer memory, so T8 is set as the digit signal number to be recorded next. is output,
When the display digit signal port of the calculator A and the comparison match circuit 10 compare and match, a match signal is outputted as a set signal for the buffer memory 5, and data [1] of T8 is set in the buffer memory.

Thereafter, the same operation is repeated until data [8] of T1 is recorded. Then, the data select signal O selects ETX, and then ETX is set in parallel and sequentially shifted and recorded. When the ETX recording is completed, the write gate signal outputted from the recording control circuit 12 is turned off, and thereafter, the IRG after the data is recorded until the motor 14 stops and the tape stops running.

As is clear from the above embodiments, according to the data collector of the present invention, the display buffer memory of the calculator is used as the buffer memory for information recording, and the digit signal of the data to be recorded is stored.
The calculator's display digit signals are compared, and when they match, the display data is captured into a single digit buffer memory and digitally recorded, so there is no need for buffer memory for all the digits to be recorded. Since it is a double buffer memory in units of digits, it has the feature that the write clock of the information recording section can be determined regardless of the display cycle of the calculator.

In addition, in the present invention, a generally commercially available low-priced calculator 1C etc. is used as is, and the circuit configuration of only the information recording section other than the calculator section is considered, which uses data output from the calculator section to the display. This simplifies circuit design and allows the calculation results from the calculator to be recorded as they are. According to the present invention, data can be recorded as is at the source where the original data is generated using a calculator, and can be effectively used for inventory management, meter reading, etc.

[Brief explanation of the drawing]

FIG. 1 is a program diagram of one embodiment of the data collector of the present invention, and FIG. 2 is a timing chart showing the operation of each part of the collector.

Claims (1)

[Claims] 1. A calculator equipped with a display section, a keyboard section, an arithmetic control section having a display buffer memory that outputs display digit signals and display data to the display section, and an information recording section that records digital information using a cassette tape. A display buffer memory provided in the calculator is used as a buffer memory of the information recording section, and a digit signal of data to be recorded in the information recording section matches a display digit signal of the calculator. 1. A data collector characterized in that the data for display at the time is taken in by the information recording section in units of digits and digitally recorded.