JPS5936017U

JPS5936017U - Digital signal regenerator

Info

Publication number: JPS5936017U
Application number: JP13268082U
Authority: JP
Inventors: 雅之石田; 健大西; 宏菅野
Original assignee: 三菱電機株式会社
Priority date: 1982-08-30
Filing date: 1982-08-30
Publication date: 1984-03-06

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の誤り訂正回路のブロック図、第２図はこ
の考案の一実施例に用いる誤り訂正回路のブロック図を
示す。図において、３はシンドローム演算回路、４はデユード
回路、６は加算回路、７は補正回路、９は第１のゲート
回路、１０は第２のゲート回路、１１はコントロール信
号発生器、１２は判定回路である。なお、図中、同一符
号は同一、または相当部分を示す。第１図　− 第２図FIG. 1 is a block diagram of a conventional error correction circuit, and FIG. 2 is a block diagram of an error correction circuit used in an embodiment of this invention. In the figure, 3 is a syndrome calculation circuit, 4 is a dual circuit, 6 is an addition circuit, 7 is a correction circuit, 9 is a first gate circuit, 10 is a second gate circuit, 11 is a control signal generator, and 12 is a judgment It is a circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Figure 1 - Figure 2

Claims

[Scope of utility model registration request]

(1) A playback device that plays back a disc on which digital signals are recorded concentrically or spirally, which is equipped with an error correction circuit and an instruction circuit for specifying special playback such as forward or reverse fast forwarding, A digital signal reproducing device characterized in that error correction is not performed during special reproduction using the output of a circuit.

(2) The error correction circuit consists of a syndrome arithmetic circuit, a calculation circuit that determines the position of the error and the error pattern, a correction detection circuit that detects the uncorrectable state and outputs a correction signal, and an addition circuit that adds the erroneous data and the error pattern. , a correction circuit that corrects uncorrectable data, a first gate circuit that receives the error pattern and the output of the instruction circuit, and a second gate circuit that receives the correction signal and the output of the instruction circuit. , Claim No. 1 of the utility model registration characterized in that by instructing special reproduction with the instruction circuit, gates 1 and 2 are turned off, and the error pattern and the correction signal are not input to the addition circuit and the correction circuit, respectively. The digital signal reproducing device according to item 1.

(3) Registration of a utility model characterized in that the error correction circuit has a syndrome calculation circuit composed of a register and an exclusive OR gate, and the register is reset by instructing special playback with the instruction circuit. A digital signal reproducing device according to claim 1.