JPS5936017U - Digital signal regenerator - Google Patents
Digital signal regeneratorInfo
- Publication number
- JPS5936017U JPS5936017U JP13268082U JP13268082U JPS5936017U JP S5936017 U JPS5936017 U JP S5936017U JP 13268082 U JP13268082 U JP 13268082U JP 13268082 U JP13268082 U JP 13268082U JP S5936017 U JPS5936017 U JP S5936017U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- correction
- error
- instruction
- digital signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Error Detection And Correction (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の誤り訂正回路のブロック図、第2図はこ
の考案の一実施例に用いる誤り訂正回路のブロック図を
示す。
図において、3はシンドローム演算回路、4はデユード
回路、6は加算回路、7は補正回路、9は第1のゲート
回路、10は第2のゲート回路、11はコントロール信
号発生器、12は判定回路である。なお、図中、同一符
号は同一、または相当部分を示す。
第1図 −
第2図FIG. 1 is a block diagram of a conventional error correction circuit, and FIG. 2 is a block diagram of an error correction circuit used in an embodiment of this invention. In the figure, 3 is a syndrome calculation circuit, 4 is a dual circuit, 6 is an addition circuit, 7 is a correction circuit, 9 is a first gate circuit, 10 is a second gate circuit, 11 is a control signal generator, and 12 is a judgment It is a circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Figure 1 - Figure 2
Claims (3)
ル状に記録されているディスクを再生する再生装置にお
いて、誤り訂正回路と、順方向あるいは逆方向の早送り
などの特殊再生を指定する指示回路とを備え、指示回路
の出力により、特殊再生時には誤り訂正を行なわないよ
うになした事を特徴とするデジタル信号再生装置。(1) A playback device that plays back a disc on which digital signals are recorded concentrically or spirally, which is equipped with an error correction circuit and an instruction circuit for specifying special playback such as forward or reverse fast forwarding, A digital signal reproducing device characterized in that error correction is not performed during special reproduction using the output of a circuit.
置及び誤りパターンを求める液算回路、訂正不可能を検
出し補正信号を出力する補正検出回路、誤ったデータと
誤りパターンを加算する加算回路、訂正不可能なデータ
を補正する補正回路、誤りパターンと上記指示回路の出
力を入力とする第1のゲート回路、補正信号と上記指示
回路の出力を入力とする第2のゲート回路を有し、上記
指示回路で特殊再生を指示する事により、ゲート1及び
ゲート2をオフさせ、誤りパターン及び補正信号をそれ
ぞれ前記加算回路及び補正回路に入力しない事を特徴と
する実用新案登録請求の範囲第1項に記載のディジタル
信号再生装置。(2) The error correction circuit consists of a syndrome arithmetic circuit, a calculation circuit that determines the position of the error and the error pattern, a correction detection circuit that detects the uncorrectable state and outputs a correction signal, and an addition circuit that adds the erroneous data and the error pattern. , a correction circuit that corrects uncorrectable data, a first gate circuit that receives the error pattern and the output of the instruction circuit, and a second gate circuit that receives the correction signal and the output of the instruction circuit. , Claim No. 1 of the utility model registration characterized in that by instructing special reproduction with the instruction circuit, gates 1 and 2 are turned off, and the error pattern and the correction signal are not input to the addition circuit and the correction circuit, respectively. The digital signal reproducing device according to item 1.
アゲートで構成されるシンドローム演算回路を有し、上
記指示回路で特殊再生を指示する事により、前記レジス
タをリセットする事を特徴とする実用新案登録請求の範
囲第1項記載のディジタル信号再生装置。(3) Registration of a utility model characterized in that the error correction circuit has a syndrome calculation circuit composed of a register and an exclusive OR gate, and the register is reset by instructing special playback with the instruction circuit. A digital signal reproducing device according to claim 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13268082U JPS5936017U (en) | 1982-08-30 | 1982-08-30 | Digital signal regenerator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13268082U JPS5936017U (en) | 1982-08-30 | 1982-08-30 | Digital signal regenerator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5936017U true JPS5936017U (en) | 1984-03-06 |
Family
ID=30299547
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13268082U Pending JPS5936017U (en) | 1982-08-30 | 1982-08-30 | Digital signal regenerator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5936017U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6216277A (en) * | 1985-07-15 | 1987-01-24 | Sony Corp | Reproducing device for pcm signal |
-
1982
- 1982-08-30 JP JP13268082U patent/JPS5936017U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6216277A (en) * | 1985-07-15 | 1987-01-24 | Sony Corp | Reproducing device for pcm signal |
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