JPS5933698A - Signal transmitting circuit - Google Patents

Abstract

PURPOSE:To prevent undesired variation of potential for an output line with a simple constitution, by using a source follower which has a boostrap operation by a capacity, a transmission gate, etc. to form each stage. CONSTITUTION:An input pulse is transmitted with a low impedance to a transistor (TR) M21 which has a boostrap operation between the gate and the source by a capacity via a TRM1 which is turned on in response to a clock. At the same time, the input pulse is transmitted to the next stage via a buffer transistor TR31 which is turned on synchronously with the TRM21 and a TRM41 constituting a transmission gate. The leakage output due to the charge feedback of the post stage in the period other than the transmission period of the signal is not transmitted to an output line by a TRM81 which is turned on with the leakage output, a TRM31, etc. As a result, the undesired variance of potential is avoided for an output line with a simple constitution.

Description

[Detailed description of the invention] Used in industry! l'l' The present invention relates to a signal transmission circuit suitable for use in a scanning circuit for driving a CCD image sensor, a liquid crystal display, a memory device, etc.

BACKGROUND TECHNOLOGY AND DISCLOSURES Conventionally, circuit II8 as shown in FIG. 1 has been used as such a signal transmission circuit.

In the figure, the input terminal (11) is connected to the gate of the MO3 + - fungistor T1 of the enhancement type I- type, the source of this transistor TI is connected to the ground line (2), and the train is of the deregression type. It is connected to the source and gate of a MOS transistor 'I'2, and the drain of this transistor 1'2 is connected to a power supply line (3).

The drain-source connection point of the i-transistor "I', T"2 is connected to the transistor Tt, 'T through the source-drain of the transmission gate enhancement type MOS transistor "I"1.
Transistor T connected in the same way as '>41. T
51 LZ connected, this transistor 1” 41
An enhancement type MOS transistor in which the connection point of 1 T 5+ constitutes a 1-transistor 7 connection)
'+, transistor T connected in the same way as 1゛2
71 + T Connected to R1.

This 1-Ransisk i"31"-Tel circuit is sequentially and repeatedly connected. The upper part of the suffix of the code in the figure is the same, and the upper part of the suffix is changed to kl (kozu).

Furthermore, the clock terminals (41, (51) to which clock signals φ1 and φ2 having mutually different phases are supplied are connected to the gates of transistors T'31, T32, . . . and transistors 61 and TG2, respectively.

In this circuit, I'' dock terminal f41, (i'
il is supplied with a signal φ1 as shown in FIG.
．． φ2 is supplied. On the other hand, the input terminal (1) is supplied with a signal φIN as shown in FIG. 2C, for example.

As a result, transistor T1. Connection point of T2■
An inversion voltage VI appears as shown in FIG. 2 ID.

Next, vl is sampled by the signal φ1 and held at the gate 2 of the transistor T41, and a voltage 2 appearing like a blur appears in FIG. 2E. With this, "C transistor"
ll'41. At the connection point (3) of Tss, an inverted voltage v3 as shown in FIG. 2F appears. For example, the first horizontal scanning line is driven at this electric power V3.

Furthermore, ■3 is sampled by the signal φ2, and the gate ■G of the transistor i''vr is bolded, and a voltage V4 as shown in FIG. -Lunge Stabo 12
Goo 1-■, transistor]' 42, 1' r
, 2 connection points ■ are shown in Figure 2 II, Otori, and J, respectively.
Voltage V51 V6. Vv appears, and the second horizontal scanning line is driven by this voltage V7. The operations described below are performed in sequence.

Here, let VLb be the threshold value of the transistors ']'' 31, 'I'' 61, . . . , which constitute the transmission gate.
＞+＞ + If the condition of V Lh (V hit is the voltage of the power line (3)) is met, the transmission voltage 1.
The signal is transmitted through.

In this way, the human power signal φ1N is transmitted sequentially, and each horizontal scanning line is sequentially driven.

However, in this circuit, six 1-transistor elements are required for the one-prong configuration from transmitting a signal to obtaining the next signal. For this reason, the circuit scale becomes large, especially ■0 conversion L7
There were problems, such as when the IC was used, it became unpopular and the cost of the IC went up. J rope I5 ten stories 11
1δ smell (transistor r'41. T51 and i'TI, 'I'e self-signal) are inverted, so twice the number of elements is required to remove the pickling liquid in the same phase. It has become.

In addition, in the circuit described above, when a faulty glue is connected to the C1 output side, the waveform of the small 4-output signal becomes dull as shown by the broken line in Figure 2, 1'', J. In this case, OHARASOSO occurs between adjacent output signals, and for example, when J↓1 is used in an image sensor, the I'+r image quality deteriorates, and the image deteriorates due to color mixture.

Furthermore, in the case of a double circuit, transistors T2゜T51
1 TGl . 'I'l+...
j\jJrl current flows in the state where is on, and an extremely large amount of power is consumed.

Also, since each transistor is driven in the saturation region,
Particularly when driving the circuit at commercial speed, a large power is required.

Furthermore, if different elements of enhancement type and depletion type are used, for example, if it is changed to
Gekoshi 1, which requires a lot of Seth.

In addition, in the above circuit, the low level of the waveform at the output points ■, ■... is the transistor voltage 1□, Tr, L, T4.
2, determined by the on-resistance ratio of T52...
rI V ” - (VDD VSS ) + VSSr 1 + r 2 However, rl is transistor 1'< 1. 'r...
The on-resistance value r2 is the on-resistance value 'J' of the transistor 'I''ss, Ts2..., and the residual voltage V' that becomes the voltage of the ground line (2) is generated in BH. In order to make it smaller, the ratio of r t + r 2 can be increased, but this is due to the transistor 'r' smell, T<>...
The chip area of transistor T51. T52...
・It becomes much more crowded, which is not desirable. ~ Drive MOSI/ransistor with force output signal!
In the case of JJ, if there is a residual voltage ``1'' connected to ``-'', many problem C constraints such as threshold values will be added. Furthermore, the residual voltage V
There were some problems, such as a decrease in the number of minutes.

OBJECTS OF THE INVENTION The present invention addresses these points and eliminates the drawbacks of the conventional technology with a simple configuration, and in particular eliminates unnecessary potential fluctuations other than output pulses on the output line. ).

SUMMARY OF THE INVENTION The present invention provides an inventive method in which an input signal is input to a source port 1. A capacitive component for a seat strap is provided between the source follower and the source follower of this source volume 1a, so that the signal from the source follower described above has an extremely low impedance during the normal transmission period. At the same time, during other periods, the voltage is supplied to the transmission gate (1-synthesis solution gate) through a circuit that suppresses h1 leakage to the output line of the previous stage due to the feedback of the next-stage electric current 4'6. Transmission gates 1 and 1 are connected in sequence, and each stage of the source bore and transmission gate 1 is driven with a different phase to alternating current.
14 The input signal is transmitted sequentially for each stage.
In the old version of signal transmission 11, J is one that does not cause unnecessary potential changes to the output line.

Embodiment FIG. 3 shows an enhancement type MOS whose input terminal (1) constitutes a transmission gate.
The most transistor M) of the condensation type having a source bore configuration is connected to the booster 1- and 1' through the transistor M1.

Here, the MOS transistor is configured as follows. In Fig. 4, the 1-
, N+ source region (12) and Ruin region (13)
is formed. Then, Si02X is provided on the surface of the device between the source region (12) and the train/in region (13), and a gate electrode (15) is formed thereon.

Therefore, in such a MOSI transistor, in the portion (lti) where the gate electrode (15) and the source region (I2) face each other, a Y sensor is formed and has a capacitance. ,lli, a channel (
17) is formed, and at this time, a gate electrode (15) and a chi tunnel are formed.

And then to the second place. , -C, In the circuit shown in FIG. 3, a bootstrap capacitance component is configured between the transistor M21 and its source.

Furthermore, in FIG. 3, the gate of I-Ran Sosk M21 is connected to the gate of Rani/Distor M31. The L-in of the two transistors M2+ is connected to the gate of an enhancement type MOS transistor M41 constituting a transmission gate.

Further, the source of the transistor M2I is connected in series with I
~ ゛ζ enhancement type MOSI-transistor M6 between the train sources of transistors M31 and Mn2
Connected to the first gate. A capacitive component for the Booth I lamp is constructed between the gate and source of this transistor M5x. Further, the gate of the transistor M51 is connected to the boost 1- of the enhancement type MOS transistor MGI constituting the bathosore circuit. Also, transistor M
5. The drain of the transmission gate is an enhancement type MO S ) transistor Mt that constitutes the transmission gate.
connected to the gate of t. Furthermore, the source of transistor M51 is connected in series with F&. The connected transistors MG1, M?
It is connected to the next stage circuit through the drain and source of I.

Further, the sources of the transistors M 22 and M 52 are MOSI transistors M ei of the enhancement type 1 to
, M is connected to the gate of 91. This transistor M81.

The source drain of Msl is connected between the connection midpoint of the two previous transistors M311 Msl, M6x, and 'M71, respectively, and the ground line (2).

This circuit of transistors M21 to Mst is sequentially and repeatedly connected.

Furthermore, the clock terminal (4) is connected to the gate of the transistor M1 and the drains of the transistors M 51 , M r+2 . . .
51 is the transistor M211 M2? ...'s l Nirain continues.

In this circuit, the terminals (41, (51) and the terminals (1) are
A signal φ1 as shown in . φ2. φIN is supplied. Signal φ1. ψ2. VH, l for the high level of φIN:
Let I-Lehel be VL. In addition, (the pulses of i-number φj and φ2 are (11), (12)...
, (21).

[22J...] Further, the threshold values of all MOS+ and Lancisisters are set to Vth.

As a result, the signal ψlNc: 'Pulse of φ1 to be believed [
12J through the transistor MJ, and the transistor M2+ has two 1-θ 121. to V 1 (Fig. 5D)
is, Vl = V HV Lh...
...It becomes fi+.

Next, the voltage of the source (2) of the transistor M21 is 1. E
V 2 (Fig. 5E) is initially VI V2 −V HV L > V th
−−−−−+(21, so [・transistor M2
1 is on and V2=V,...
...(3) Score. And the pulse of signal φ2 [22
], the voltage V is raised by the bootstrap effect due to the capacitance component of the transistor M21, however, the bootstrap effect C5 of CB clears the stray voltage of the transistor M2t, and at this time v knee vth≧■ If H...(5), then V2=VH...(6), and the pulse [22
] is extracted.

At this time, the transistor M31 is turned on by the voltage V+, and the voltage V3 (Fig. 5F) at the connection midpoint between the transistors M3i and Mn2 is V3 = VH.
-Vth...(7).

Furthermore, in synchronization with the signal φ2, the transistor M41 turns on, and the voltage 3 becomes 1 - the gate of the transistor M51.
is also accumulated. And the voltage V4 of this gate (4)
(Figure 5G) is Vs -V HV Ll+...
...(1)) The transistor Ms1 is turned on in the same manner as the transistor M21, and a pulse [13] or ()J is output from the source (1) to the source (2) of the source (1) and (2) of the transistor (1) and (2).

(Figure 5 11).

1.Similarly,'ζtransistor M22. M52
. . . Source ■, (signals φ1, φ20) Each Noculus (23), (14) . . . is extracted (in Fig. 5, N . . . ).

When I went to Kyoto in November, the subordinate power was 1.
0th order transmission,!・Ran resistor M21. Msl,
M22. Pulses are sequentially taken out to the source of M2.... And this pulse is used to drive the horizontal scanning wheel PIl'j! You can do WJ.

Furthermore, in Fig. 5, voltages V+, V4, Vv・
The rise of electric moon 2■6 is 1-transistor M 211
Boots 1-Lasopuri J due to capacitance component of M5t...
It is due to the nest and is. Also, the voltage ■2 + V5+ Ve...
The ridge 1' of the tU pressure of ・VB is Vl on the voltage y, V4. V
7 When ... changes from VHVLh to ■,
The electric current fief is divided by the boot 1-strap capacitor C8 and the load capacitor CL, and a voltage is generated. Capacity 1 minus 1 negative (; When using iJ, CL >> CB...
.

(In the following circuit, transistor M31゜Me
l... are transistors M 61 , M 22 .
The electric charge (ij accumulated at the gate G), ■... is
When the transistors M411, M71... are on, the sources of the transistors M21, M5+... (+
i) Prevent them from moving away. Furthermore, the transistor Met
+MO1... are transistors M22. MO2・
... sauce with Nogurusu (23), (1,4)
... turns on when it is pulled out, and 1. The above-mentioned goo 1-θ), (1)... are stacked overnight and the saw electricity i;I is absorbed into the ground line (2).

In this way, the transmission of the human input signal φIN is affected, but this circuit can eliminate the drawbacks of the conventional circuit.

That is, in the above circuit, the configuration of one stage of the main stage that transmits a signal and obtains the next signal is, for example, 1-transistor M21.
．． MB2. It has four elements, M2R and MO1. Therefore, the circuit scale is small, and the chip area when integrated into an IC is also reduced.

In addition, the output signal is [one signal φ1. The 1:1 signal φ1. is formed by extracting the pulse of φ2. By shortening the pulse of φ2, it is possible to easily eliminate the Oatsberer knob of the output signal.

Furthermore, like the conventional circuit, Ni! Since no 71 current flows, power consumption is extremely low.

Furthermore, since each transistor is driven in the straight line 6f1 range, it is possible to easily drive at 1" (I speed) without increasing power consumption.

Furthermore, 1 dock signal φ1. Since an output signal is obtained by each of φ2, the frequency of the clock signal can be reduced to 2, which is the conventional frequency, which also reduces power consumption.

In addition, for example, since a circuit can be formed using the Enhancement I-type element, there is less process involved when converting it into an IC.
ζ, it is possible to easily and inexpensively form the circuit 1/fi.

Further, in this circuit, the residual voltage V8 is extremely small and becomes approximately zero. Therefore, there are no restrictions on thresholds, etc., and the dynamic range can be utilized to the fullest.

And furthermore, transistors M 34 , M +, 1
By providing .

Note that here 1-run sister Mat, f~1ri1 is nothing (,
In the case of V3.S, for example, the voltage V3. V4 breaks G in Figure 5.
M-Gobozuyo, but ■kara, ini/heυ) shadow'r
Fl b, transistor M311 Mst... will block the 11j 'sa'12, a', change required. Also, transistors M, l, M3+... are transistors M
si, M27...'s gate and the 1st output line (
2).

Further, FIG. 6 shows another example of the present invention. Transistor M81. Kate force of Ms+...
J'Ru1-Run Sister M1. M41. Connected to the gate of Mt+... In this case, the waveform G of each part of II & O is as shown in FIG. Here ■1. 7).

The voltage stored at the pot end of the 1V is distributed through the l-lansminoshikonge-1-. ttl dry is transistor M et , M 9t.
...and will be absorbed into the 1st place line (2).

And this time h! In g, I transistor M[lI
IMs+...Axis 11 sokuimango ψ1. Since it is turned on every φ2, the potential of the output line is further stabilized.

Furthermore, if the capacitance component for bootstrapping is not enough with only the Mo3) transistor, a capacitor may be provided between the source gate of the transistor and the transistor. The capacitors in that case are 1), 1, using 1 for the capacitance between the gate and source train of the transistors Ma, Mb, . . . as shown in FIG. Also, in this case M
O, S) Ranjisk Ma.

Mb... may be of the cone hancement type C or the debresson type.

), the transistor M31. The M6H buffer circuit may have a dimate connection, for example, instead of the configuration shown in the figure, and in that case, the bipolar transistor I)
An N junction may also be used.

ADVANTAGES OF THE INVENTION According to the present invention, unnecessary potential fluctuations other than the output pulses of the output line can be removed.

[Brief Description of the Drawings] Fig. 1 is a connection diagram of a conventional circuit, Fig. 2 is a waveform diagram for explaining the same, Fig. 3 is a connection diagram of an example of the present invention, Figs. 6 is a diagram for explaining the same, FIG. 6 is a connection diagram of another example, FIG. 7 is a diagram for explaining the same, and FIG. 8 is a connection diagram of still another example of the present invention. (11 is the input terminal, (2) is the ground line, +4], (
51 is a black terminal, and M is an MO3+- run star. Figure 1Δ Figure 4

Claims (1)

[Claims] A human input signal is supplied to the source point Ill 7, a capacitive component for two-tos i/wrap is provided between the gate sources of this source bore, and the signal from the source bore 11a is
During the normal transmission period, the impedance becomes extremely low, and during other periods, the 7Mi! 1 through the Hasofa circuit that suppresses leakage.
- The transmission gate is supplied to the transmission gate 1, and the circuit consisting of the transmission gate 11 and the transmission gate are sequentially connected to each other. By driving the source follower and the transmission case 1 with different phases alternately for each stage, the human power signal is applied with a force of 1 at each stage.
Signal transmission times 1 to 8 degrees for n-th transmission