JPS5930586Y2 - Detection device for synchronization - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a detection device for synchronization when a plurality of power supplies are connected in parallel and applied to a load.

When multiple power supplies are operated in parallel, if synchronization is not achieved between these power supplies, a cross current will flow between the power supplies, so they must be synchronized by making the phases the same.

The present invention was developed for the purpose of properly detecting this synchronization and safely turning on the power, and has achieved this purpose.

Embodiments of the present invention will be described below with reference to FIGS. 1 to 4.

In FIG. 1, reference numerals la and lb are power supply devices consisting of a generator or an inverter connected to a load 3 via a switch circuit 2. In FIG.

In this embodiment, the difference between the voltages of the power supplies 1a and 1b is taken and rectified by the rectifier 4, resulting in a deviation signal such as voltage 1 and a reference signal from the reference power source 5 such as voltage .

is led to a comparator 6, and this comparator 6 determines that the deviation voltage (1) is the reference voltage (2).

The output signal 7 is made to be emitted only when the voltage is higher than that, and this output signal 7 is used as a reset signal for the timer device 8 and the memory device 9, and the voltage (1) is the reference voltage (2).

When the output signal 7 of the comparator 6 is smaller, that is, when the output signal 7 of the comparator 6 is not emitted, the timer device 8 is caused to emit an output signal 10, which causes the storage device 9 to emit an output signal 11. , the output signal 11 causes the switch circuit 2 to operate, and the power supply 1a
This is a synchronization detection device designed to input 1b.

The configuration and operation of the above embodiment will be further explained in detail.

In this embodiment, as shown in FIG. 2, a Schmitt circuit consisting of a transistor 12° 13 and resistors 14 to 19 is used as the comparator 6, and a series circuit consisting of a bias resistor 20° 21 of the transistor 12 is used as the reference power supply 5. The Schmitt circuit consists of a unijunction transistor 22, a capacitor 23, and resistors 24 to 26, and a resistor 2γ, a constant voltage diode 28, and a transistor 2.
A thyristor 30 that uses an oscillation circuit connected through a diode 31 as a timer device 8 and uses the output signal of the timer device 8 as its gate signal through a diode 31.
The storage device 9 is constituted by the above, and its operation is as follows.

A deviation voltage (1) obtained by rectifying the voltage deviations from the currents 1a and 1b by the rectifier 4 is applied to the base of the transistor 12 of the comparator 6.

This transistor 12 is connected to the resistor 20 of the bias setting circuit.
Reference voltage regulated by 21 ■.

Therefore, it is always in a non-conducting state, and as shown in Figure 3, the reference voltage ■.

When a higher deviation voltage (1) is applied, the transistor 12 becomes conductive, the transistor 13 becomes non-conductive, and the comparator circuit 6 generates a rectangular wave signal 7.

This signal 7 is applied to the base of a transistor 29 via a resistor 27 and a constant voltage diode 28.

Due to this signal 7, ■1<■. The transistor 29, which is in a conductive state at times, becomes non-current, and no charging current flows to the capacitor 23 of the timer device 8.

However, the voltage ■1, which is the deviation signal, is the reference voltage ■.

When the voltage becomes smaller and the operation of the comparator 6 is reversed, the transistor 29 becomes conductive and a charging current flows into the capacitor 23 via the resistor 24, and the capacitor 23 is charged as shown by a waveform 35 in FIG.

This charging voltage is the unijunction transistor 2
Before reaching the conduction voltage of 2, the voltage ■.

is the reference voltage again■. When it becomes higher, signal 7 is output from comparator 6.
occurs, and the transistor 29 becomes non-conductive.

Therefore, the charge in the capacitor 23 is discharged through the resistor 24 and the resistor 29a connected to the collector circuit of the transistor 29, and both ends of the capacitor 23 become zero voltage.

Therefore, unijunction transistor 22 is not conducting and does not pulse, so thyristor 30 is not conducting.

Therefore, no output signal is generated from the storage device 9.

Next, both chamber sources 1a and Ib are synchronized, and as shown in FIG. 4, the deviation signal voltage ■1 becomes the reference voltage ■.

As the transistor 12 becomes smaller, the transistor 12 continues to be non-conductive, the transistor 13 continues to be conductive, and thereby the transistor 29 continues to be conductive.

Therefore, in the timer device 8, the capacitor 23 is
The voltage across the voltage is charged as shown by the sawtooth wave 36, and finally the unijunction transistor 23 becomes conductive and an output signal 37 is generated.

This signal 37 causes the thyristor 30 of the memory circuit 9 to conduct, and at the same time, the input signal 11 is issued from the memory circuit 9 to the switch circuit 2 .

This input signal activates the switch circuit 2, and the both chamber source 1
Parallel operation of a and Ib is performed.

Here, as shown in FIG. 4, if the operating time t1 of the timer device 8 is set to be longer than the half cycle time t2 of the deviation voltage ■1, the comparison circuit immediately before the power supplies 1a and 1b are synchronized The falling time T of the signal 7a of No. 6.

At time 11 (time Tb), which is slightly longer than time Ta after half cycle time t2, the potential of capacitor 23 in timer device 8 reaches the on-voltage of unijunction transistor 22.

When the potential of the capacitor 23 reaches the on-voltage of the unijunction transistor 22, the capacitor 23 is discharged through the emitter-base of the unijunction transistor and the resistor 26, and the timer device 8 outputs the output signal 37.
emits.

In response to the output signal 37 of the timer device 8, the cyrisk 30 in the storage device 8 becomes conductive, and the output signal 11 is generated.

That is, as shown in FIG. 4, the falling time T of the signal 7a is half a wave before the synchronization of the power supplies 1a and 1b.

The power supplies 1a and 1b can be turned on with a delay of approximately half a cycle (actually t2+Jt).

As is clear from the above explanation, in the present invention, the voltages of multiple power supply devices are compared and the difference is taken, and this deviation voltage is compared with a reference voltage using a comparator. The comparator is caused to output an output, the output of the comparator is used as a reset signal for the timer device and the storage device, and the timer device is activated when the voltage is smaller than the deviation voltage, and the output signal of the timer device is Since the storage device emits a synchronization detection output and the synchronization state of each power supply device is detected temporally, it is possible to quickly and accurately detect that synchronization has been achieved.
It has features such as being able to automatically turn on the power safely.

[Brief explanation of the drawing]

The drawings relate to an embodiment of the present invention; FIG. 1 is an explanatory block diagram thereof, FIG. 2 is an electrical wiring diagram specifically showing a part thereof, and FIGS. 3 and 4 are explanatory diagrams thereof. It is. 1a, lb...Power supply device, 2...Switch circuit, 3...Load, 6...Comparator, 8...Timer device , 9...Storage device.

Claims (1)

[Claims for Utility Model Registration] In a device that supplies power to a load via a switch circuit only when the respective outputs of a plurality of power supply devices operated in parallel are synchronized, a device that rectifies the difference signal of the plurality of power supply devices. 4 and the deviation signal ■1 obtained by rectifying with this device 4
and the reference signal ■ from the reference power source 5. a timer device 8 that is activated by the output of the comparator when 1 < and a storage device 9 for storing a synchronization input signal to the switch circuit 2 at the end of the timer output. A detection device for synchronization that is reset.