JPS5929298A - Electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a square wave generator that time-divisionally outputs a square wave up to a weighted frequency of N times in order to completely synthesize musical sounds. 1 with a square wave level memory section for specifying.

Traditionally, the music synthesis method for Seiko instruments has basically been based on the sweet and sour of pure sine waves.

If a musical tone is a periodic waveform h(t), it can be expressed by the expansion formula of the Fourier series. Here, up to the 60th overtone is sampled every pr# interval, and is expressed as follows. If you want to calculate the waveforms of up to the 60th harmonic in synchronization with the musical tones in a time-division manner, and simultaneously produce 8 tones, a minimum clock of 2Kj (2B8M in G music 1tiC) Is is required. For this reason, it is possible to reduce p to about 7.2MHt by suppressing harmonics in the high frequency range, but the circuit to achieve this is still a complex circuit. Have difficulty.

In response to this, the present applicant proposed a system which is basically equivalent to the sine wave synthesis method, but utilizes all the harmonic distortion by combining square waves instead of pure sine waves. For such a square wave generation method, the level of the square wave is specified when the tablet is closed, and the conventional method is to set time slots for all tablet switches and scan them, following the TDM or PCM method. However, since this takes time, the idea was to read out and store only the square wave level corresponding to the tablet switch closing information.

SUMMARY OF THE INVENTION An object of the present invention is to shorten the time it takes to read out the square wave level corresponding to the closing signal of a tablet switch and to provide a musical instrument equipped with a square wave level memory section having an intermediate structure.

In order to achieve the above object, the electronic musical instrument of the present invention includes a storage device that stores time-division key codes sent from a key code r-ta assigner at angular velocities +** of corresponding binary codes, and an output of the storage device. A first accumulator that generates a fundamental frequency by accumulating it with a first clock, and accumulating the output of the accumulator N times with a second clock that is N times (N is an integer) or more the first clock. a second accumulator comprising: a square wave signal having a frequency of 1 to N times the fundamental frequency, using the MSB of the second accumulator; means for time-divisionally outputting, a first square wave level recording device for recording and outputting the level corresponding to each order of each square wave 18, and said first square wave level recording device. The output of the device is +i
The square wave output No. 11 of the second accumulator fJ is used to invert the gate.
It is equipped with a square wave generator that outputs a square wave with a frequency factor of 1 to N times the fundamental frequency in a time-division manner, and furthermore, the tablet switch is closed and 11 is set at a predetermined edge.
Therefore, from the high-stirring I+r signal, I
1M? ? :! :, the output of the agitation destination selection device ts is used to selectively output the output of the agitation destination selection device rit, and the output of the agitation destination selection device rit is used to select the second square wave level dpi corresponding to the p tablet switch, respectively. Next [Means to resist, means to cry out data, second square of previous self? The contents of the device d are output one after another, and after 7c, the device has a means of transmitting the 10th square wave level 1C1, and the entire transmission time is turned on to the tablet switch. It's decided! The present invention is particularly advantageous in that it includes a square wave level memory section.

Examples of unexploded Lily will be described in detail below.

Comments on the embodiment of the new Sumiko musical instrument to which the present invention is applied
Next, we will explain the measurement section of the square wave generating circuit that is closely related to the present invention, and then we will explain the details of the square wave novel memory section, which is the main part of the present invention.

To outline the principle and structure of the 7c7 zigzag instrument to which the present invention is applied, if the music f is the circumference υJlJl form hCt), it can be expressed by the expansion formula of the Fourier series. Here, up to 30 times t) r +I
Q ItJ] If you do the two pre/g for each, you will get a second result. This is time-divided up to 60 times the waveform NI゛j? with the same DjL as the musical tone. : If you try to pronounce L and 8'## at the same time, in the musical tone of 2Kklz, it will be 2
B, BMllz clock is required at least. Therefore, by suppressing harmonics in the crystalline range, 7.
It is OHB to lower it to about 2A4flz, but I still want to achieve all of this! ? ) is realized by creating a complex circuit, and in order to create a medium-order sine wave, a weak filter is applied to generate harmonic distortion.
I am trying to synthesize with a square wave of 1/2 or more.
If the square wave is to be destroyed by 5QU(NT), AIS
If a strong filter is applied, the output wave will be Fx (
AI 5QU(ωT) ]# kl sin ωTF
t CAg 5QU(arr) ) ”qk21 si
n 2ω'l' Ten 225m 6 ωTaoFN(AN 5QU(ωT))! =vkN+SinN
ωT + +4Nzsin 3. N(JJT+kH3s
in 5NωT... A waveform is extracted. For example, if you try to synthesize square waves up to N=10, 1~
The waveform up to the 10th overtone is almost completely reproduced. Next, the multiplication 'ti- outputted by p due to harmonic distortion is 12,15.
1B, . . . , 301 and many overtones are generated, and if the factors that determine the timbre of a musical tone are up to about 10 overtones, the desired musical sound waveform can be approximately realized. That is, whereas conventionally it was necessary to synthesize up to 30 harmonics in the sine wave sweet and acid, it is now possible to synthesize up to 1/6 of the 10th harmonic. As a result, the required clock frequency d/ may be approximately 2.4M11z. In order to further lower this frequency, by embedding it in parallel /:r
1/2.1/3. It is clear that the price will drop by 9.

FIG. 1 is an explanatory diagram illustrating the construction of an embodiment 41' of a one-zip box according to the present invention based on the above-mentioned principle. In the same figure, 1
is a keyboard, and the 61-key make-contact 1,000-switch is divided into six blocks, each block being one octave and 12μ. i.e. -t' in 12 rows and 6 columns)
They are arranged in a tucus shape.

Each Φ-.tiV information is scanned block by block by this key code generation circuit 2, and for a block where a key is turned on, block scanning is temporarily stopped until the key information in that block is sent out. Furthermore, −V′ in the block
- The time slots that are selected and output sequentially according to the key that was turned on and the number of blocks are limited to the number of keys that were turned on and the number of blocks, for example, 5 keys are If it is, there will be only 1 run and 5+6=11 eaves slots. This key-on/IJLF information is output as a binary encoded key code corresponding to each key switch, and is applied to the year code data register 3 together with a frame signal indicating the end of one scan.

Key code data assigner 6 has a maximum simultaneous polyphony of 8 chia/
It uses high-speed time-division operation that divides one time slot into eight.

Furthermore, the control a+V operation of the key code data assigner 3 is all performed at frame number 16, and is at frame ID number 16 on the engineering/belog side, that is, content front IpA number 1 (BWS).

Release signal (R8), high speed release No. 1d (FRB)
, Envelope end signal < EEE) The key code data K, which is a frequency 1ff signal, is sent to the bellow generation circuit 4.
CD t N are given to the square wave generation circuit 7, respectively. The envelope generating circuit 4 is composed of a recursive digital filter, and outputs the desired envelope waveform data by controlling the filter constant that determines the filter characteristics and inputs it to the multiplier 9. do. The square wave generation circuit 7 generates the angular velocity 11 read out by the key code KCD.
? 1/10th period MTA from a square wave signal of p fundamental period T by accumulating information.

A square wave 1d number 5QU(N) of 1d is generated in a time division manner within one channel time slot. On the other hand, the square wave level memory section 6 which determines the ephemeris receives the square wave level designated by the taglet switch and the dropper switch 5, and the square wave level memory section 6 outputs the above square waves 1d and 4Wj. The level fault direct AN is read out.

This level coefficient direct AN is inverted gated by the square wave signal 5QLT(N) and then converted to the square wave ANSQU
(N) is input to the digital filter unit 8 in a time-division manner. This digital filter section 8 is constructed as a cyclic digital filter, and the filter q! The filter constants that determine all the characteristics are read out for each sound and the number of sheets, and each filter is applied to the input signal AN 5QU (N) K, k (ANSQU (N) ) fx
R type 7>1 is output in a time-divisional manner and input to the multiplier 9. In this multiplier 9, an envelope is added independently to each channel and each order. The output of the multiplier 2 is accumulated for each order by an accumulator (AC'C) 10, and further accumulated for each channel/channel, resulting in a waveform h(1) for each unit/group.
is input to the L)/A converter 11, and the musical tone . is outputted via the acoustic system 12.

FIG. 2 shows the basic timing waveform of the alpha child instrument of FIG. So is the master clock, clocked at 2.4MHz.

lro+ to gue1o are time slots for square wave generation, and are time-divided into 10 time slots corresponding to square wave signals 5QU(1) to 5QU(10), and L1 time slot is 1/ It is 2400 ms (millisho).

pIH ~ $28 corresponds to the time-sharing key code data TKCI) output from the key code data assigner 6.
The time slot is divided into channels and the shift time slot is i.
/24 oret s de ruru. Further, the jll/I operation speed of the key code generation circuit 2 is a time slot of 1750 ms per key time, and all the circuits perform hour/minute WU operation at this timing.

Figure 3 shows the basic timing waveform generation in Figure 2.
A clock generation circuit included in the square wave generation circuit 7 shown in the figure is shown. The master clock oscillator 7-1 outputs a 2.4 MHz clock g0, inputs it to the decimal counter 7-2, and outputs it to the decoder 6-2 and timing clockers 101 to 101.
The data 110 is output. Next, the output pulse g of color/ri7-2! is inputted to the octal counter 7-6 and sent to the decoder 7-4.
Timing clocks 1 to J2'211 are output, and counter 7-6 outputs pulse g2, which is used for each machine NFE.

FIG. 4 is a detailed explanatory diagram of an embodiment of a square wave generating circuit and its related circuits, which are closely related to the main part of the present invention.

In the same figure, the square wave generating circuit 7 related to the main part of the present invention is shown as blocks 7-1 to 7-8 inside the dotted line, and related circuits are also shown divided into several blocks inside the dotted line. The bud number is indicated by the same number as in Figure 1 or a number derived from this JL.

゛First, the master clock oscillator 7- in the square wave generation circuit z
1 generates a 2.4 MH2 clock pulse shown as Oo in FIG. 2, and inputs this clock pulse 0 to the decimal order counter -2. This output is passed through the decoder 6-22 in the square wave level memory unit 6 to the main associated memory 6-1*w specified by the tablet drawbar switch 5.

On the other hand, when the key code of the frame generated by the pad key code generation circuit 2 of the keyboard 1 is clock y1 with a period of 101 times of the clock lo shown in FIG. read out and decoder 7-
4, and the angular velocity ω is read out from 7-5. The angular velocity ω for determining one period is stored in this angular velocity memory 7-5 as a double code.
Then, the angular velocity can be expressed as ω=2πf/6[7×10′. This angular velocity ω extracted from ωZ is accumulated by the clock for each channel in the channel accumulator 7-6)
f and outputs ωT. Meanwhile, ωT is accumulated by the clock circuit in the order system 7E unit 7-7, and nωT is output. The accumulators 7-6 and 7-7 are set so that the maximum accumulated number is 2π, and values of 2π or more are truncated. Moreover, the output value of the output ffLωT of the order accumulator 7-7 is Iπ~2iπ(
j=1.2. ), outputs 1″, otherwise outputs 0″
Output. That is, square waves 5QU(1) to 5QU(10) having a period up to 10 times are output here. This output is given to the reverse paper gate 7-8. The inversion gate 7-8 has m d corresponding to each circumference medium j 5QU(1) to 5QU(10) read from the raw/failure memory 6-1.
1tft A1~AIG is input, inverting gate 7-8
is inverted gated and A+ 5QLJ(1) ~ A+o S
QU (10) is output. This output is input to a digital filter circuit 8-1 in the digital filter section 8.

On the other hand, the time-sharing key code data TKCI that can be output from the output of the counter 7-2 and the key code data assigner 3
) manually enters the decoder 8-2 in the same digital filter unit 8 and reads out the filter-mounted memory 8-6.

This output is input to the digital filter circuit 8-1.

This filter constant of the platform is used to apply different filters to the order N and musical scale.

As a result, the digital filter circuit 8-1 generates a filtered square wave CAjSQU(1)) ~ fto CA
so 5QU(10)) is output. At this time, in the high tone of 07 etc. 5Q (J (10) ?i 4tjIC1
iz, and Tenbling's theorem is not fully satisfied.

For this reason, a filter is applied to such a square wave to the maximum in order to suppress high frequencies, and the output is set to OdB.

The output of the digital filter circuit 8-1 is multiplied by the envelope signal outputted from the output/belog generation circuit 4 by the multiplier 9, and this output is multiplied by the enveloping output from the output/belog generating circuit 4.
After being accumulated by the clock lo at -1, the channel accumulator 10-2 accumulates JT by the clock 1.
The signal is input to the A-variant 11, the acoustic system 12f7ζ is input, and a musical tone is output. In addition, the s+ mushroom container 10-1
'C, channel! -1 unit 10-2 is the output clock y! of the channel counter shown in FIG. Cleared every Shuho.

#15 Figure t The tablet in Figure 1, which is the main part of the present invention.
FIG. 2 is a detailed diagram illustrating an example of a drawbar switch 5 and a square wave level memory unit 6; Each tablet switch Tb1 to Tbm t attached to the tablet drawbar switch 5
The drawbar switch input line D1 input to the priority selection circuit 6-4 is always connected to the high level H1#. This priority selection circuit M&6-4 is operated by the clock y1, and the gates are sequentially fully opened based on the priority order. As a result, coefficient (1) ~
0? Z) The memory 6-5 is read out sequentially, and the base S unit 6-5 is read out.
4, the coefficient value $ is calculated. On the other hand, the drawbar switch outputs 1g PSS from the priority selection circuit 6-4, 1: D10 A counter 6-10, dfil
od, sequentially scans the drawbar in-1'-6-12 through the decoder 6-11, and writes the data change memo')
The coefficient (1)) is sequentially penetrated into the memory 6-7 via the coefficient (1) 6-15. This operation is always performed when the signal PSS is 1°'. Next, in the priority selection circuit 6-4, line 1) I
was selected II@.

The coefficient (D) memory 6-7 is the output O of the order counter 7-2.
I is input to the decoder 6-2, addressed through the selector 6-9, extracted from the output signal Z, and given to the receiver 46-14. That is, all the data by the drawbar switch is sent out when the signal PSS becomes high level 10 times. The data accumulated in the accumulator 6-14 is synchronized with the system failure (M) memory 6-1', and when the signal PSS is 1'', the output of the accumulator 6-14 is sent to the selector 6-1. 1
", and when No. 18 PSS is "0", the
The output of the (M) memory 6-1' is outputted via the selector 6-1''. The coefficient 6-1 within the dotted line between the (M) memory 6-1' and the selector 6-1# is the fourth If you look at the main coefficient memory numbered 6-1 in the figure, then invert the gate 7 in the figure.
−8 is given. In the inversion gate 7-8, the fourth
As mentioned in the figure, the tablet and drawbar are used to display the prefecture's skin in response to time-division square wave output up to N times the frequency. L.

As described above, in the square wave memory section 6, the coefficient memory (1) is stored only for tablet switches etc. that are turned on.
The contents of ~ (I) and (D) were given 6), and the itching was 7L, all over! After that, it is transferred to the raw coefficient memory 6-1,
This is sent to the square wave generation circuit 7 and the square wave is generated.
(In this case, the main coefficient memory 6-1) plays the role of the second circuit, so the calculation of the square wave level of the tuplet etc. The town apologizes for its high-speed calculations, which can be used all the time without being constrained.

6- shows a detailed circuit example of the priority selection circuit 6-4 in the embodiment of FIG. Tablet switches Ill, ~T and D belonging to tablet-drawbar switch 5
Each l goes to an AND circuit! ~A,, manually input to l+4. Initially, if the input signals Ill, l and 0 are "1", and the Q outputs of the Norig 70 DF1 to DFm+1 are 0, the OR circuits OR+ to ORBm+t) will all output 0, and their inverted outputs. 1″ goes to AND circuit!~Am+j
is being entered. Next, the first input word Th is “0”.
The AND circuit AJf"i"0" is output, the OR circuit ORo outputs 0", and the inverted output "'1" is input to the AND circuit A2.

The human power signal Tb2 is "1", and the AND circuit A2 is "1".
1” to the OR circuit oit1z, and the OR circuit (JRI
I~ORt.

all output “1”, and the inverted input “0” is AND circuit A
3~All, input 1 word l1lb,~i'
hm, Dl are prohibited in the AND circuits A3 to A,,l+1, and only A2 outputs 1'' among the AND circuits A to Am+1, and the song outputs nol+, which is input to the clip 70 tubes DF1 to DFm+x. Huh. Then clock p
Only hK shift flip 70 tube DFx outputs "1". This output inhibits the gate of AND circuit Aco+At via OR circuit 01122 and 0Rzt. This is Shioa circuit 0■ζ! 2~OR, outputs '0'' and opens AND circuits A3~A,,+1.Therefore, next, the input signal is passed through AND circuits A+1, 79 70 7' DF
7 by the next clock O1 given to m+t
Only the lip 70-tube DF,, ++ works better than "1" Kanayama Riki. This output is an OR circuit 0112 (m+.

The inverted output "U" is input to the AND circuit Al-Al2 through ~01ζ21, and the input signal 'I'ht % i'&,
,,l Prohibit DI. Therefore, the next black puffer fish 1
Yoshiflip 70 Tsubu DFs~DF,,, +1 is "0"
Output 1 of the above operating OR circuit ORv+
No. 1 PSS outputs "1" while outputting the selection signal, and when all outputs are completed, the blade is fully 1loN. In this way, among the input signals 1'hJ to l'hmr DI, those that are "1") are selectively outputted according to a predetermined priority face position.For this reason, the required time slot is In the example, there are only 2 time slots.

As explained above, according to the present invention, the closing/+ft reward of the tablet switch is sequentially selected and outputted by the priority selection device according to the predetermined priority order and by the predetermined clock, and the output is sent to the tablet switch. A sickle that reads out the contents of each corresponding square wave level storage device one time at a predetermined clock, accumulates the read data one time, and finishes reading all the contents of the square wave level storage device. , transfer to main square wave level storage.

In this way, due to the function of the square wave level memory unit that reads the priority selection circuit and the square wave level storage device, only the square wave level corresponding to the tablet switch closing 1ff signal is read out, so when reading +WJ Shortening and composition 1
1N unitization can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration explanatory diagram of an embodiment of an electronic musical instrument of the present invention;
5''2 and 6 are basic timing waveforms and their generation circuits used in the vi electronic musical instrument shown in FIG. 1, and FIG. 4 is an example of a square wave generation circuit and its related circuits, which are closely related to the main part of the present invention. Fig. 5 is an explanatory diagram of an embodiment of the square wave level memory section which is the main part of the present invention, and Fig. 6 is a detailed U explanatory diagram of the main part of Fig. g5. i-tricks)
, 2 is a kill code generation circuit, 5 is a key code data assignor, 4 is an engineering/belog generation circuit, and 5 is a tablet.
Drawbar switch, 6 is a square wave level memory section, 6-
1 is the main coefficient memory L6-2 is the decoder, 6-4 is the priority selection circuit, and 6-5 is the related IC! 1. (1)-(m) Memory, 6
-6 is a gate, 6-7 is a coefficient (I)) memory, 6-8 is a gate, 6-9 is a selector, 6-1υ is a counter, 6-
11 is a decoder, 6-12 is a drawbar switch, 6-
13V data conversion memo L 6-14 is accumulator, 7
is a square wave generation circuit, 7-1 is a master clock oscillator, 7
-2 is an order counter, 7-3ri5-Yannel color/ri, 7-41''1. decoder, 7-5 is an angular velocity memory, 7
-6e is the channel accumulator, 7-7 is the order accumulator jy, 7
-8f is the inversion gate, 8 is the digital filter section, 8-1
is a digital filter circuit, 8-2 is a decoder, 8-3
fi, filter constant memory; 9 is a multiplier; 1o is an accumulator; 1o-1 is an order accumulator; 10-2 is a channel accumulator; 11 is a transducer; 12 is an acoustic system. . Patent applicant Kawai Raku aJA Co., Ltd. Agent Patent attorney 1) Yoshishige Saka Figure 4 Figure 5

Claims (1)

[Claims] A storage device that stores the time-sharing key codes sent by the key code data assigner at the angular velocity of each corresponding binary code in 1 ft. The output to the storage device is accumulated using the clock of claw 1 and the basic frequency is a first accumulator that generates n, and a second accumulator that accumulates the output of the accumulator N times with a second clock that is N times the first clock (Ni- is an integer) or more; , means for outputting a square wave signal having a frequency of 1 to N times with respect to the fundamental frequency by using the MSB of the second accumulator in each time slot of the time division key code in a time division manner N times; a first square wave level storage device for storing levels corresponding to each order of the wave signal; In this case, the output of the device is inverted and gated using the square wave output value of the second 141 unit, and the frequency is 1 to N times higher than the fundamental frequency, which is symmetrically inverted between positive and negative. The present invention includes a square wave generator that outputs a square wave of 1 hour and 1 hour, and further selectively outputs taglet switch closing information according to a predetermined order of priority, starting from the information of the high stirring destination, according to the first clock. a priority selection device, a second square wave level register i corresponding to each tablet switch according to the output of the priority selection device;
11 means for persistently reading the contents of the device according to the first clock; means for accumulating the read data to the l-th order;
After the contents of the square wave level storage device have been fully outputted, the first square wave level storage device VC has means for transferring the entire contents of the square wave level storage device VC, and the total transfer time is determined by the tablet switch being turned on. A screw instrument with a characteristic that the parts are equipped with metal fittings.