JPS5928000B2 - Protection device to prevent loss of data words in random access memory - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for preventing loss of data words within a random access memory.

There is no apparatus in the prior art for error correcting the contents of random access magnetic memory that has been subjected to nuclear radiation or other phenomena that cause the words of the memory to be erroneous.

Random access memory, which must retain critical data even after being bombarded with nuclear radiation while writing or retaining data, stores small amounts of data in double or triple duplication in memory. By doing so, it is possible to avoid being affected by radiation. In this way, if a word is lost, it can be recovered by referencing an error-free copy of the word. However, due to practical constraints on memory size,
It is not possible to store the entire contents of normal memory in double or triple duplication. In the case of fixed data, the use of pegwire non-destructive read memory avoids data loss in random access memory without the need for redundant storage.

If suitable bypass circuits are provided to protect the unaddressed words stored in the wire memory, the memory will not be affected by nuclear radiation as far as the fixed data A is concerned. The reason is the non-destructive read characteristics of this type of memory. Therefore, with wire memory, fixed data is only read from the memory during normal operation, and due to the non-destructive read characteristics of this memory, words read during exposure to nuclear radiation cannot be read from the memory itself. Because it is reconfigurable, this type of memory can be used to store fixed data. However, problems arise when using this type of memory for variable data storage, since wire wire memories are sensitive to nuclear radiation as far as the words written to the memory are concerned. That is, certain variable data words written to wire memory while being bombarded with nuclear radiation may be lost, so that when the data words are updated they are not affected by the bombardment of nuclear radiation. Never.

Therefore, unless other protective measures are taken, plated wire memories are not suitable for storing variable data. Furthermore, non-destructive readout plated wire memories are more expensive than destructive readout magnetic core type memories, and cost becomes an important issue when nondestructive readable memories are used for storing fixed data.

However, problems arise when using this type of memory for permanent data storage since cheaper destructive readout memories are susceptible to nuclear radiation both when writing and reading data words. The reason for this is that due to the destructive read characteristics of magnetic core memory, data must be recovered every time a read is performed. If this involves reading data from or writing data to memory,
This type of memory is susceptible to radiation. It is similarly impractical to redundantly store the entire contents of a destructive read magnetic core memory. The present invention provides an improved apparatus for making a destructive read magnetic core random access memory insensitive to radiation and the like as far as the loss of fixed or variable data words is concerned.

The various embodiments described below include the invariant
Fixed, which can be applied to fixed data portions of memory where program data words are stored and which remain unchanged throughout a computer program; alternative embodiments may be such where variable data is stored that is constantly updated or subject to other changes. It can also be applied to the variable data part or the scratch pad part of the memory. The apparatus of the present invention provides for the correction of errors caused by nuclear and other interfering radiation in inexpensive destructive readout core memories, and for doing so in a relatively simple, inexpensive, and linear manner. It solves the most difficult problems.

The basic problems in making random access magnetic memory immune to nuclear radiation are similar for both core memory and plating wire memory.

The main similarity lies in the fact that during a write or read cycle, it is extremely difficult to control the current in the memory with the precision necessary to ensure accurate write and read operations. The main difference between core memory and wire memory is that during the read cycle of core memory, the core also requires read/rewrite operations as it is susceptible to nuclear radiation during the read operation, whereas wire memory requires read/rewrite operations during the read cycle. Memory is something that it is not. , in this specification, each memory element is
The invention will be described by way of example of a random access magnetic core memory as selected by a -Y switching matrix and an applied inhibit current of 1.

Such memories are well known and are described, for example, in the McGraw-Hill Encyclopedia of Science and Technology.
ncycleOpediaOfScienceandTe
ehnOlOgy) (1960 edition), Volume 4, page 185.

The protection device of the present invention includes a bypass circuit that isolates the magnetic core random access memory from the effects of nuclear radiation upon detection of that radiation.

This bypass circuit allows the protection of unaddressed memory locations. However, when exposed to nuclear radiation during actual write or read/rewrite operations, it is extremely difficult to control the necessary current in the memory with a detour circuit. This means that words read from or written to core memory during exposure to radiation may be lost. As mentioned above, the wire memory operates with non-destructive readout, which prevents the words stored in the memory from being destroyed even if the readout occurs during exposure to nuclear radiation. However, in the case of magnetic core memories, words affected by radiation may be lost during exposure to nuclear radiation because the desired word in each read operation must be restored in a subsequent write operation. Therefore, a device must be provided for reconstructing the words accessed during exposure to nuclear radiation. In the case of plating wire memories, only equipment is needed to reconstruct the words actually written to the memory during exposure to nuclear radiation. However, in the case of core memory, modifications must be made to words that are read or written during exposure to nuclear radiation. As briefly described above, one embodiment of the apparatus of the present invention provides an error correction word for each block of fixed data words, which error correction word provides radiation immunity to fixed data program storage. Destructive read core memory can meet all requirements for device performance and operation.

A second embodiment of the present invention applies the concept of error correction words to the case of variable data storage. The third embodiment applies another error correction technique to variable data storage.
Hereinafter, the present invention will be explained in detail with reference to the drawings.

To prevent unaddressed contents of random access memory from being altered by exposure to nuclear radiation,
It is necessary that no excessive current flow through any select line of the memory. Generally, this means that all currents X. through a particular memory element. Y. This means that the sum of I must be kept below the maximum allowed "half-select" current.
A shunt circuit is used to shunt drive current from individual elements on all three axes of the memory. Such bypassing of the drive current is performed by the circuits shown in FIGS. 1 and 2. These circuits prevent all unaddressed memory elements from being disturbed during exposure to radiation. Furthermore, in order to prevent nuclear radiation from destroying associated circuits and circuit elements, a radiation detector D1 (see Figure 2) is installed to stop the operation of all active circuits immediately after being exposed to a nuclear radiation pulse. ) is used. Radiation detector D1 is of the type that generates an output signal in response to nuclear radiation or the like above a predetermined threshold level. The circuit shown in FIG. 1 is incorporated into a drive circuit for inhibiting current 1.

This current is controlled to flow through the memory stack to ground during normal operation of the memory device. This circuit includes a conventional common emitter NPN transistor Q2. This transistor is made conductive by an inhibited current 1 applied to its base, and the PNP transistor Q
Complete the base circuit of 1. Therefore, transistor Q1 becomes conductive and transfers the inhibited current to memory stack M1.
flow to the memory element. The collector of transistor Q2 is connected to the base of transistor Q1 via resistor R2, and the collector of transistor Q1 is connected to memory stack M1.
The emitter is connected to the positive terminal of the 12.5 power supply. The base of transistor Q1 is resistor R
1 to the 12.5V power supply. Resistors R1 and R
The common connection point with 2 is connected to diode CRl. A fast turn-off pulse is applied to this diode to terminate inhibit current from flowing through memory stack M1 when the inhibit control pulse is removed. While being bombarded with nuclear radiation, transistor Q1 has a transient leakage current 1p1.
, ip2, ip3 flow. The resistance values of resistors Rl and R2 are set to relatively low values in order to prevent the current 1p1 flowing through the memory from reaching a perceptible value due to transistor Q1 becoming conductive during nuclear radiation bombardment. Ru. In the circuit shown in FIG. 2, a pair of transistors Q3 and Q4 provide a current shunt around the X-Y switch of the memory selection network.

When a nuclear radiation pulse is applied, the output signal of the radiation detector D1 makes transistors Q3 and Q4 conductive, causing the shunt circuit around the X-Y switch to conduct, and reducing the selected current flowing through the memory M1 to a predetermined half. Prevents the current from increasing above the threshold. The circuit shown in Figures 1 and 2 is
-Can be applied to either Y current or prohibited current. Error correction in the case of words accessed in the fixed data storage portion of the memory stack M1 involves reconstruction of the loss of one data word from a known location within the fixed data portion of the memory.

Each block of fixed data words in the fixed zeta portion of memory stack M1 (the block shown in FIG. 3) has a corresponding error correction word.

In the error code shown here, each bit of the error correction word is an "exclusive OR" bit for the corresponding bit string of the fixed data word in the corresponding flock. As mentioned above, two conditions are necessary for the word restoration device of this embodiment to achieve its intended purpose. These conditions are that the error must be limited to one fixed data word and that the address of the affected fixed data word must be known. Random data generated by the word restoring device according to the first embodiment of the present invention.
An example of word restoration in the fixed data section of the access memory is shown in the block diagram of FIG.

In this figure, the block has four words as shown in the [Memory address address] column, and these words are the addresses AO, a1, and A1 of the fixed data storage section of the memory. It's located at A2 and A3. Also, error correction word P. The address of is any given memory location (
S. D. )It is in. The data blocks shown in the ``Original Contents'' column, and the particular block shown in FIG. 4, consist of four data words of 4 bits each and an error correction word. Each bit of the error correction word is the even parity of the corresponding bit string in the block. Assume that a particular word is lost when a nuclear radiation pulse is bombarded while accessing the word stored at address A2, as shown in the "Modified Content" column. It should be noted that in the example described here only one word is affected by the radiation and the address of that word is known. Following the radiation pulse, the affected word is accessed and loaded into memory with all [0's] as shown in the "Modified Content" column. The original word affected by the radiation pulse can be reconstructed by forming the calculated error correction word as an "exclusive-OR" word of all blocks of data. This error correction word contains the affected word (which is now [0
) and the original error correction word. This calculated error-corrected word is a reconstruction of the word affected by the radiation pulse, as shown in the "Corrected content" column.In reality,
The calculated error correction word is the "exclusive OR sum" of the block. Word recovery errors that can be configured to achieve the desired result of the present invention, namely, the recovery of words that are lost when bombarded with radiation pulses during write cycles or read/rewrite cycles of random access memory. There are several correction devices.

Word recovery for fixed data words can be performed by an error correction device represented by a first embodiment of the invention. In this first embodiment, all fixed data memory words are divided into blocks within the memory stack. Each block has a corresponding error correction word stored at a convenient address in memory. In addition to the detour circuits shown in FIGS. 1 and 2, in accordance with the present invention, a word recovery device shown in the block diagram of FIG. 5 is used to protect the fixed data in the memory from being affected by radiation.

The memory bypass circuit shown in FIGS. 1 and 2 allows radiation effects to be confined to a single memory location, and the device shown in FIG. 5 allows recovery of lost fixed data words that were accessed during the radiation exposure. As mentioned above, when nuclear radiation pulses are applied during write or read/rewrite operations of random access memory, accessed words may be lost.

In order to restore a word using the apparatus shown in FIG. 5, all that is required is that the address of the affected word be known and that an error correction word be available in the program in which the word is located. Error correction words are not altered by radiation because they are typically stored in unused portions of memory and are not accessed until radiation is applied. , the address of the word affected by the radiation is held in the address register 10 of the apparatus shown in FIG.

Then, input the “O” from [O] source 15 to register 1
Restoration of the affected word is performed according to the computer's normal restoration routine by loading the memory location specified by the address in 0. In this way, the affected word is replaced by "O". Then, the affected word itself (which is now [0]) and the original error correction word (which is normally is stored at an unused address) and all words in the block containing the affected word, including [
A calculated error correction word is formed inside the register 17 by sending it to a hardened register 17 through an exclusive-OR adder circuit 19. This formed word is a reconstruction of the affected word, and that word is placed in the affected word's memory location in memory M1 in place of a "0". During a read/write operation of a magnetic core memory in which the apparatus shown in FIG. into a series of latch circuits represented by .

These latch circuits 12 are coupled to fixed registers 10 so that the address of each fixed data word accessed during a read/rewrite operation is held in register 10 and is not connected to the data bus interface circuit during operation. The corresponding data words added to 14 are processed. Then, if a radiation pulse were to be bombarded during the processing of that fixed data word, the address would be held in register 10 so that a reconstruction operation for that word could be performed. The fixed registers 10, 17 can be made of any suitable semiconductor or magnetic device whose contents cannot be altered by even the most intense radiation that may be applied. The apparatus shown in FIG. 5 and the description thus far in the specification assumes accessing fixed field data from a fixed data portion of memory.

The device for performing word restoration for variable data words is
A second embodiment of the invention is shown in the functional block diagram of the figure. The device shown in FIG. 6 has fixed address registers 10, 17 shown in FIG.
, an address latch circuit 12, a data bus interface 14, a "0" source 15, an exclusive OR logic adder circuit 19, a data input register 20, a data output register 22, and an "exclusive OR logic adder circuit 19". ] logic 26. The variable data word reconstruction device shown in FIG. It can be held in register 10.

The bypass circuit can be only one memory field affected by the radiation pulse, and the enhanced resistor 10
ensures that the addresses of the affected data words are preserved. Input data register 20 and output data register 22 include exclusive or logic 26 and delta error word register 2.
4 to enable constant updating of the computed error correction register 17 for variable data words.
The apparatus shown in FIG. 6 operates similarly to the apparatus shown in FIG. 5 to reconstruct words affected by radiation using updated error correction words after exposure to nuclear radiation. Since the error correction word is affected by the removal of the data word and its replacement by another word in the data block, it is necessary to change the error correction word in two steps.

The calculated error correction word register 17 is a double register, with two registers so that one register is not updated until the other register is set so that the radiation applied during the update cycle does not destroy the correction word. The two registers are updated alternately.

The word restoration operation can be controlled by a computer subroutine as part of the computer's normal restoration operation. The restoration operation to be performed depends on whether a read/rewrite cycle or a clear/write cycle was occurring at the time of exposure to the radiation, and the portion of the cycle in which the exposure occurred. The mechanism (MechanicationOn) after changing the variable data does not affect the restoring operation for the fixed data portion of the memory. The operations performed for the variable data portion of memory are
It relies on the presence of an updated appropriate error correction word from the enhanced register 17 of the device shown in FIG. The two actual memory cycle executions of memory performed in conjunction with the apparatus shown in FIG. 6 are better illustrated in the flowcharts of FIG. has been done. The restoration operation is best illustrated in the flow diagram of FIG. These flowcharts demonstrate a thorough approach to implementing the sparse error correction technique of FIG. Restoration of variable data words is performed in the fifth step.
6 is possible for random access memory without the generation and use of error correction words as is the case in the device shown in FIG.

FIG. 10 shows a protection device for a wired random access memory during a write operation, and FIG. 11 shows a magnetic core type random access memory protection device during a write operation or a read/rewrite operation.
1 shows a device for protecting access memory;
3 For example, Metsuki wire random access
In the case of a memory, critical variable data that must be retained when exposed to nuclear radiation is usually divided into blocks A, B, C, D, and E in the memory, for example. This device has 4 program buffers and 10
0 is set. For example, if block A is to be updated, the contents of block A are stored in buffer 100 under the control of an appropriate logic circuit 102 so that the contents of block A are stored redundantly in both buffer 100 and block A. loaded into. Now, if PROC A is bombarded with radiation while it is being updated, the original contents of PROC A are retrieved from buffer 100.

In other respects, this device operates similarly to the devices described above, and may utilize the bypass circuit shown in FIGS. 1 and 2. Under the particular operation described herein, since information is written only to memory block A, the other memory blocks are in read-only mode and protected by bypass circuitry. It will be appreciated that other procs can be updated in a similar manner, with the contents of each proc being loaded into buffer 100 prior to each update operation. In the case of magnetic core random access memory, an additional level of independent redundant data storage can be added, as shown in Figure 11, to make the memory immune to nuclear radiation pulses. is necessary.

As shown in FIG. 11, this memory can be divided into five main memory blocks A-E, each main memory block being wired to a corresponding write-only shadow memory block A-E. To perform an update, the contents of the main memory block to be updated are loaded into buffer 106, and at the same time the contents of the corresponding shadow memory block are loaded into buffer 106.
Loaded into 08. A particular main memory block and its corresponding shadow memory block are then updated simultaneously. Then, similar to the device described above, if any block is bombarded with radiation during an update, the original content will still be retrieved from the shadow block. During a normal read operation, data is read only from the main block; the shadow blocks are not accessed.

However, if radiation is bombarded during the read/rewrite cycle, the data can always be retrieved by activating the corresponding shadow block after the radiation has disappeared. A shadow or redundant memory block then performs all of the functions described above. When the computer is operating normally, the shadow memory is controlled to operate as write-only. When a read is requested at an address in this portion of memory, only the main block will cycle and respond. Therefore,
It is clear that only data that is changed during the radiation exposure is written to or read from both the main and shadow blocks. Since the shadow block is never read during a read cycle, it always retains its memory contents. ·but,
When radiation is applied, the output of the radiation detector is used to change the mode relationship of the two memory blocks of the affected word, with the main block becoming a write-only block and the shadow block becoming a read/write block. becomes. Therefore, as described above, by adding a current shunt circuit as shown in FIGS. 1 and 2 to a random access destructive read memory or a random access memory, it is possible to prevent the memory from being accessed when exposed to radiation. This allows memory loss to be limited to known addresses.

The accessed word in the fixed memory or program storage device is as described in connection with the apparatus shown in FIG.
It can be reconstructed by using program parity words. Similarly, the accessed words in the variable data portion of memory can be reconstructed by the various devices shown in FIGS. 6, 10, and 11. Accordingly, the present invention provides an error correction system that makes random access magnetic core memory immune to radiation effects.

The device of the invention protects unaddressed words in memory from the effects of such radiation and allows the affected data words to be reconstructed. The present invention can be modified in addition to the embodiments described above.

For example, all or part of this device can be wired,
It can be used in various types of memory, such as magnetic drums, to make the underlying memory elements resistant to radiation even when they are not being accessed.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of a circuit that protects the prohibited portion of a random access memory from the effects of nuclear radiation, and FIG. - A circuit diagram of a shunt circuit for protecting the Y selection part from the effects of nuclear radiation. FIG. 4 shows how the error correction words of FIG. 1 can be used to implement the present invention. Table 5 showing an example of word restoration performed by the first embodiment.
FIG. 6 is a functional block diagram of a first embodiment of the present invention that can be used to reconstruct fixed data words; FIG. The functional block diagrams of the second embodiment of the present invention, which are adapted to be constantly updated, are shown in FIGS. FIG. 10 is a flowchart of the routine; FIG. 11 is a block diagram of a third embodiment of the invention applied to a wired random access memory for reconstructing variable data words affected by nuclear radiation; FIG. - FIG. 5 is a block diagram of a fifth embodiment of the present invention for reconfiguring variable data words applied to an access magnetic core memory; 10...Address register, 12...
Address latch, 14... Data bus interface, 15... "O" source, 17...
...Calculated parity register, 20...
・Data input register, 22... Data output register, 24... Parity register, 26...
...exclusive logic, 100, 106, 108
・・・・・・Proc buffer, 102,110...
...Logic circuit.

Claims (1)

Claims: 1. A protection device for preventing loss of data words in a memory having at least one block of multi-bit data words, said block having a specified number of data words;
The memory is accessed by a data bus and an address bus, and the protection device includes a bypass circuit that disables the memory and a parity check that checks the stored data words against multi-bit error correction. In a protective device having a device and supplying a corrected word,
The operation of the bypass circuit is configured to start in response to the output of radiation detector D_1 and is coupled to the address bus to store the memory location to be addressed. a radiation hardened address register 10 and a data bus interface 14 having an input of a source 15 coupling said data bus to said memory and forming an all zero word; A parity checking and word reconstruction device 17, 19 is provided for receiving and receiving input, a separate error correction word being stored in said memory for each block of data, and in response to the output from said radiation detector. A source of 0 is coupled to the data bus interface which is accessed to the parity check and error correction device along with the error correction word for each block, and the output of the parity check and error correction device is coupled via the data bus interface. and is combined with the address stored in the address register to reconstruct words lost due to nuclear radiation.
A protection device that prevents the loss of data words in memory. 2. In the installation according to claim 1, a data input register 20, a data output register providing input to said parity checking device, and a logic having inputs from said data input register and data output register for updating. circuits 26, 24, a third register coupled to the access device for storing each data word accessed by the access device; and a fourth register, wherein any data word is replaced in the blotter by a different data word. an access device for updating the error correction word when the error correction word is received, and for inserting the updated error correction word into a fourth register into the memory at the original error correction word location to replace the original error correction word; and a logic circuit coupled to a fourth register. 3. The device according to claim 1, wherein the data words are stored in memory modules in a plurality of main blocks, each main block consisting of a predetermined number of data words, each of which contains a plurality of data words. are stored in separate memory modules within each shadow block, each shadow block containing the same word of the corresponding main block, and writing to any particular word within the main block.
Another logic circuit for simultaneously entering data during an update cycle is to have certain words in the main block and shadow block replaced with updated data words, and to cause the access device to access only the main block during the read cycle. A device that allows users to extract only specific words from their main blocks.