JPS5925541B2 - Control information line loop configuration method - Google Patents
Control information line loop configuration methodInfo
- Publication number
- JPS5925541B2 JPS5925541B2 JP55098715A JP9871580A JPS5925541B2 JP S5925541 B2 JPS5925541 B2 JP S5925541B2 JP 55098715 A JP55098715 A JP 55098715A JP 9871580 A JP9871580 A JP 9871580A JP S5925541 B2 JPS5925541 B2 JP S5925541B2
- Authority
- JP
- Japan
- Prior art keywords
- control information
- terminal device
- exchange
- information
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Exchange Systems With Centralized Control (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Description
【発明の詳細な説明】
本発明は交換機と端末装置間をディジタル回線で結び、
交換制御情報線をループ状構成とする方式に関するもの
である。[Detailed Description of the Invention] The present invention connects an exchange and a terminal device with a digital line,
This invention relates to a system in which an exchange control information line has a loop configuration.
交換機と端末装置間の接続及び各種制御を行なうために
は制御情報の送受が必要である。In order to connect and perform various controls between the exchange and the terminal equipment, it is necessary to send and receive control information.
従来の情報伝送方式を第１図によつて説明する。A conventional information transmission system will be explained with reference to FIG.
Ｔｏ−Ｔｎは各々端末装置、ＥＸは交換機、Ｄ／Ｉはド
ロッパインサータ回路であり、各端末装置Ｔｏ−Ｔｎの
制御情報と音声データ又は文字データ等の通信情報とを
分離して送受制御をする。また、ＩＦｏ−ＩＦｎ１１諒
り御情報用インタフェース回路、ＴＣｏ−ＴＣｎは伝送
制御装置、ＬＴ、ＬＲは各端末装置Ｔｏ−Ｔｎと交換機
ＥＸを結ぶディジタル回線で、ＬＴは交換機ＥＸから端
末装置Ｔへの送信線、ＬＲは端末装置Ｔから交換機ＥＸ
への受信線である。また、ＮＷは通話接続路であるネッ
トワーク、ＣＰはこのシステムを制御するための中央処
理装置である。To-Tn is each terminal device, EX is an exchange, and D/I is a drop inserter circuit, which separates the control information of each terminal device To-Tn from communication information such as voice data or character data and controls transmission and reception. . In addition, IFo-IFn11 is an interface circuit for consent information, TCo-TCn is a transmission control device, LT and LR are digital lines connecting each terminal device To-Tn and the exchange EX, and LT is a connection from the exchange EX to the terminal device T. Transmission line, LR is from terminal device T to exchange EX
This is the receiving line to. Further, NW is a network which is a communication connection path, and CP is a central processing unit for controlling this system.
ここで通信のために端末装置Ｔｏが発呼した場合、発呼
要求情報は受信線ＬＲを経由して交換機ＥＸに送出され
、ドロッパインサータ回路Ｙ）／Ｉにおいて前記発呼要
求情報を分離し制御情報用インタフェース回路ＩＦｏへ
送出する。Here, when the terminal device To makes a call for communication, the call request information is sent to the exchange EX via the reception line LR, and the drop inserter circuit Y)/I separates and controls the call request information. It is sent to the information interface circuit IFo.
当該制御情報用インタフェース回路ＩＦｏでは送られて
来たパルス列を受信し、内容を処理できる形式に整え、
伝送制御装置ＴＣｏに送る。伝送制御装置ＴＣｏでは決
められた伝送手順に従って情報が到来しているか判定識
別し、必要な情報のみを中央処理装置ＣＰに転送する。The control information interface circuit IFo receives the sent pulse train, arranges the contents into a format that can be processed,
Send to transmission control device TCo. The transmission control unit TCo determines and identifies whether information has arrived according to a determined transmission procedure, and transfers only necessary information to the central processing unit CP.
中央処理装置ＣＰは端末装置Ｔｏの発呼要求を識別し、
通常の交換動作と同様に端末装置ＴＯにダイヤル音を送
出するためにネツトワークＮＷを動作させる。The central processing unit CP identifies the call request from the terminal To,
The network NW is operated in order to send a dial tone to the terminal device TO in the same way as a normal exchange operation.
その後端末装置ＴＯでダイヤルを行なうと前述と同様に
して、ダイヤル情報が、端末装置ＴＯ−受信線ＬＲ−ド
ロツパインサータ回路Ｄ／Ｉ一制御情報用インタフエー
ス回路１Ｆ０一伝送制御装置ＴＣＯ一中央処理装置ＣＰ
と送られ、中央処理装置ＣＰが接続相手先、例えば端末
Ｔｉを識別し、ネツトワークＮＷを制御して端末装置間
ＴＯ−Ｔｌを接続する。After that, when dialing is performed on the terminal device TO, the dial information is transmitted in the same manner as described above: terminal device TO - reception line LR - drop pin inserter circuit D/I - control information interface circuit 1F0 - transmission control device TCO - central processing. Device CP
The central processing unit CP identifies the connection destination, for example, the terminal Ti, controls the network NW, and connects the terminal devices TO-Tl.
このとき、着信端末装置Ｔｉに着信情報（例えばランプ
表示等）を送出するには、中央処理装置ＣＰ一伝送制御
装置ＴＣｌ一制御情報用インタフエース回路１Ｆｉ−ド
ロツパインサータ回路Ｄ／Ｉ一送信線ＬＴ一端末装置Ｔ
ｉの経路で行ない、前記着信情報を端末装置Ｔｌ内部の
制御装置で識別し、着信表示することができる。以上説
明したように、制御情報の送受はポイントツーポイント
（ＰＯｉｎｔｔＯｐＯｉｎｔ）即ちスター状ネツトワー
クで行なわねていた。At this time, in order to send the incoming call information (for example, lamp display, etc.) to the incoming terminal device Ti, the central processing unit CP - transmission control unit TCl - control information interface circuit 1Fi - drop pin inserter circuit D/I - transmission line LT-terminal device T
i, the incoming call information can be identified by a control device inside the terminal device Tl, and the incoming call can be displayed. As explained above, control information is not transmitted and received using a point-to-point (POinttOpOint), that is, a star network.
この従米方式によれば、交換機側に端末装置数に等しい
制御情報用インタフエース回路と制御情報の伝送制御装
置が必要となり、経済化が困難であるとともに、交換機
も大きなものとなり、かつ情報伝送効率が悪いという欠
点があつた。According to this system, the switching system requires control information interface circuits and control information transmission control devices equal to the number of terminal devices, making it difficult to achieve economical efficiency, requiring a large switching system, and reducing the efficiency of information transmission. The drawback was that it was bad.
本発明はこれらの欠点を除くために、かかる情報伝送に
対して柔軟性、拡張性、経済性等で従来のスター状ネツ
トワークに比べ優れたループ状ネツトワークをメモリ装
置を介して構成することを目的とするものである。In order to eliminate these drawbacks, the present invention constructs a loop-like network using a memory device, which is superior to conventional star-like networks in terms of flexibility, expandability, economy, etc. for information transmission. The purpose is to
以下本発明の実施例について、図面を参照して詳細に説
明する。Embodiments of the present invention will be described in detail below with reference to the drawings.
第２図は本発明の一実施例を示す方式図である。FIG. 2 is a system diagram showing an embodiment of the present invention.
第２図において、ＭＬはループ構成用のメモリ装置、Ｌ
ＰＣはループ伝送制御装置であり、他は第１図のものと
同様である。まず、第２図にもとづいて制御情報の流れ
を説明する。In FIG. 2, ML is a memory device for loop configuration, L
PC is a loop transmission control device, and the others are the same as those in FIG. First, the flow of control information will be explained based on FIG.
任意の端末装置Ｔｌが通信のために発呼した場合、発呼
要求情報は受信線ＬＲを経由レ交換機ＥＸに送出され、
前記端末装置Ｔｌに対応したドロツパインサータ回路Ｄ
／Ｉにおいて発呼要求情報が分離され、既知の方法によ
り時分割多重されてメモリ装置ＭＬに取込まれる。メモ
リ装置ＭＬ内のメモリ素子（後述する第３図のＤＭ）に
時分割多重化された前記発呼要求情報を周期的に書込む
。即ち、端末装置Ｔｌの制御情報は、時分割チヤネルＣ
Ｈｉに対応するメモリ素子のアドレスｌに書込まれる。
なお、端末装置Ｔｌは必ずしも時分割チヤネルＣＨｉに
対応していない。一方、交換機ＥＸから端末装置Ｔへ情
報を送出するために前記メモリ装置ＭＬから読出すには
、交換制御情報の書込まれたメモリアドレスｉ−１の内
容を端末装置Ｔｉが接続している時分割チヤネルＣＨｉ
に送出する。端末装置Ｔｉに到達した情報は当該端末装
置Ｔｉの中で折返さね、送信粕１Ｔを経由して交換機Ｅ
Ｘに戻つて卒る。なお、前記メモリアドレスｌ−１に書
込まれていた交換制御情報は時分割チヤネルＣＨｉ−１
で端末装置Ｔｉ−１から伝送された交換制御情報である
。したがつて、時分割チヤネルＣＨｉで書込まれたメモ
リアドレスｌの内容は、端末装置Ｔｌ＋１を接続する時
分割チヤネルＣＨｌ＋１に送出する。以上の操作を続け
ることによつて、端末装置ＴＯ〜Ｔｎまでの制御情報は
時分割チヤネルＣＨＯ−｛′Ｉｉｌに多重化されるもの
であるが、最終の時分割チヤネルＣＨｎ＋１の書込みは
伝送制御装置ＬＰＣの制御情報をメモリアドレスｉ＋１
に行ない、循還して元に戻つた時分割チヤネルＣＨＯの
読出しはメモリアドレスｉ＋１に行なう。When any terminal device Tl makes a call for communication, the call request information is sent to the exchange EX via the reception line LR,
Drop pin inserter circuit D corresponding to the terminal device Tl
At /I, the call request information is separated, time-division multiplexed using a known method, and taken into the memory device ML. The time-division multiplexed call request information is periodically written into a memory element (DM in FIG. 3, which will be described later) in the memory device ML. That is, the control information of the terminal device Tl is transmitted through the time division channel C.
It is written to the address l of the memory element corresponding to Hi.
Note that the terminal device Tl does not necessarily support the time division channel CHi. On the other hand, in order to read information from the memory device ML in order to send information from the exchange EX to the terminal device T, the contents of the memory address i-1 where the exchange control information is written are read when the terminal device Ti is connected. Split channel CHi
Send to. The information that reaches the terminal device Ti is not looped back within the terminal device Ti, but is sent to the exchange E via the transmission droplet 1T.
Return to X and graduate. Note that the exchange control information written in the memory address l-1 is transferred to the time division channel CHi-1.
This is the exchange control information transmitted from the terminal device Ti-1. Therefore, the contents of the memory address l written in the time division channel CHi are sent to the time division channel CH1+1 that connects the terminal device Tl+1. By continuing the above operations, the control information from the terminal devices TO to Tn is multiplexed onto the time division channel CHO-{'Iil, but the final writing to the time division channel CHn+1 is performed by the transmission control device. LPC control information is stored at memory address i+1
The readout of the time division channel CHO, which has been carried out and returned to the original state, is carried out at memory address i+1.
このことにより、制御情報線は端末装置ＴＯ−Ｔｎ及び
ループ伝送制御装置ＬＰＣ間でメモリ装置ＭＬを介して
ループ状ネツトワークを構成する。次に本発明を実施す
る際のメモリ制御の例について第３図により説明する。As a result, the control information line constitutes a loop network between the terminal device TO-Tn and the loop transmission control device LPC via the memory device ML. Next, an example of memory control when implementing the present invention will be explained with reference to FIG.
第３図において、ＤＭは時分割チヤネルＣＨＯ−ＣＨｎ
＋１の各々に対応したループ構成用のメモリである。端
末装置ＴＯ〜Ｔｎ及びループ伝送制御装置ＬＰＣの制御
情報を記憶する。端末装置ＴＯ−Ｔｎは時分割チヤネル
ＣＨＯ−ＣＨｎで前記メモリＤＭに接続し、ループ伝送
制御装置ＬＰＣは時分割チヤネルＣＨｎ＋１でメモリＤ
Ｍに接続する。ループ構成用メモリＤＭの各メモリ素子
の各々には、各チヤネルＣＨＯ〜ＣＨｎ＋１に接続した
各端末装置ＴＯ−Ｔｎ及びループ伝送制御回路ＬＰＣの
情報内容がα。，α１・・・αｉ−１，αｌ・・・αｎ
及びαｎ＋１として示してある。ＨＭはループ構成用メ
モリＤＭのアドレス制御保持メモリである。さらにＩＮ
は情報書込み端子、０ＵＴは情報読出し端子である。In FIG. 3, DM is a time division channel CHO-CHn
This is a memory for loop configuration corresponding to each of +1. Stores control information for the terminal devices TO to Tn and the loop transmission control device LPC. The terminal device TO-Tn is connected to the memory DM through a time division channel CHO-CHn, and the loop transmission control device LPC is connected to the memory D through a time division channel CHn+1.
Connect to M. In each memory element of the loop configuration memory DM, the information content of each terminal device TO-Tn and loop transmission control circuit LPC connected to each channel CHO to CHn+1 is α. , α1...αi-1, αl...αn
and αn+1. HM is an address control holding memory of the loop configuration memory DM. Further IN
is an information write terminal, and 0UT is an information read terminal.
各メモリＤＭ，ＨＭの左側の添字０−１−ｎ＋１は各メ
モリＤＭ，ＨＭのアドレスを示す。その他の符号は第２
図のものと同様である。ループ構成用メモリＤＭとアド
レス制御保持メモリＨＭとを同期して動作させ、かつ同
一時分割回線内で書込み時間と続出し時間の切替制御を
行なうことと、アドレス制御保持メモリＨＭにプログラ
ムによつて任意の情報を書込むことは、時分割スイツチ
での公知の技術である。Subscripts 0-1-n+1 on the left side of each memory DM, HM indicate the address of each memory DM, HM. Other signs are second
It is similar to the one shown in the figure. The loop configuration memory DM and the address control holding memory HM are operated in synchronization, and the writing time and continuous output time are controlled within the same time division line, and the address control holding memory HM is programmed. Writing arbitrary information is a known technique in time division switches.
ここで端末装置ＴＯの受信線ＬＲから送り込まねる情報
α。Here, information α is sent from the reception line LR of the terminal device TO.
は、時分割チヤネルＣＨＯに対応するループ構成メモリ
ＤＭのアドレスＯに周期的に書込まれ、同一時分割チヤ
ネルＣＨＯでの読出し時にはアドレス制御保持メモリＨ
ＭのアドレスＯの内容（予じめプログラムによつて書込
まれている）「ｎ＋１」をアドレスとしてループ構成用
メモリＤＭの読出し動作を行なう。この動作によつて、
チヤネルＣＨＯの前のチヤネルＣＨｎ＋１でループ伝送
制御装置ＬＰＣからループ構成メモリＤＭに書込まれて
いた制御情報αｎ＋１が、チヤネルＣＨＯに接続した端
末装置ＴＯに読出さねる。次にチヤネルＣＨｌでは、端
末装置Ｔ１を接続し、前記チヤネルＣＨｌに対応するル
ープ構成メモリＤＭのアドレス１には端末装置Ｔ１の制
御情報α１が書込まね、保持メモリＨＭのアドレス１の
内容０に従つて端末装置Ｔ。is periodically written to the address O of the loop configuration memory DM corresponding to the time division channel CHO, and is written to the address control holding memory H when reading in the same time division channel CHO.
The read operation of the loop configuration memory DM is performed using the contents of address O of M (previously written by a program) "n+1" as an address. With this action,
The control information αn+1 written from the loop transmission control device LPC to the loop configuration memory DM in the channel CHn+1 before the channel CHO cannot be read out to the terminal device TO connected to the channel CHO. Next, in the channel CHl, the terminal device T1 is connected, and the control information α1 of the terminal device T1 is not written to the address 1 of the loop configuration memory DM corresponding to the channel CHl, and the content of the address 1 of the holding memory HM is set to 0. Therefore, the terminal device T.
の情報［有］が端末装置Ｔ，に送出される。この様に順
次、制御情報αｉが次位の端末装置Ｔｌ＋１に送出され
、当該端末装置Ｔｌ＋１内の伝送制御装置により折返す
。The information [existence] is sent to the terminal device T,. In this way, the control information αi is sequentially sent to the next terminal device Tl+1, and is returned by the transmission control device in the terminal device Tl+1.
そして、最終の端末装置Ｔｎの制御情報αｎは、チヤネ
ルＣＨｎ＋１に接続した伝送制御装置ＬＰＣに受信さね
ることになり、ループ状ネツトワークが構成される。ま
た、前述の端末装置Ｔｉ＋１内の伝送制御装置により折
返された制御情報は次の周期の同一チヤネルＣＨｌ＋１
でアドレスｉ＋１に書込まれ、次の周期で次位の端末装
置Ｔｉ＋２を接続するチヤネルＣＨｉ＋２で送出する。Then, the control information αn of the final terminal device Tn is not received by the transmission control device LPC connected to the channel CHn+1, thereby forming a loop network. Further, the control information returned by the transmission control device in the terminal device Ti+1 described above is transmitted to the same channel CH1+1 in the next cycle.
It is written to address i+1 in the next cycle, and is sent out on channel CHi+2 that connects the next terminal device Ti+2.
そして、各端末装置Ｔ内の伝送制御装置は制御情報の折
返しのタイミングを取り、交換機ＥＸ内のループ伝送制
御装置ＬＰＣは制御情報の折返しのタイミングをとり、
かつ必要な情報を中央処理装置ＣＰに転送する。Then, the transmission control device in each terminal device T determines the timing for returning the control information, and the loop transmission control device LPC in the exchange EX determines the timing for returning the control information.
And necessary information is transferred to the central processing unit CP.
これまでの説明では、時分割チヤネルとメモリ素子とを
対応させていたが、メモリ素子を端末装置及び交換機内
のループ伝送制御装置分だけ用意し、端末装置及びルー
プ伝送制御装置とメモリ素子とを対応させて端末装置か
らの交換制御情報に基いて制御することもできる。In the explanation so far, time division channels and memory elements have been made to correspond, but memory elements are prepared for the terminal devices and loop transmission control devices in the exchange, and the terminal devices and loop transmission control devices are connected to the memory devices. Correspondingly, control can also be performed based on exchange control information from the terminal device.
以上説明したように、ループ状ネツトワークを構成する
ために、簡単なメモリ素子及びそれを制御するための僅
かの集積回路を用いるだけでよく、またループ伝送制御
装置ＬＰＣは従米方式ないしは本発明の実施例の端末装
置内の伝送制御装置と同様のものであり、全体のハード
量は従来方式に比べて大幅に減少することができる。As explained above, in order to configure a loop network, it is sufficient to use a simple memory element and a few integrated circuits to control it, and the loop transmission control device LPC can be implemented using the conventional method or the present invention. This is similar to the transmission control device in the terminal device of the embodiment, and the overall amount of hardware can be significantly reduced compared to the conventional system.
さらに、メモリ装置の制御は前記実施例に限らず、任意
の端末装置をループから外したり又は新たな端末装置を
ループに組入わたり、メモリ制御をすることにより、ル
ープ形状を変化させることができるため、端末装置ある
いは伝送路の障害に対する措置が容易になり、メモリ量
に余裕をもたせておけば増設、移設に対する融通性が飛
躍的に増大する。Furthermore, the control of the memory device is not limited to the above embodiments, and the loop shape can be changed by removing any terminal device from the loop, or by incorporating a new terminal device into the loop, and controlling the memory. Therefore, it becomes easy to take measures against failures in terminal devices or transmission paths, and if a sufficient amount of memory is provided, flexibility for expansion and relocation can be dramatically increased.
第１図は従米の情報伝送を説明する方式図、第２図は本
発明の一実施例を説明する方式図、第３図は本発明を実
施する際のメモリ制御の例を説明する図である。
ＴＯ−Ｔｎ・・・・・・端末装置、ＥＸ・・・・・・交
換機、Ｌ１・，Ｌ，ｌ・・・・・・デイジタル回線、Ｄ
／Ｉ・・・・・・ドロツパインサータ回路、ＭＬ・・・
・・・メモリ装置、ＬＰＣ・・・・・・ループ伝送制御
装置、ＮＷ・・・・・・ネツトワーク、ＣＰ・・・・・
・中央処理装置。FIG. 1 is a system diagram for explaining the information transmission according to the method, FIG. 2 is a system diagram for explaining one embodiment of the present invention, and FIG. 3 is a diagram for explaining an example of memory control when implementing the present invention. be. TO-Tn...terminal device, EX...exchange, L1..., L, l...digital line, D
/I...Drop pin inserter circuit, ML...
...Memory device, LPC...Loop transmission control device, NW...Network, CP...
・Central processing unit.
Claims (1)
情報を記憶する記憶装置を有する交換機と、交換制御情
報を送受する伝送制御装置を有する複数端末装置とをデ
ィジタル回線で結び、前記端末装置及び交換機の伝送制
御装置各々の交換制御情報を、前記記憶装置のメモリ素
子に各時分割チヤネルで書込み、当該書込み前の時分割
チャネルで書き込んだ交換制御情報を当該書込みの同一
時分割チャネルで読出して当該時分割チャネルに接続し
ている端末装置又は交換機の伝送制御装置へ送出するこ
とを特徴とする制御情報線のループ構成方式。 ２ 一又は二以上の端末装置をメモリ素子に接続しない
で時分割チャネルより切離すことを特徴とする特許請求
の範囲第１項記載の制御情報線のループ構成方式。[Scope of Claims] 1. An exchange having a transmission control device that transmits and receives exchange control information and a storage device that stores exchange control information, and a plurality of terminal devices that have a transmission control device that transmits and receives exchange control information are connected by a digital line. , the exchange control information of each of the terminal device and the transmission control device of the exchange is written in the memory element of the storage device in each time division channel, and the exchange control information written in the time division channel before the writing is written at the same time of the writing. A control information line loop configuration method characterized in that the information is read out on a divided channel and sent to a transmission control device of a terminal device or exchange connected to the time division channel. 2. A control information line loop configuration method according to claim 1, characterized in that one or more terminal devices are separated from the time division channel without being connected to the memory element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55098715A JPS5925541B2 (en) | 1980-07-21 | 1980-07-21 | Control information line loop configuration method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55098715A JPS5925541B2 (en) | 1980-07-21 | 1980-07-21 | Control information line loop configuration method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5724146A JPS5724146A (en) | 1982-02-08 |
| JPS5925541B2 true JPS5925541B2 (en) | 1984-06-19 |
Family
ID=14227209
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55098715A Expired JPS5925541B2 (en) | 1980-07-21 | 1980-07-21 | Control information line loop configuration method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5925541B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61135340U (en) * | 1985-02-14 | 1986-08-23 |
-
1980
- 1980-07-21 JP JP55098715A patent/JPS5925541B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61135340U (en) * | 1985-02-14 | 1986-08-23 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5724146A (en) | 1982-02-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4893310A (en) | Digital key telephone system | |
| US3963870A (en) | Time-division multiplex switching system | |
| US4377859A (en) | Time slot interchanger and control processor apparatus for use in a telephone switching network | |
| US5208803A (en) | Circuit for testing digital lines | |
| JPH0311159B2 (en) | ||
| JPS58501799A (en) | telephone exchange control equipment | |
| JPS61502092A (en) | packet switching circuit switching integrated switch | |
| US4688208A (en) | Time division exchange for carrying out a loop-back test | |
| JPH05252314A (en) | Telephone service integration device, communication adapter, and combination device of data processing system | |
| US4873682A (en) | Digital key telephone system | |
| CA1311286C (en) | Digital key telephone system | |
| US4959830A (en) | Method and apparatus for through-connecting a wideband connection in a digital time switch | |
| SU858582A3 (en) | Method and device for discrete signal transmission | |
| JP2889027B2 (en) | Time division switch and connection module constituting such switch | |
| JPS5925541B2 (en) | Control information line loop configuration method | |
| US3859465A (en) | Data transmission system with multiple access for the connected users | |
| US4261052A (en) | Integrated switching and transmission network | |
| JPS61164361A (en) | Continuity test system | |
| JP3416195B2 (en) | PB signal transmission method of private digital electronic exchange | |
| JP3586520B2 (en) | Digital message relay system | |
| JPS5823990B2 (en) | Conference call method | |
| JP2630117B2 (en) | ISDN interface circuit | |
| WO1994028664A1 (en) | Telecommunications system interfacing device and method | |
| JP2654025B2 (en) | Digital key telephone equipment | |
| JP2654026B2 (en) | Digital key telephone equipment |