JPS5925375B2 - position detection device - Google Patents

position detection device

Info

Publication number
JPS5925375B2
JPS5925375B2 JP54155402A JP15540279A JPS5925375B2 JP S5925375 B2 JPS5925375 B2 JP S5925375B2 JP 54155402 A JP54155402 A JP 54155402A JP 15540279 A JP15540279 A JP 15540279A JP S5925375 B2 JPS5925375 B2 JP S5925375B2
Authority
JP
Japan
Prior art keywords
pixels
bonding pad
image
level
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54155402A
Other languages
Japanese (ja)
Other versions
JPS5678135A (en
Inventor
芳昭 有村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP54155402A priority Critical patent/JPS5925375B2/en
Publication of JPS5678135A publication Critical patent/JPS5678135A/en
Publication of JPS5925375B2 publication Critical patent/JPS5925375B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01039Yttrium [Y]

Description

【発明の詳細な説明】 本発明は半導体チップ上の微小なボンディングパッドの
位置検出を高精度に行い得る位置検出装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a position detection device that can detect the position of minute bonding pads on a semiconductor chip with high precision.

集積回路技術の発展に伴つて半導体チップ寸法が小さく
なり、同半導体チップに接続されるりード線のボンディ
ング位置を高精度に規定する必要が生じてきz例えば従
来のLSIやMSI等の半導体チップにあつては、ボン
ディング面積に対してボンディングパッド面積を十分広
く設定可能な余裕があつたが、近年開発されている超L
SI等ではボンディング面積とボンディングパッド面積
が略等しく、しかもボンディングパッド位置が近接して
いる。
With the development of integrated circuit technology, the size of semiconductor chips has become smaller, and it has become necessary to specify the bonding positions of lead wires connected to the semiconductor chips with high precision.For example, for semiconductor chips such as conventional LSIs and MSIs, In the past, there was a margin to set the bonding pad area sufficiently wide compared to the bonding area, but
In SI and the like, the bonding area and the bonding pad area are approximately equal, and the bonding pad positions are close to each other.

この為、ボンディングパッドの位置検出精度が非常に重
要となる。この位置検出精度が不十分であると隣接する
ボンディングパッドに亘つてリード線がボンディングさ
れる虞れがあり、半導体チップ回路の短絡による不良品
の生産を招来する。そこで近時、ボンディングパッド像
を撮像検出して、その画素位置からボンディングパッド
位置を検出することが種々研究されているが、信号処理
の為の検出信号の閾値設定、またリード線や傷等の不要
画像信号との識別等の多くの問題があり、実用化に至つ
ていない。本発明は上記事情を考慮してなされたもので
、その目的とするところは、半導体チップ上の微小なボ
ンディングパッドの位置を直接的に且つ高精度に検出す
ることのできる簡易な構成で実用性の高い位置検出装置
を提供することにある。
For this reason, the accuracy of bonding pad position detection is extremely important. If this position detection accuracy is insufficient, there is a risk that the lead wire will be bonded across adjacent bonding pads, leading to the production of defective products due to short circuits in the semiconductor chip circuit. Recently, various studies have been conducted on capturing and detecting bonding pad images and detecting the bonding pad position from the pixel position. There are many problems such as discrimination from unnecessary image signals, and it has not been put into practical use. The present invention has been made in consideration of the above circumstances, and its purpose is to provide a practical and simple configuration that can directly and accurately detect the position of minute bonding pads on a semiconductor chip. The object of the present invention is to provide a position detection device with high performance.

本発明は、例えば半導体チップの光電変換器による像検
出レベルを最適化し、検出像信号から所望パターン情報
以外の信号成分を除去して微小なボンディングパッドの
高精度な位置検出を可能としたものである。
The present invention enables highly accurate position detection of minute bonding pads by optimizing the image detection level by, for example, a photoelectric converter of a semiconductor chip and removing signal components other than desired pattern information from the detected image signal. be.

以下、図面を参照して本発明の一実施例装置につき説明
する。
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

第1図は本装置の概略構成を示す模式図で、図中1は位
置検出に供される位置検出対象物、つまり半導体チツプ
を示している。
FIG. 1 is a schematic diagram showing the general structure of this apparatus, and in the figure, reference numeral 1 indicates a position detection object used for position detection, that is, a semiconductor chip.

この半導体チツプ1に対向して撮像系の光学鏡筒2が設
けられる。この光学鏡筒2は、筒体の側部に設けられた
光源3からの光をハーフミラー2aにて反射し、対物レ
ンズ2bを介して前記半導体チツプ1を照明すると共に
、この半導体チツプ1の光像を前記レンズ2bを介して
撮像装置4の撮像面に結像するものである。この撮像装
置4は、例えば100×100画素の光電変換素子から
なる走査型の固体撮像器(光電変換器)4aを備えたも
のであり、撮像制御装置5の制御を受けて前記半導体チ
ツプ1の像を検出している。この撮像装置4にて検出さ
れ、その走査によつて順次出力される半導体チツプ1の
像信号はA/D変換器6を介して所定の量子化レベルを
個々に量子化され、数ビツトのデイジタルデータとして
示される画素信号として計算機7に入力される。この計
算機7は内部メモリやアキユムレータ等で構成される例
えばマイクロコンピユータ等からなるもので、前記量子
化された画素信号に対して適宜な信号処理を施すと共に
、前記撮像装置4の検出画素に相当したメモリ領域を有
するメモリ8に検出画像信号を順次蓄積(記憶)してい
る。即ち、前記撮像装置4は半導体チツプ1の画像を2
次元配列された100X100の画素信号として検出し
、メモリ8は上記画素信号をその画素位置に対応して記
憶している。また計算機7は上記画素信号のレベルから
後述する検出レベルの平均値を求め、これを前記撮像制
御装置5に帰還している。
Opposed to this semiconductor chip 1 is an optical lens barrel 2 of an imaging system. This optical lens barrel 2 reflects light from a light source 3 provided on the side of the barrel with a half mirror 2a, and illuminates the semiconductor chip 1 through an objective lens 2b. A light image is formed on the imaging surface of the imaging device 4 via the lens 2b. This imaging device 4 is equipped with a scanning type solid-state imaging device (photoelectric converter) 4a consisting of, for example, a 100×100 pixel photoelectric conversion element, and is controlled by an imaging control device 5 to image the semiconductor chip 1. Image is being detected. The image signals of the semiconductor chip 1 detected by the imaging device 4 and sequentially output by scanning are individually quantized to a predetermined quantization level via the A/D converter 6, and converted into digital signals of several bits. It is input to the computer 7 as a pixel signal represented as data. This calculator 7 is composed of, for example, a microcomputer, which is configured with an internal memory, an accumulator, etc., and performs appropriate signal processing on the quantized pixel signals, and also performs appropriate signal processing on the quantized pixel signals, and performs appropriate signal processing on the quantized pixel signals. The detected image signals are sequentially accumulated (stored) in a memory 8 having a memory area. That is, the image pickup device 4 captures two images of the semiconductor chip 1.
The pixel signals are detected as 100×100 pixel signals arranged in a dimensional array, and the memory 8 stores the pixel signals corresponding to the pixel positions. Further, the computer 7 calculates an average value of detection levels, which will be described later, from the levels of the pixel signals, and feeds this back to the imaging control device 5.

撮像制御装置5は帰還情報に基づいて前記撮像装置4に
おける撮像走査速度を制御し、あるいは光源駆動装置9
を付勢して前記光源3の照射強度を可変設定する等して
、撮像信号レベルの最適化を行つている。尚、第1図中
メモリ8内に示されるA−Eは検出パターン像を示して
いる。しかして計算機7では、量子化された画素信号を
1フレーム毎にそのレベルの高いものから順次抽出して
、例えば高レベル画素信号n1個の平均レベルEHと、
低レベル画素信号N2個の平均レベルELとをそれぞれ
算出する。
The imaging control device 5 controls the imaging scanning speed in the imaging device 4 based on the feedback information, or controls the light source driving device 9.
The imaging signal level is optimized by energizing the light source 3 and variably setting the irradiation intensity of the light source 3. Note that A-E shown in the memory 8 in FIG. 1 indicates a detected pattern image. Therefore, the computer 7 sequentially extracts the quantized pixel signals for each frame, starting from the highest level, and obtains, for example, the average level EH of n1 high-level pixel signals.
The average level EL of N2 low-level pixel signals is calculated.

上記平均レベルEHは、画素総数が100×100(=
10000)であることから、例えば最高レベルのもの
から順にn1=64個抽出し、これを平均化処理して求
められる。また低レベル側の平均レベルELは背景レベ
ルとなるもので、例えば最低レベルのものから順にN2
=2048個抽出してこれを平均化処理して求められる
。尚、Nl,n2の数は適宜仕様に応じて定めればよい
ものである。このようにして算出された各平均レベルE
H,eLに基づいて、計算機7は次のようにして閾値S
を求めている。この算出式は実験的に定められたもので
あり、この閾値Sと画素信号レベルとの比較判定によつ
てボンデイングパツドパターン等に相当した画素抽出が
行われる。
The above average level EH has a total number of pixels of 100 x 100 (=
10,000), for example, n1=64 are extracted in order from the highest level and are averaged. In addition, the average level EL on the low level side is the background level, and for example, the average level EL is N2 from the lowest level.
It is obtained by extracting =2048 pieces and averaging them. Note that the numbers Nl and n2 may be determined as appropriate according to the specifications. Each average level E calculated in this way
Based on H and eL, the calculator 7 calculates the threshold value S as follows.
I'm looking for. This calculation formula has been determined experimentally, and by comparing and determining the threshold value S and the pixel signal level, pixels corresponding to a bonding pad pattern or the like are extracted.

つまり、閾値Sに満たないレベルの画素を背景部成分と
して除去し、上記閾値Sを越えるレベルの画素を選択的
に抽出して、検出画像の特徴化が行われる。ところで、
撮像装置4による像信号は半導体チツプ1の表面状態に
よつて変化し、像信号レベルが光電変換素子の能力を越
えて飽和することがある。
That is, pixels with a level below the threshold S are removed as background components, and pixels with a level above the threshold S are selectively extracted to characterize the detected image. by the way,
The image signal from the image pickup device 4 changes depending on the surface condition of the semiconductor chip 1, and the image signal level may exceed the ability of the photoelectric conversion element and become saturated.

また像信号レベルが低く十分なるレベルの信号が得られ
ないことも予想される。例えば第2図aに示すように所
望パターンXのレベルが光電変換素子の飽和レベル近傍
であり、不要パターンYのレベルが或る程度低い場合に
は前記したようにして算出された閾値Sとの比較により
上記各パターンX,Yの弁別を容易に行い得る。しかし
第2図bに示すように所望パターンXのレベルが飽和し
、且つ不要パターンYのレベルが飽和レベル近傍である
と閾値Sに基づくパターンX,Yの弁別が不可能となる
。これ故パターン弁別を良好に行う為には、検出画素信
号の最高レベルが光電検出素子の飽和レベル以下となる
ように検出利得を最適化制御する必要が生じる。そこで
本装置では先に求めた高レベルの画素信号の平均レベル
EHに基づき、光電変換器の飽和レベルEsとの比較に
よつて撮像検出感度の調整を行つている。例えば飽和レ
ベルE8の5〜1001)のレベルをkとしたとき、な
る偏差を求め、この偏差Pが負なるとき検出信号レベル
に余裕があるとして撮像検出感度増大の為の信号を計算
機7より撮像制御装置5に与えている。また上記偏差P
が正なる場合には検出信号レベルが高過ぎ、その殆んど
が飽和していると看做して感度低減の為の信号を計算機
7より撮像制御装置5に与えている。撮像制御装置5は
このような感度制御信号を受けて前記光源駆動装置9の
作動を制御し、同装置9による光源3の1駆動電力を増
減して光源3の照明強度を調整している。これにより、
光源3の照明強度が低減された場合には半導体チツプ1
の像が暗くなつて、その感出感度が抑えられ、また照明
強度が増大された場合には高輝度な半導体チツプ1の像
が得られて検出感度が高く設定される。尚、光源3の照
明強度の調整は、光源3と半導体チツプ1との間の照明
係に設けられたフイルタ(図示せず)の透光率の可変制
御により行つてもよい。また、光源3の照明強度を一定
化しておく場合にあつては、撮像装置4の光電変換器4
aが走査型であることから、撮像制御装置5は前記感度
制御信号に従つて撮像走査速度を可変制御する。
It is also expected that the image signal level will be low and that a signal of sufficient level will not be obtained. For example, as shown in FIG. 2a, if the level of the desired pattern By comparison, the patterns X and Y can be easily distinguished. However, as shown in FIG. 2b, when the level of the desired pattern X is saturated and the level of the unnecessary pattern Y is near the saturation level, it becomes impossible to discriminate between the patterns X and Y based on the threshold value S. Therefore, in order to perform pattern discrimination well, it is necessary to optimize the detection gain so that the highest level of the detection pixel signal is below the saturation level of the photoelectric detection element. Therefore, in this apparatus, the imaging detection sensitivity is adjusted based on the previously determined average level EH of the high-level pixel signal and by comparing it with the saturation level Es of the photoelectric converter. For example, when the level of the saturation level E8 (5 to 1001) is k, calculate the deviation, and when this deviation P is negative, it is assumed that there is a margin in the detection signal level, and a signal for increasing the imaging detection sensitivity is captured by the computer 7. It is given to the control device 5. Also, the above deviation P
If is positive, it is assumed that the detection signal level is too high and most of it is saturated, and a signal for reducing sensitivity is given to the imaging control device 5 from the computer 7. The imaging control device 5 receives such a sensitivity control signal, controls the operation of the light source driving device 9, and adjusts the illumination intensity of the light source 3 by increasing or decreasing the driving power of the light source 3 by the device 9. This results in
When the illumination intensity of the light source 3 is reduced, the semiconductor chip 1
The image becomes dark and its detection sensitivity is suppressed, and when the illumination intensity is increased, a high brightness image of the semiconductor chip 1 is obtained and the detection sensitivity is set high. Incidentally, the illumination intensity of the light source 3 may be adjusted by variable control of the light transmittance of a filter (not shown) provided in the illumination section between the light source 3 and the semiconductor chip 1. In addition, in the case where the illumination intensity of the light source 3 is kept constant, the photoelectric converter 4 of the imaging device 4
Since a is a scanning type, the imaging control device 5 variably controls the imaging scanning speed according to the sensitivity control signal.

即ち、走査型の光電変換素子は、その素子に割り当てら
れた時間に光像強度に相当した電荷を蓄積して出力する
ものであるから、上記走査速度を変えることによつて割
り当て時間を増減し、これにより検出感度の調整を行つ
てもよい。従つて検出感度を低くするには走査速度を速
くし、逆に検出感度を高めるには走査速度を遅くして所
望とする検出感度に調整すればよい。尚、光電変換器の
走査帰線時間を可変して走査速度(撮像電荷の蓄積時間
)の制御を行つてもよく、走査周波数を直接的に可変す
るようにしてもよい。かくしてこのような感度制御によ
り検出像信号のレベルを光電変換素子の飽和レベルEs
以下に抑えることができ、且つそのコントラストも十分
高く設定することができる。
That is, since a scanning photoelectric conversion element accumulates and outputs a charge corresponding to the optical image intensity during the time allotted to the element, the allotted time can be increased or decreased by changing the scanning speed. , whereby the detection sensitivity may be adjusted. Therefore, to lower the detection sensitivity, the scanning speed can be increased, and to increase the detection sensitivity, the scanning speed can be decreased to adjust to the desired detection sensitivity. Note that the scanning speed (imaging charge accumulation time) may be controlled by varying the scanning retrace time of the photoelectric converter, or the scanning frequency may be directly varied. Thus, by controlling the sensitivity, the level of the detected image signal is adjusted to the saturation level Es of the photoelectric conversion element.
It is possible to suppress the contrast to below, and also set the contrast to be sufficiently high.

従つて、以下に説明する位置検出の為の信号処理が非常
に容易となり、不要像信号の除去も簡易となる。また上
記説明では光源3の照明強度の制御と撮像装?4による
走査速度の制御とを各々独立に行つたが、これらは相互
に関連して可変制御してもよいことは勿論のことである
。更には検出感度調整の基準となる高レベル画素信号の
平均レベルEHは、一つの半導体チツプ1毎に求めても
よいものであるが、幾つかの半導体チツプ1における平
均レベルEHを更に平均化して、その平均レベルEHを
基準として検出感度調整を行つても良い。この場合、平
均レベルEHの情報を古い順に捨てて、代りに順次新し
ぃチツプ1の平均レベルEHを採用していくことが好ま
しい。本装置では、このような前処理を施したボンディ
ングパツト像から次のようにしてボンデイングパツトの
位置を検出している。
Therefore, signal processing for position detection, which will be described below, becomes very easy, and unnecessary image signals can also be easily removed. Also, in the above explanation, what is the control of the illumination intensity of the light source 3 and the imaging device? Although the control of the scanning speed according to No. 4 was performed independently, it goes without saying that these may be controlled variably in relation to each other. Furthermore, the average level EH of the high-level pixel signal, which serves as a reference for detection sensitivity adjustment, may be obtained for each semiconductor chip 1, but it is also possible to further average the average level EH of several semiconductor chips 1. , the detection sensitivity may be adjusted based on the average level EH. In this case, it is preferable to discard the information on the average level EH in order of age and instead adopt the average level EH of the new chip 1 one after another. In this apparatus, the position of the bonding pad is detected from the bonding pad image subjected to such pre-processing in the following manner.

上記の如く検出感度調整されて検出された前記半導体チ
ツプ1の像は、各画素毎に計算機7内において前記閾値
Sとのレベル比較によつて弁別され、2値化されてメモ
リ8にその画素位置に対応して改めて記憶される。この
とき、例えば第1図中パターンBに示す不要像は、その
検出レベルが低いことにより除かれる。またパターンB
が上記検出レベル比較により除去されない場合であつて
も、同パターンBが細長形状であり、所望とするボンデ
イングパツド形状と大幅に異なることから、その形状の
特徴比較によつて計算機7により除去される。従つてメ
モリ8には、所望とするパターンの特徴を有した形状の
パターン像A,C,D,Eが記憶されることになる。然
乍ら、同メモリ8に記憶されるパターン像は、一般に所
望とするボンディングパツドの像のみならず、同ボンデ
ィングパツドに連続する電極引出線パターンの像やパツ
ドに生じた針傷等の不要成分を含んでいる。従つて上記
レベル比較により検出されたパターン像の位置をそのま
ま検出することは検出精度的に問題がある。そこで本装
置では、計算機7とメモリ8との間で次のような信号処
理を施すことによりパターン像を修正し、ボンデイング
パツドの正確な位置検出を行うようにしている。
The image of the semiconductor chip 1 detected with the detection sensitivity adjusted as described above is discriminated for each pixel by comparing the level with the threshold S in the computer 7, binarized, and stored in the memory 8. It is stored again in accordance with the position. At this time, for example, the unnecessary image shown in pattern B in FIG. 1 is removed because its detection level is low. Also pattern B
Even if pattern B is not removed by the above detection level comparison, since pattern B has an elongated shape and is significantly different from the desired bonding pad shape, it is removed by the computer 7 by comparing the characteristics of the shape. Ru. Therefore, the memory 8 stores pattern images A, C, D, and E having shapes having the desired pattern characteristics. Of course, the pattern images stored in the memory 8 are generally not only images of the desired bonding pads, but also images of electrode lead line patterns that are continuous with the bonding pads, and images of needle scratches, etc. that occur on the pads. Contains unnecessary ingredients. Therefore, there is a problem in terms of detection accuracy if the position of the pattern image detected by the level comparison is directly detected. Therefore, in this apparatus, the following signal processing is performed between the computer 7 and the memory 8 to correct the pattern image and accurately detect the position of the bonding pad.

第3図は上述した像検出により得られ、メモリ8に記憶
された1つのパターンを示すものであり、四角形状の区
分は各々画素を示している。
FIG. 3 shows one pattern obtained by the above-described image detection and stored in the memory 8, in which each rectangular section represents a pixel.

各画素位置に記憶された画素信号はそれぞれ光像レベル
に対応した量子化レベルを有するものであり、図中斜線
を施したパターン11,12,13は電極引出線等の不
要パターンを示し、また図中14は針傷等による画素欠
落部分を示している。しかしてこのような2次元配列さ
れた画素から構成された検出パターンが示されたとき先
ず計算機7は同検出パターンにおける各行および各列の
画素数をそれぞれ検出する。
The pixel signals stored at each pixel position each have a quantization level corresponding to the optical image level, and hatched patterns 11, 12, and 13 in the figure indicate unnecessary patterns such as electrode lead lines, and In the figure, 14 indicates a pixel missing portion due to a needle wound or the like. However, when a detection pattern composed of such two-dimensionally arranged pixels is presented, the computer 7 first detects the number of pixels in each row and each column in the detection pattern.

そして、上記画素数が予め設定した数より小さいとき、
例えば所望とするボンディングパツドのパターン10×
10画素である場合には、画素数がゞ4″未満である行
あるぃは例に存在する画素成分を不必要な突出しパター
ンと看做してこれを除去する。ここでは右上りの斜線を
付した画素11が各列における画素数チエツクにより除
去され、左上りの斜線を付した画素12が各行における
画素数チエツクにより除去されることになる。また先に
説明したように所望とするパターン形状が10×10画
素と予め判つていることより、前記不要画素11,12
が除去された画素パターンの行方向および列方向の画素
数チエツクが同時に行われる。このチエツクにより行方
向に余分な画素を有した行(列)ラインが検出される。
つまり、上記余分な画素はその行(列)ラインの端部に
おいて不要なものとして検出される。従つてこの場合に
ぱ両端部の列(行)ラインの画素数を相互に比較し、そ
の結果画素数の少ない側の端部の画素13を不要画素と
看做し除去することによつて所望パターンの画素情報の
みを抽出できる。このような周縁部の画素数チエツクに
よつて、所望とするパターン像に混在する電極引出線等
の突出情報を効果的に除去することができる。
Then, when the number of pixels is smaller than the preset number,
For example, a desired bonding pad pattern 10×
In the case of 10 pixels, pixel components existing in rows or rows where the number of pixels is less than 4" are considered unnecessary protruding patterns and are removed. Here, the diagonal line on the upper right is The marked pixel 11 will be removed by checking the number of pixels in each column, and the pixel 12 marked with diagonal lines on the upper left will be removed by checking the number of pixels in each row.Also, as explained earlier, the desired pattern shape Since it is known in advance that is 10×10 pixels, the unnecessary pixels 11 and 12
The number of pixels in the row and column directions of the pixel pattern from which the pixel pattern has been removed is checked at the same time. This check detects row (column) lines having extra pixels in the row direction.
In other words, the extra pixels are detected as unnecessary at the end of the row (column) line. Therefore, in this case, the number of pixels in the columns (rows) at both ends is compared with each other, and the pixel 13 at the end with the smaller number of pixels is regarded as an unnecessary pixel and removed. Only the pixel information of the pattern can be extracted. By checking the number of pixels at the peripheral edge, it is possible to effectively remove protruding information such as electrode lead lines that are mixed in the desired pattern image.

従つて上記突出パターンの情報によつて位置検出精度が
劣化する虞れがなくなる。つまり所望とする本来のパタ
ーン情報のみを検出できるので、そのボンデイングパツ
ド像の中心画素位置、ひいては半導体チツプ上のボンデ
イングパツドの位置を高精度に検出することが可能とな
る。上記ボンデイングパツド像の中心画素位置は、例え
ば上記像を構成する画素の数と、その配列とから、像を
行方向および列方向にそれぞれ2分する位置の画素とし
て求められる。このようにして、ボンディングパツドの
位置を、電極引出線パターン等の影響を受けることなし
に正確に検出できるので、上記ボンデイングパツドに対
して高精度にリード線をボンデイングすることが可能と
なり、従来の問題を招来することがない。これ故、実用
上多大な効果が奏せられる。しかるのち2次元配列構成
の画素化された像パターンの画素数チエツクによつて非
常に簡単に所望とする特徴パターンを有する像パターン
を見い出し、そこに含まれる引出電極線等の不要画素成
分を除去して所望とするボンディングパツド像を抽出し
、このボンデイングパツド像を構成する画素から機械的
にその中心位置を求めるので、その検出位置は画素寸法
に比して非常に精度の高ぃものとなる。
Therefore, there is no possibility that the position detection accuracy will deteriorate due to the information on the protrusion pattern. In other words, since only the desired original pattern information can be detected, it is possible to detect the central pixel position of the bonding pad image and, by extension, the position of the bonding pad on the semiconductor chip with high precision. The center pixel position of the bonding pad image is determined, for example, from the number of pixels constituting the image and their arrangement, as a pixel at a position that divides the image into two in the row direction and column direction, respectively. In this way, the position of the bonding pad can be detected accurately without being affected by the electrode lead wire pattern, etc., so it is possible to bond the lead wire to the bonding pad with high precision. It does not introduce the conventional problems. Therefore, great practical effects can be achieved. Then, by checking the number of pixels of the pixelated image pattern in a two-dimensional array configuration, an image pattern having the desired characteristic pattern is found very easily, and unnecessary pixel components such as extraction electrode lines included therein are removed. The desired bonding pad image is extracted from the bonding pad image, and its center position is mechanically determined from the pixels that make up this bonding pad image, so the detected position is extremely accurate compared to the pixel size. becomes.

しかも像パターンに傷等の画素欠落部分があつても上述
したように像パターンの輪部的特徴に従つてボンディン
グパターン像を捕えるので、針傷等に左右されることの
ない正確な位置検出が可能である。従つて超LSIチツ
プの如き微小面積のボンディングパツドの位置を高精度
に位置検出できるので、ボンデイングパツドに対するワ
イヤボンディング位置を正確に制御でき、ボンデイング
不良による生産歩留りの低下を大幅に低減できる。
Moreover, even if there is a pixel missing part such as a scratch in the image pattern, the bonding pattern image is captured according to the limbal characteristics of the image pattern as described above, so accurate position detection is possible without being affected by needle scratches, etc. It is possible. Therefore, the position of a bonding pad having a small area such as a VLSI chip can be detected with high precision, so that the wire bonding position relative to the bonding pad can be accurately controlled, and a decrease in production yield due to poor bonding can be significantly reduced.

また上述したように比較的簡単な信号処理により位置検
出を行い得るので実用性が非常に高い等、工業的に優れ
た効果を発揮する。尚、本発明は上記実施例にのみ限定
されるものではない。
Furthermore, as described above, position detection can be performed by relatively simple signal processing, so it is very practical and exhibits excellent industrial effects. Note that the present invention is not limited only to the above embodiments.

例えば信号処理形態はソフトウエア的に行つてもよく、
また専用回路によるノ′−トウエア的に向つてもよい。
またパターン弁別の為の数値データは所望とする位置検
出パターンの仕様に応じて定めればよい。また量子化精
度等も適宜定めればよいものである。更には複数個のパ
ツド像に対して同様な位置検出を行い、これらを総合し
て位置検出ゼータとしてもよい。要するに本発明はその
要旨を逸脱しない範囲で種々変形して実施することがで
きる。
For example, the signal processing form may be performed by software,
Alternatively, it may be implemented as a notebook using a dedicated circuit.
Further, the numerical data for pattern discrimination may be determined according to the specifications of the desired position detection pattern. Further, the quantization precision and the like may be determined as appropriate. Furthermore, similar position detection may be performed on a plurality of pad images, and these may be combined to form the position detection zeta. In short, the present invention can be implemented with various modifications without departing from the gist thereof.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例を説明する為のもので、第1図は
装置構成の概略図、第2図A,bは画素信号レベルの最
適化を示す図、第3図は2次元配列された画素で示され
るパターン像を示す模式図である。 1・・・・・・半導体チツプ、3・・・・・・光源、4
・・・・・・撮像装置(光電変換器)、5・・・・・・
撮像制御装置、6・・・・・・A/D変換器、7・・・
・・・計算機、8・・・・・・メモリ。
The figures are for explaining one embodiment of the present invention. Figure 1 is a schematic diagram of the device configuration, Figure 2 A and b are diagrams showing optimization of pixel signal level, and Figure 3 is a two-dimensional array. FIG. 3 is a schematic diagram showing a pattern image shown by pixels. 1...Semiconductor chip, 3...Light source, 4
...... Imaging device (photoelectric converter), 5...
Imaging control device, 6...A/D converter, 7...
...Calculator, 8...Memory.

Claims (1)

【特許請求の範囲】 1 半導体チップを撮像して上記半導体チップ上のボン
ディングパッドの2次元配列された画素からなるボンデ
ィングパッド像を得る手段と、このボンディングパッド
像を形成する画素の各行および各列の画素数をそれぞれ
求める手段と、上記ボンディングパッドの予め知られた
形状とその大きさの情報と上記各行および各列の画素数
とを比較して前記ボンディングパッド像中の予め知られ
た形状とその大きさ以外の画素を不要画素として除去す
る手段と、この不要画素が除去された修正ボンディング
パッド像から前記ボンディングパッドの中心位置を求め
る手段とを具備したことを特徴とする位置検出装置。 2 ボンディングパッド像中から除去される不要画素は
、ボンディングパッドに繋がる電極引出線パターンを形
成する画素からなる特許請求の範囲第1項記載の位置検
出装置。 3 ボンディングパッド像を形成する画素は、2値化処
理された画素データとして表現されるものである特許請
求の範囲第1項記載の位置検出装置。
[Scope of Claims] 1. Means for imaging a semiconductor chip to obtain a bonding pad image consisting of two-dimensionally arranged pixels of bonding pads on the semiconductor chip, and each row and each column of pixels forming this bonding pad image. and means for determining the number of pixels in the bonding pad image by comparing the information on the previously known shape and size of the bonding pad with the number of pixels in each row and each column. A position detection device comprising: means for removing pixels having a size other than that size as unnecessary pixels; and means for determining the center position of the bonding pad from a modified bonding pad image from which the unnecessary pixels have been removed. 2. The position detection device according to claim 1, wherein the unnecessary pixels removed from the bonding pad image are pixels forming an electrode lead line pattern connected to the bonding pad. 3. The position detection device according to claim 1, wherein the pixels forming the bonding pad image are expressed as pixel data that has been subjected to binarization processing.
JP54155402A 1979-11-30 1979-11-30 position detection device Expired JPS5925375B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54155402A JPS5925375B2 (en) 1979-11-30 1979-11-30 position detection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54155402A JPS5925375B2 (en) 1979-11-30 1979-11-30 position detection device

Publications (2)

Publication Number Publication Date
JPS5678135A JPS5678135A (en) 1981-06-26
JPS5925375B2 true JPS5925375B2 (en) 1984-06-16

Family

ID=15605178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54155402A Expired JPS5925375B2 (en) 1979-11-30 1979-11-30 position detection device

Country Status (1)

Country Link
JP (1) JPS5925375B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59144918A (en) * 1982-12-08 1984-08-20 テキサス・インスツルメンツ・インコ−ポレイテツド Method and apparatus for positioning specified pattern

Also Published As

Publication number Publication date
JPS5678135A (en) 1981-06-26

Similar Documents

Publication Publication Date Title
US11399126B2 (en) Imaging apparatus and monitoring system for performing a focus control and an angle control
KR20190089952A (en) A dual-core focusing image sensor, a focusing control method thereof, and an electronic device (DUAL-CORE FOCUSING IMAGE SENSOR, FOCUSING CONTROL METHOD FOR THE SAME, AND ELECTRONIC DEVICE)
US20020025164A1 (en) Solid-state imaging device and electronic camera and shading compensation method
JP4798400B2 (en) Method and apparatus for setting black level of imaging device using optical black pixel and voltage fixed pixel
US7965327B2 (en) Method and apparatus for detecting camera sensor intensity saturation
US20090161964A1 (en) Detecting Objects In An Image Being Acquired By A Digital Camera Or Other Electronic Image Acquisition Device
US6470148B2 (en) Distance measuring device
US20030147550A1 (en) Image input apparatus, subject identification system, subject verification system and image input method
US20050105785A1 (en) Image pick-up apparatus, fingerprint certification apparatus and image pick-up method
CN104427251B (en) Focus detection, its control method and picture pick-up device
TW201937917A (en) Detection device and sensor
US20060125945A1 (en) Solid-state imaging device and electronic camera and shading compensaton method
JP2020187409A (en) Image recognition device, solid-state imaging device, and image recognition method
CN104519271A (en) Image processing apparatus and method, and program
JP2016197663A (en) Imaging device and imaging apparatus
CN103460687A (en) Solid-state image pickup device and image pickup apparatus
US7400355B2 (en) Image pickup apparatus and photometer
JP4226895B2 (en) Optical information reader
JP4443112B2 (en) Image sensor
JPS5925375B2 (en) position detection device
US10477098B2 (en) Control apparatus which sets defocus amount used for focusing, image capturing apparatus, control method, and storage medium
US20210271915A1 (en) Image sensor and control method thereof, and image capturing apparatus and control method thereof
US20060256227A1 (en) Digital camera device and method for producing the same
CN110611773B (en) Image sensor and method of operating the same
JP2018056944A (en) Imaging device and imaging element