JPS592413A - Mutual conductance control circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a mutual contactance control circuit.

In order to overcome the problem of pulse attenuation that occurs within the optical power source, the optical power source pulse transmission system uses a broadband repeater for No. 4 reproduction. It is effective to use automatic gain control 11) in the repeater. Since the bandwidth of the light guide system is very large, there are many problems in the role of linear amplifier with automatic gain control.

One problem is designing control circuits that operate over a very wide frequency band with flat control characteristics.

first and second internally coupled transistors having conduction types, that is, a first transistor of type 1 conduction type with a collector grounded type and a second type transistor of type 2 conduction type with an emitter grounded type; Miyami Kanakura, 96, also describes a method for keeping the forward voltage across them the same at a low input compensation potential by coupling the base-emitter junctions of the first and second transistors. The emitter circuit includes means for supplying a bias current to the emitter-collector path of the first transistor to determine the transconductance of the second transistor.

In another aspect of the invention, the circuit includes an input transistor of first class conductivity type arranged to operate in a grounded collector manner, and a step coupled to the base of the input transistor for receiving all input signals. , an output transistor of the second type conduction type arranged to operate in a grounded emitter type, a means for transmitting an output signal current coupled to the collector of the output transistor, and a human-powered transistor. means for maintaining substantially the same voltage across the base-emitter junction of the output transistor;
The emitter of the input transistor is connected to the base of the output transistor and is combined with means for coupling the signal from the input transistor to the output transistor and determining the transconductance of the output transistor.

Regarding yet another aspect of the invention, the circuit includes:
The first and second human power units are of type 1 and type 2 conduction type, respectively, and both are arranged to operate with the collector grounded.
The transistors are connected to the bases of the first and second transistors to receive the input signal current, and each of them is of the second type and the first type conduction type, and both operate in an emitter grounded type. first and second output transistors arranged, and means connected to the collectors of the first and second output transistors for transmitting an output signal current;
means for connecting the emitters of the first and second output transistors together, the emitter of the first input transistor xhE-connected to the base of the output transistor, and the emitter of the second output transistor connected to the base of the second output transistor;
1'8 currents from the first and second human-powered transistors are coupled to the first and second output transistors, respectively, and in response to the bias currents of the first and second human-powered transistors, the first and second output transistors are connected to the first and second output transistors. and means for determining the transconductance of. Embodiments of a circuit according to the present invention will now be described with reference to the accompanying drawings.

First, with reference to FIG. 1, the circuit 10 can be advantageously made as a monolithic integrated circuit and includes two bipolar transistors 1 with opposite conduction characteristics.
Contains 1 and 12. Devices 11 and 12 can have broadband operating characteristics. They can also operate in the microwave frequency range and thus be very fast devices, for example when used in circuits included in light-guided pulse delivery systems. For other applications operating in the lower frequency range, these devices can be very fast or very slow, as mentioned above.

By using very high speed devices, circuit 10i can be used as an amplifier with fixed or variable transconductance in high capacity transmission systems, such as the optical power pulse transmission system described above. This system can be either a short-range or a long-range system.

The PNP input transistor 11 is arranged in a collector-grounded type, and a bias voltage is applied to it so that it operates in a normal forward bias operating region. A bias power supply 13 with negative polarity is directly connected to the collector electrode of the input transistor 11. The bias power supply 14 having a positive polarity is connected to the output limiter I region pole of the transistor 11 through the entire bias current source 18. Power supply 1
8 is a fixed or variable current source. This current power supply 1
8 is inserted into the emitter circuit of the human-powered transistor 11 and serves to supply a bias current Ib in the emitter-collector path of the transistor. The load directly connected to the emitter electrode of the input transistor is the base-emitter input circuit of transistor 12.

The bias current for the PNP transistor 11 flows from the positive power supply 14 through the bias power supply 18 and the emitter-collector path of the transistor 11 to the negative power supply 13. Since the load is the base-emitter circuit of transistor 12, the bias current supplied to this load is small and can be ignored for purposes of this description.

Input transistor 11 is a voltage follower or a gain of 1
operates as a voltage buffer in which the input signal source 20 is coupled to the input base electrode and provides a voltage to the base electrode. The base of transistor 11 then receives the human input signal applied to circuit 10. The signal source 20 has an input signal current source 21, which is arranged in parallel with a branch resistor 22, and connected to the ground potential 23 and the transistor 11.
is connected between the base electrode and the base electrode. The human power compensation potential is caused by the current flowing from the base of transistor 110 through resistor 22 and is small in value and can be ignored for purposes of this description.

In operation, the voltage follower arrangement of transistor 11 is (r
No. 3 source 20 and applied to the base electrode of transistor 11. Because of the voltage follower arrangement, the output limiter electrode of the transistor 11 also has the same signal potential. The emitter signal current flows through the emitter-collector path. This current becomes the signal base current of the transistor 12 and is therefore small. Since the transistor 11 is a collector-grounded transistor, its input impedance is high, which is approximately equal to the product of β of the transistor 11 and the loaded human impedance of the emitter-grounded I transistor 12.

The parasitic collector coupling capacitance present between the base and collector electrodes of transistor 11 has a very small effect on the broadband linearity of circuit 10. Such parasitic capacitance is connected to the human power node at the base of the transistor 11,
It appears between the common node at the reference potential of the power supply 13. Load impedance k jt! Since the current flowing in i L changes, there is no substantial increase in capacitance.

The NPN output transistor 12 is arranged in a grounded emitter type, and a bias potential is applied so that it operates in a normal forward bias operating region. Output transistor 1
The emitter electrode 2 is directly connected to the ground potential 23. A positive polarity bias power supply 14 is connected to the output collector electrode of the transistor 12 through a bias current source 25. Load 28 is connected between the collector electrode of transistor 12 and ground potential 230 -C.

Bias current n I for NPN transistor 12
b flows from the positive power supply 14 through the bias current source 25 and the collector-emitter path of the transistor 12 to ground potential 23.

Since the human power transistor 11 acts as a voltage follower, the human power signal voltage V applied by the signal source 20,
appears at the emitter of transistor n11 and is then applied between the base-emitter junction of output transistor 120. For both bias and signal, the voltage applied to the base-emitter junctions of transistors 11 and 12 is essentially
It will be the same. This is because the emitter of the transistor 11 and the base of the transistor 12 are connected, and also because both the base of the transistor 11 and the emitter of the transistor 12 are at the reference ground potential. The voltages differ by the voltage applied to the resistor 22 of the power supply, which was previously described as being small.

During operation, the output signal current from transistor 12 ■. The amplitude of is determined by the bias current Ib of transistor 11 for the following reason. That is, the current I. is the input signal voltage vin applied to transistor 12 and =
It is equal to the product of its mutual collector m KT tance g defined by qi. In this equation, q is the electron charge, K is Boltzmann's constant, and T is the absolute temperature. nI
A current I equal to bIn is the total emitter k i5:i of transistor 12, and the base-emitter voltage vbe□2 of transistor 12 is
can be related to.

Here, ■8□2 is the saturation current of the transistor 12. From this expression, the total emitter current can be expressed as:

According to the same equation, voltage V 1 is determined by the current flowing through transistor 11, supplied by power supply e12 18. Thus, the base-emitter voltage can be expressed as:

Equation (3) is represented by an expression for all emitter currents. As a result, the output signal current is as follows.

Here, ■812 and ■8□1 are the saturation currents of transistors 12 and 11, respectively.

The areas of the emitters of the transistors may be the same or different. If the area of the emitter of transistor 12 is n times the area of the emitter of transistor 11, then the size of the saturation current I is n times the size of the saturation current I as long as other factors remain the same. It will be doubled. Therefore, the output signal current is expressed as. Therefore, the mutual conductance of transistor 12 is determined by the ratio of the bias current and the area of the emitter.
You can decide. In actual manufacturing, it is desirable that the emitter area ratio deviation be larger than 1.

As shown in FIG. 4, the phase of transistor 12! The relationship between l, contactance control candy j characteristic g and ■5 becomes linear in the region where the logarithmically expressed VI relational expression holds true. This linear region contains a bias current with a width of several orders of magnitude. Outside this region, the control characteristics are flat but not linear. ``The characteristics shown in Figure 4 are for the same circuit as in Figure 1, where the emitter area ratio n = 3. A more advanced understanding of the mutual contactance control characteristics, including the frequency response characteristics, - Reference may be made to U.S. Pat.

The mutual conductance is the circumscribed gain of transistor 12! +1' frequency fT and is almost independent of frequency. For silicon bipolar transistors, fT may be several gigahertz. In the range of dimensions where only the transconductance controls the frequency response of the amplifier,
The amplifier will be made with a bandwidth approaching the frequency fT. Other limitations that limit the frequency response of the amplifier include
The signal current is unstable due to the parasitic capacitance.

The problem of a sudden decrease in β at high frequencies is handled in the current circuit by coupling transistor 11 as a voltage follower.

The human power impedance of the transistor 11 is approximately given by the product of β and the human power impedance of the transistor 12 whose emitter is grounded. Therefore, the human power impedance of the transistor 11 may be made thicker than the signal power supply resistor 22 in a wider frequency range than the human power impedance possible with only a common emitter transistor.

The effect of capacitive loading, the Miller effect increase in collector-base capacitance on the row, is minimal in this circuit. The Miller effect is caused by, and is proportional to, the signal potential difference between the base and collector of the transistor. This potential difference causes a proportionately undesirable current, which flows through the parasitic capacitance created between the base and collector electrodes. The undesirable current 6ij H- flowing through this parasitic capacitance becomes relatively large. Furthermore, this undesirable current can be reduced by minimizing the signal potential difference between the base and collector of the transistor. can.

In broadband applications, minimizing the base-collector signal potential difference is accomplished in circuit 10 by keeping the total source and transistor 12 load impedances to very small values.

, the emitter follower layer of transistor 11 provides a low power supply impedance. These low impedances keep the voltage amplitudes at both the base input and collector output of transistor 12 low.

Since the signal voltages at both the base and the collector are low, there are only a few potential points between the base and the collector, and therefore only a small current flows across the parasitic capacitance.

Other than the aforementioned differences in device size and their conductivity types, transistors 11 and 12 have similar operating characteristics. We know how to facilitate the fabrication of transistors of opposite conductivity type with similar operating characteristics over a wide frequency and temperature range. These methods are described in co-pending US patent application Ser. No. 337.707.

Turning now to FIG. 2, an amplifier circuit 30 is shown, which is similar to the circuit shown in FIG. Similar to this, the neutral current flows from the positive polarity power supply 33 through the collector-emitter grounding and the bias current power supply 38 to the negative potential power supply 34.The output transistor is arranged in the emitter grounding manner. 32 is a PNP transistor.Bias current nI5 for the output transistor 32 is at ground potential 2
3 through the emitter-collector path of transistor 32 and current source 45 to power supply 34 with negative polarity.

Load 48 is wired between the collector of output transistor 32 and ground potential 230 .

As indicated by the symbol in FIG. 2, the area of the emitter cross section of the output transistor 32 is '' times the area A of the emitter cross section of the input transistor 31. Transistors 31 and 32, apart from differences in their size and conductivity type, have similar parameters and operating characteristics.

In operation, the circuit of FIG. 2 works similarly to the circuit of FIG. 1, except for the change in polarity. Mutual conductance g of transistor 32
m is the bias current flowing through the current source 38 ■5
determined by A flat mutual contactance characteristic is created for transistor 32. Amplifiers have a very wide frequency range.

Next, FIG. 3 shows an amplifier circuit 50, which is an arrangement in which the circuits shown in FIGS. 1 and 2 are internally combined.

In Figure 3, Kadran sisters 1 and 31 are respectively PN
It has P and NPN conductive properties. These base input electrodes are both connected to the power source 20 for human input signals by leads #A51. Dekadran Sisters 2 and 31
1 have NPN and PNP conduction types, respectively. These emitter electrodes are both connected to ground potential 23 by lead wires 52.

The combined arrangement of FIG. 3 includes the circuit of FIG. 1 in the upper half and the circuit of FIG. 2 in the lower half.

The presence of a common human lead connection 51 between the bases of the input quadratic sisters 1 and 31 of opposite conductivity types advantageously reduces the bias current to the respective base electrodes.
will compensate each other. Since the input node 55 at the base electrode is substantially at ground reference potential, there is little or no input compensation potential. If a compensation potential occurs, it is due to the difference in the characteristics of the transistors 11 and 31.

′-! , and output transistors 12 and 32 of opposite conduction type.
Advantageously, there is a common output lead connection 52 between the emitter electrodes of the transistors, so that their collector-emitter bias currents nIb largely compensate for each other. Node 54 at the emitter junction is substantially at ground potential. If load 40 were disconnected at node 54, there would be no quiescent voltage across the load. In this manner, the circuit of FIG. 3 would be used as a unity gain voltage buffer between the power supply 20 and the load 40''. In such a buffer arrangement, the capacitive or No separate inductive components are required. A unity gain response is obtained from 0 hertz down to several hundred megahertz.

As shown in Figure 3, the circuit that internally combines Figures 1 and 2 is an amplifier with a mutual inductance control circuit that has flat control characteristics and responds in a wide frequency range from almost 0 to several hundred mechhertz. ke form.

The input port of the node 55 and the output ports 57 and 58 of the collector part of the transistors 12 and 32 are connected to the power supply 13, 14.3.
3 and 34 and the bias port of the ground reference point 23. Accordingly, a signal power source or network can be connected at nodes 54 and 55 without the need for any separate inductance or capacitance, without all circuit quiescent requirements. By selecting an appropriate value of impedance for power supply 20 and an appropriate value of load impedance for loads 28 and 48, as commonly used in broadband transmission systems, Proposition 1 can reduce the overall It can be ensured that the circuit operates linearly over a wide frequency range. Also, over that region, the transconductance of transistors 12 and 32 is reduced by the bias current I5 supplied by power supplies 18 and 38.
changes smoothly according to changes in.

[Brief explanation of the drawing]

FIG. 1 is a system diagram of one circuit embodying the present invention, FIG. 2 is a system diagram of another circuit embodying the present invention, and FIG. 3 is a system diagram of another circuit embodying the present invention. 4 is a system diagram of yet another circuit embodying the above, and FIG. 4 is a control characteristic diagram of mutual conductance. [Explanation of the symbols of the main part] 10.30.50... Amplifier circuit 11.32... PNPNP type 4 transistor 12.31
...NPN conduction type transistor 13.34...Negative bias power supply 14.33...Positive bias power supply 20...Signal source 23...Earth reference point 2B, 40.48...Load, 54.55... Node F
IG, / 1″′23 FIG, 2 FIG, j

Claims (1)

[Claims] ■. Having two opposite conduction characteristics: a first transistor of type 1 conduction type arranged in a collector-grounded manner and a second transistor of type 2 conduction type arranged in emitter-grounded type. a transistor having first and second internally coupled; and means for internally coupling base-emitter junctions of the first and second transistors to maintain substantially the same forward voltage thereon at a low input compensation potential; , in the emitter circuit of the first transistor, means for supplying a bias current to the emitter-collector path of the first transistor to determine the mutual conductance of the second transistor. 2. In the circuit described in claim 1,
A circuit characterized in that the first transistor has an emitter cross section area Ai, the second transistor has an emitter cross section area nAf, and ■ is larger than 1. 3. The circuit according to claim 1 or 2, wherein the first transistor is an NPN conduction type transistor and the second transistor is a PNP conduction type transistor. 4. The circuit according to claim 1 or 2, wherein the first transistor is a PNP conduction type transistor, and the second transistor is an NPN conduction type transistor. 5. In the circuit described in claim 1,
A transistor which internally couples two transistors with opposite conduction characteristics: a third transistor of the second conduction type arranged in a collector-grounded manner and a fourth transistor of the first kind conduction type arranged in the emitter-grounded manner. The third and fourth transistors and the base-emitter junctions of the third and fourth transistors are internally coupled so that the forward pressure applied thereto at a low human power compensation potential is maintained to be substantially Jl r (J). and the means of
The emitter circuit of the third transistor includes means for supplying a bias current to the emitter-collector path of the third transistor to determine the mutual contactance of the fourth transistor, k4'=7. 6. 4'F"F'"l In the circuit set forth in claim 5, the base circuit of the first transistor;
j is commonly applied to them, and the emitter circuit of the second transistor and the emitter circuit of the fourth transistor are internally 1'y, :I! and common group “f”:
A circuit characterized in that it includes means for maintaining the voltage at about 'lfV. 7't'r ri'l In the circuit as set forth in claim 5 or 6, each /z of the second and 81 transistors has an emitter cross-sectional area A; Each of the fourth transistors has an emitter cross-sectional area of nA, and its size is larger than 1, which is about 100 cm! 'i! 1. A circuit characterized in that the first and third transistors and the second and fourth transistors have similar operating characteristics, except for their characteristics. 8. Collector contact JI! an input transistor of fc m M conduction type arranged to operate in two modes; means for receiving a human input signal connected to the base of said input transistor; and a second kind conduction type arranged to operate in emitter grounded mode; an output transistor, a means for transmitting an output signal current connected to the collector of the output transistor, and a base of the input transistor coupled to the emitter of the output transistor; means for keeping the voltage across the emitter junction substantially the same, and further the emitter of said input transistor? The signal from the forward-flexing human power transistor connected to the base of the output transistor J'lJ is coupled to the output transistor MfJ51.
and means for determining the transconductance of the two-output transistor. l'f's iliα section 8th section 8th section A circuit in which the output transistor has an area Af, and the cross-sectional area n8'(il, - has a...) is larger than 1. A first and second human-powered transistor arranged in a collector-grounded manner,
Connect to the base of the first and second Katransistor,
means for transmitting the input signal 6ii: '; means for transmitting an output signal current connected to the collectors of the first and second output transistors; means for connecting the emitters of the first and second output transistors together; The emitter of the transistor is connected to the base of the second output transistor, and the emitter of the second output transistor fr: MiJ
Following the bases of the two output transistors, the signals from the ε1)-1 second power transistors are coupled to the first and second output transistors, respectively, of the first and second power transistors. and means for determining mutual conductance of the first and second output transistors in response to a bias current. 1. The circuit according to claim 10, wherein the first and second human-powered transistors have an emitter cross-sectional area A, and the first and second output transistors have an emitter cross-sectional area nA f; In the circuit described in Patent No. 12 and Claim 11, in which the unit is characterized by a characteristic that the unit is much stronger than the first, the first and second human-powered transistors have similar operating characteristics except for the conduction characteristics. A circuit, all characterized in that the first and second output transistors have similar operating characteristics except for conduction characteristics.