JPS5923967A - Facsimile reader - Google Patents

Abstract

PURPOSE:To shorten the time required for transmission and reception, by making an arrangement that, when white lines continue for a previously fixed number, a white skip signal is generated and reading out and encoding of data of the white lines are not performed. CONSTITUTION:When a control section 4 outputs a start signal, a driving pulse generating section 6 is started and a scanner stepmotor 5 starts operation, and then, previous read scanning of an original is performed with three lines in one lot and a line signal is inputted into line buffers 8d, 8e, and 8f through a CCD1. When a white line detecting section 10 detects that three continuous lines and white lines and outputs a white line skip signal, a white line skip code generating section 13 outputs a white line skip code which is sent to a circuit through an AND circuit 13, OR circuit 12b and MODEM 15. Thereafter, the original scanning with three lines in one lot is continuously performed, and, when a black detecting section 9 detects data in which white and black are mixed, a black detect signal is outputted and scanning for every line is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a facsimile reading device that reduces transmission and reception time.

Conventional facsimile reading devices, for example, read multiple lines at once using a reading element such as a CCD.
This read signal is stored in a number of line buffers equal to the number of read lines, and the information in the line buffer is stored in the number of line memories and then read out to perform the MH (Modified Huffman, -dimensional band compression) method or MR (modified read, two-dimensional band compression)
There is a system that encodes the signal based on the system, modulates the encoded signal, and sends it to the line.

However, in conventional facsimile reading devices, data written in multiple 2-in memories is sequentially read and encoded, so reading time and encoding time are required for each line. There is a limit to the reduction in transmission and reception time.

The present invention has been made in view of the above, and in order to shorten the transmission and reception time, a white line skip signal is generated when a predetermined number of white lines are consecutive, and data on the white line is read and coded. The present invention provides a facsimile reading device that does not perform digitization.

The facsimile reading device according to the present invention will be explained in detail below.

FIG. 1 shows an embodiment of the present invention, which includes a CCD 1 (not shown) that outputs a line signal based on document scanning, a photoelectric conversion unit consisting of a group of photodiodes, and a storage unit that accumulates photoelectrically converted signal charges. a gate through which a signal charge passes when a transfer clock is input; and a shift register that indicates a storage state based on the signal charge that has passed through the gate and receives the transport clock and outputs its contents; When a start signal is output from the transfer clock generation section 2 that generates the transfer/sphere clock, the l/transport clock generation section 3 that generates the transfer clock, and the control section 4 that controls various operations, the scanner A drive pulse generator 6 that generates a drive pulse to drive the step motor 5, and a motor that delays the operation of the transfer clock generator 2 and transport clock generator 3 by the corresponding time based on the start timing of the scanner step motor 5. A start-up adjustment section 7, an encoding section 8 that compresses a black and white mixed line signal and outputs a black and white encoded signal, and a black detection section 9 that checks whether there is a black signal in the line signal, for example. A white line detection unit 10 that outputs a white line skip signal when there is no black signal in three 2-in consecutively.
and when the white line skip signal is output, the first
a first gate signal generator 11 that generates a gate signal; and a signal selector 12 that blocks passage of a black and white encoded signal when the first gate signal is output and passes a white line skip code to be described later. , a white line skip code generating section 13 that outputs a white line skip code based on a white line skip signal, an AND gate 14 that passes the skip code when the first gate signal is output, and a black and white encoded signal or a white line encoded signal. MOD that modulates the line skip code and sends it to the line
It has an EM 15 and a second gate signal generator 16 that outputs a second gate signal that provides write timing to a line memory, which will be described later.

The l-signal clock generation section 2 includes a third gate signal generation section 2a that generates a third gate signal, a clock pulse generation section 2b that outputs a clock pulse, and a clock pulse generation section 2a that generates a third gate signal. AND 'f! The transport clock generator 3 has an AND circuit 2C that outputs the empty transfer clock, and the transport clock generator 3 includes a fourth gate signal generator 3a that generates the fourth signal H6, a clock/curs, and a clock signal. The transport clock is output from the AND '% gate signal of 4, and the CCD is output via the OR circuit 3@.
The encoder 8 is tick-enabled (CG) by a second or fourth gate signal via an AND circuit s a + 8 b p sc , and the fourth gate signal 2-in buffer 8 d + which inputs the line signal (from CCD 1) by the gate signal and outputs the line signal by the second gate signal.
It is enabled (E) by the second gate signal or the control signal of the control unit 4 via the OR circuit 8g+8h*81, and the contents of the line buffers 3d, 8e, 8f are read by the second gate signal. 11 times,
Line memory 8 whose contents are read out by control signals
J, 81c, 81 and line memory 8j, 8
81, the line memory (il-M I
It has an encoding table 8m for converting into a black and white encoded signal based on the I or MR method, and the signal selection unit 12 converts the black and white encoded signal based on "1" of the inverter 12c when the first gate signal is output. AND circuit 1 for passing the conversion signal
2a, and an OR circuit 12b that passes the white line skip code passed through the AND circuit 14 and the black-and-white encoded signal based on "1" of the inverter 12d when the first gate signal is output, and the motor The start-up adjustment section 7 has a delay circuit 7a and an on-circuit 7b'i.

In the above configuration, the control section 4 outputs a start signal to explain its operation using the time chart shown in FIG. Then +IiK 1tJII
After the scanner step motor 5 is driven by the scanner motor drive signal f from the pulse generating section 6, an operation start signal delayed by a delay time d is sent to the motor start-up adjustment section 7.
is output from. When the operation start signal is output, the speed of the motor 5 is sufficiently increased, and scanning is performed from the step 0 position to the first 3 lines. The transport clock generator 3 generates the fourth gate signal G in response to the operation start signal.
l * Gm l Gm and outputs a transport clock based on No. 212214, and when the scan position reaches step 1, the transfer clock generator 2 outputs a transfer clock, and the transport clock causes the shift register of CCD 1 to be output. The line signal is transferred to line buffer 8, and the line signal of the shift register is transferred to line buffer 8 by transfer lock.
e + 8 input to f. line buffer 8d,
Line signals input to 8e and 8f (WHI, WH2,
The white line signal of WH3) is the second gate signal gl +gg +g3 of the second gate signal generator 16.
The signals are output from line buffers 8d, 8e, and 8f and written to line memories 8j, 8, and 81. on the other hand,
When the white line detection unit 10 detects that three lines are consecutive white lines and outputs a white line skip signal, the white line skip and code generation unit 13 outputs a white line skip code,
Based on the first gate signal of the first gate signal generating section 11, the AtJD circuit 14 outputs the OR circuit 12b and MODE.
It is sent to the line via M15 (after modulation). The white line skip code has a pulse width of, for example, 1.15 m5, and the receiver that receives it demodulates it and prints three consecutive white lines. Thereafter, the three lines t are continuously scanned together, and when the black detection section 9 detects the black and white mixed data D1, it outputs a black detection signal. When the black detection signal is output, the continuous scanning of all three lines is stopped, and the contents of 81 are sequentially read out to the line memories 8j and 8 for each line, and the encoded black and white encoded signal ( DI + Dt, Da, etc.
However, WH7 does not have a black signal) with MODEM 1
5 to the line. The receiver that received this is WH7
, D.I.

Perform a print operation such as D2.

f^j1 Line memory 8J, 8, 81 are printed with recess M, line buffer 78 d * 8 e e 8
It shall be written at a rate equal to the output rate of f. If three lines are processed in 10 m5, the processing time for one line will be 3.33 m5. 17 lines per A4 size
28 bits), then p is the time required to output one bit, which is larger than the RAM write cycle of 450 ns, so it is possible to write to the 2-in memory sufficiently.

As explained above, according to the 7-axis reading device according to the present invention, when a predetermined number of consecutive white lines occur, a white line skip signal is generated to prevent reading and encoding of white line data. Therefore, it is possible to shorten the transmission and reception time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a time chart showing one embodiment of the present invention. Explanation of symbols 1... CCD (reading element), 2... Transfer clock generation section, 3... Transport clock generation section, 4... Control section, 5... Scanner step motor, 6...・Drive pulse generator,
7... Motor startup adjustment section, 8... Encoding section,
9... Black detection section, 10... White line detection section, 11... First gate signal generation section, 12.
...Signal selection section, 13...White line skip code generation section, 15...MODEM, 1
6...Second gate signal generation section.

Claims (1)

[Claims of Claims] In a device that compresses and encodes a line signal output by a reading element and sends out an encoded signal to a line, a white line skip signal is output when a predetermined number of white lines occur consecutively. A 7-axis reading device comprising: means for transmitting a white line skip code, which is an encoded white line skip signal, to a line.