JPS5923648B2 - signal display device - Google Patents

signal display device

Info

Publication number
JPS5923648B2
JPS5923648B2 JP3272079A JP3272079A JPS5923648B2 JP S5923648 B2 JPS5923648 B2 JP S5923648B2 JP 3272079 A JP3272079 A JP 3272079A JP 3272079 A JP3272079 A JP 3272079A JP S5923648 B2 JPS5923648 B2 JP S5923648B2
Authority
JP
Japan
Prior art keywords
frequency
display
reception
circuit
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3272079A
Other languages
Japanese (ja)
Other versions
JPS55124321A (en
Inventor
俊一 根津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3272079A priority Critical patent/JPS5923648B2/en
Publication of JPS55124321A publication Critical patent/JPS55124321A/en
Publication of JPS5923648B2 publication Critical patent/JPS5923648B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J7/00Automatic frequency control; Automatic scanning over a band of frequencies
    • H03J7/18Automatic scanning over a band of frequencies
    • H03J7/32Automatic scanning over a band of frequencies with simultaneous display of received frequencies, e.g. panoramic receivers

Description

【発明の詳細な説明】 本発明は放送帯域内に点在する放送信号の周波数とその
放送信号の信号強度を一目瞭然に把握できる信号表示装
置(以下、電波のパノラミツク表示装置という)に関す
るものであり、その目的とするところは放送信号のパノ
ラミツク表示を簡単にしてかつ高品質に実現できるよう
番こすることにある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal display device (hereinafter referred to as a radio wave panoramic display device) that allows the frequency and signal strength of broadcast signals scattered within a broadcast band to be grasped at a glance. Its purpose is to simplify the panoramic display of broadcast signals with high quality.

一般に電波をパノラミツク表示することはその操作が容
易になり、また中間周波増幅部の帯域幅切換機能を有す
る受信機においてはその切換の判断の参考ともなり、そ
の効果は太きいものがある。
Generally, displaying radio waves in a panoramic manner makes the operation easier, and in a receiver having a function of switching the bandwidth of the intermediate frequency amplification section, it also serves as a reference for making a decision on switching, and the effect is profound.

ただし全放送帯域(国内のFM放送では76〜90M服
、AM放送では531〜1602に服)の表示を実施す
るには表示器の規模が大きくなり過ぎるので、一般的に
は受信点の近傍表示として実用上問題ない。
However, the scale of the display would be too large to display the entire broadcast band (76 to 90M for domestic FM broadcasts, 531 to 1602 for AM broadcasts), so it is generally necessary to display the area near the receiving point. There is no problem in practical use.

従来、このような表示を実現させるには第1図のような
構成が必要であった。
Conventionally, in order to realize such a display, a configuration as shown in FIG. 1 was required.

図中、1は高周波増幅回路、2は局部発振器、3は周波
数混合器、4は中間周波増幅回路、5は検波器、6は検
出用周波数混合器、7は検出用局部発振器、8はノコギ
リ波発生回路、9は検出用中間周波増幅回路、10は信
号レベル検出回路、11は表示器である。
In the figure, 1 is a high frequency amplifier circuit, 2 is a local oscillator, 3 is a frequency mixer, 4 is an intermediate frequency amplifier circuit, 5 is a detector, 6 is a detection frequency mixer, 7 is a detection local oscillator, 8 is a sawtooth A wave generation circuit, 9 a detection intermediate frequency amplification circuit, 10 a signal level detection circuit, and 11 a display.

しかしながら、このような構成では以下のような問題点
のため(こ実用上適当とは言えない。
However, such a configuration is not suitable for practical use due to the following problems.

すなわち、表示のため【こ局部発振器、周波数混合器、
中間周波増幅回路などを別系統に備える必要があり、構
成が複雑となる。
That is, for display [this local oscillator, frequency mixer,
It is necessary to provide an intermediate frequency amplification circuit and the like in a separate system, making the configuration complicated.

また、検出用局部発振器7はノコギリ波発生回路8の出
力信号によって周波数掃引を行なうが、その周波数精度
や直線性が出しに<<、それゆえ表示器11にブラウン
管のような高価なアナログ的表示器を用いて表示精度を
あいまい化しなければならない。
The detection local oscillator 7 performs frequency sweep using the output signal of the sawtooth wave generation circuit 8, but its frequency accuracy and linearity are poor, so the display 11 uses an expensive analog display such as a cathode ray tube. Display accuracy must be obscured by using a device.

ざら番こ、高周波増幅回路1は受信点に同調したままで
あるので、その選択特性のためlこ表示の中心点からは
なれるほど信号強度に誤差を生じ、表示帯域幅が極めて
制限されるなどの問題があった。
Since the high frequency amplifier circuit 1 remains tuned to the receiving point, due to its selection characteristics, the further away from the center point of the display, the more errors occur in the signal strength, and the display bandwidth is extremely limited. There was a problem.

本発明は最近市場に定着化したシンセサイザ方式の電子
受信機を最大限に発揮して質の良いしかも構成の簡単な
信号表示装置を提供するものである。
The present invention provides a signal display device of high quality and simple construction by making full use of synthesizer type electronic receivers that have recently become established in the market.

第2図にその一構成例を示す。11′はデジタル的な固
体表示器(例えば発光ダイオード、液晶。
FIG. 2 shows an example of its configuration. 11' is a digital solid state display (e.g. light emitting diode, liquid crystal).

蛍光表示管などの表示器)、12は周波数シンセサイザ
回路 13は受信周波数制御回路、14は) メモリ回路である。
12 is a frequency synthesizer circuit, 13 is a receiving frequency control circuit, and 14 is a memory circuit.

フェイズロックドループなどを用いた周波数シンセサイ
ザ回路12の動作原理について周知であるために省略す
るが、受信局発数制御回路13から与えられた周波数符
号に応じて局部発振器2の発振周波数と高周波増幅回路
1の同調点を定める役割を持つことは云うまでもない。
Although the operating principle of the frequency synthesizer circuit 12 using a phase-locked loop or the like is well known and is omitted here, the oscillation frequency of the local oscillator 2 and the high-frequency amplifier circuit are determined according to the frequency code given from the receiving station oscillation number control circuit 13. Needless to say, it has the role of determining the tuning point of No. 1.

そして、一般にシンセサイザ方式の受信機の選局では第
3図中のfstep間隔で階段的に掃引を行なう。
Generally, when selecting a channel using a synthesizer type receiver, sweeping is performed stepwise at fstep intervals as shown in FIG.

ここでfstepは具体的には国内のFM受信では10
0KHz、同AM受信では9K)hとなる。
Specifically, fstep is 10 for domestic FM reception.
0KHz, and 9K)h for AM reception.

本例ではfstep間隔の選局ごとlこ第3図に示すよ
うに士Δfの範囲にわたってf′5tep間隔で高速掃
引を実施するよう受信周波数制御回路13より周波数符
号を発生し、この高速掃引中に入力された信号レベルを
検出回路10を介してメモリ回路14に記憶させる。
In this example, the reception frequency control circuit 13 generates a frequency code so as to perform a high-speed sweep at f'5 step intervals over a range of Δf as shown in FIG. The input signal level is stored in the memory circuit 14 via the detection circuit 10.

一般lこfstep(!:fζtepは同じ周波数に設
定されるが、表示時点の周波数間隔の要求によってその
大小関係は任意である。
Generally, fstep (!: fζtep is set to the same frequency, but their magnitude relationship is arbitrary depending on the frequency interval requirements at the time of display.

そして、上記メモリ回路14の出力信号は表示器11′
&こ与えられ、その結果、例えば第4図に示すような表
示を得られる。
The output signal of the memory circuit 14 is transmitted to the display 11'.
As a result, a display as shown in FIG. 4, for example, can be obtained.

このような構成にすることにより前述した従来の方法に
おける問題点を解決することができる。
With such a configuration, the problems in the conventional method described above can be solved.

すなわち、局部発振器2周波数理合器、中間周波増幅回
路の新設は不要である。
That is, there is no need to newly install a local oscillator two-frequency rationalizer or intermediate frequency amplification circuit.

また、周波数掃引にシンセサイザ方式を利用するため周
波数精度が高く、それゆえ比較的安価な固体表示器を用
いて正確な位置に表示できる。
Furthermore, since a synthesizer method is used for frequency sweeping, frequency accuracy is high, and therefore it is possible to display at an accurate position using a relatively inexpensive solid-state display.

さらに、掃引は高周波増幅回路1も連動して同調するの
で、掃引範囲tこ関係なく表示誤差を生じないなどの利
点を有する。
Further, since the sweep is also synchronized with the high frequency amplifier circuit 1, there is an advantage that no display error occurs regardless of the sweep range.

尚、表示はメモリ回路14の出力であって、信号レベル
は実時間表示ではないが、第3図のように受信点を変更
するごとに(プリセット選局時も含む)高速掃引するこ
とにより受信開始直前の信号レベルに書きかわるため実
用的には問題が無い。
Note that the display is the output of the memory circuit 14, and the signal level is not displayed in real time, but as shown in Figure 3, the signal level is detected by high-speed sweeping every time the reception point is changed (including when selecting a preset station). There is no practical problem because the signal level is rewritten to the signal level immediately before the start.

また受信点については常時信号レベルを検出できるので
、第4図の表示器において中央の信号レベルは当然実時
間表示が可能である。
Furthermore, since the signal level at the receiving point can be detected at all times, the signal level at the center of the display shown in FIG. 4 can of course be displayed in real time.

以上のように本発明によれば、デジタル式の受信機の特
徴を生かして放送信号のバノラミツク表示を簡単にかつ
高品質に実現することができるものである。
As described above, according to the present invention, it is possible to easily display a broadcast signal in a high-quality manner by taking advantage of the characteristics of a digital receiver.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の電波のパノラミツク表示装置を実現する
ためのブロック図、第2図は本発明の信号表示装置を実
現するための一構成例を示すブロック図、第3図は同装
置における周波数掃引動作の説明図、第4図は同装置に
使用するマトリクス構成の固体表示器への表示例を示す
図である。 1・・・・・・高周波増幅回路、2・・・・・・局部発
振器、3・・・・・・周波数混合器、4・・・・・・中
間周波増幅回路、10・・・・・・レベル検出器、11
・・・・・・表示器、12・・・・・・周波数シンセサ
イザ回路、14・・・・・・メモリ回路。
Fig. 1 is a block diagram for realizing a conventional radio wave panoramic display device, Fig. 2 is a block diagram showing an example of a configuration for realizing the signal display device of the present invention, and Fig. 3 is a block diagram for realizing the signal display device of the present invention. FIG. 4, which is an explanatory diagram of the sweep operation, is a diagram showing an example of display on a solid-state display of a matrix structure used in the same device. 1...High frequency amplification circuit, 2...Local oscillator, 3...Frequency mixer, 4...Intermediate frequency amplification circuit, 10...・Level detector, 11
... Display device, 12 ... Frequency synthesizer circuit, 14 ... Memory circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 周波数シンセサイザ方式の受信機におい鳳受信周波
数が設定されるごとに、該設定受信周波数を中心に所定
の周波数範囲を所定の周波数間隔で掃引受信せしめるよ
う周波数シンセサイザ回路に周波数符号を与える受信周
波数制御回路と、該掃引受信中の受信信号強度を前記周
波数間隔とすlこ記憶するメモリ回路と、このメモリ回
路の記憶内容を読み出して前記周波数範囲内の所定周波
数間隔ごとに受信信号強度を示す2次元マトリクス表示
器とを備えたことを特徴とする信号表示装置。
1 Reception frequency control that gives a frequency code to the frequency synthesizer circuit so that each time the reception frequency is set in a frequency synthesizer type receiver, a frequency code is given to the frequency synthesizer circuit so that reception is swept over a predetermined frequency range at predetermined frequency intervals around the set reception frequency. a memory circuit for storing the received signal strength during the sweep reception as the frequency interval, and a memory circuit for reading out the stored contents of the memory circuit to indicate the received signal strength at each predetermined frequency interval within the frequency range. A signal display device comprising: a dimensional matrix display device.
JP3272079A 1979-03-20 1979-03-20 signal display device Expired JPS5923648B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3272079A JPS5923648B2 (en) 1979-03-20 1979-03-20 signal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3272079A JPS5923648B2 (en) 1979-03-20 1979-03-20 signal display device

Publications (2)

Publication Number Publication Date
JPS55124321A JPS55124321A (en) 1980-09-25
JPS5923648B2 true JPS5923648B2 (en) 1984-06-04

Family

ID=12366669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3272079A Expired JPS5923648B2 (en) 1979-03-20 1979-03-20 signal display device

Country Status (1)

Country Link
JP (1) JPS5923648B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220214721A1 (en) * 2021-01-06 2022-07-07 Primax Electronics Ltd. Keyboard device

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875331A (en) * 1981-10-29 1983-05-07 Fujitsu Ten Ltd Radio receiver having display function of spectrum analyzer
JPS58135143U (en) * 1982-03-04 1983-09-10 松下電器産業株式会社 synthesizer receiver
JPS5936636U (en) * 1982-08-30 1984-03-07 松下電器産業株式会社 synthesizer receiver
JPS5976152U (en) * 1982-11-15 1984-05-23 松下電器産業株式会社 display device
JPS5976153U (en) * 1982-11-15 1984-05-23 松下電器産業株式会社 display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220214721A1 (en) * 2021-01-06 2022-07-07 Primax Electronics Ltd. Keyboard device

Also Published As

Publication number Publication date
JPS55124321A (en) 1980-09-25

Similar Documents

Publication Publication Date Title
US5023938A (en) Station selecting device in tuner for automatic selection according to input information
US2432196A (en) Timing wave device
US3736510A (en) Frequency and modulation monitor
US4061980A (en) Radio receiver with plural converters and frequency control
JPS5923648B2 (en) signal display device
US4325023A (en) Device for inspecting an individual high frequency signal selected according to frequency from a broad frequency band
US3742353A (en) Frequency measuring apparatus including phase locked loop
CA1041237A (en) Electronic system for automatically tuning to a selected television channel
JPH10173490A (en) Synthesizer receiver
US2658138A (en) Radio receiver
US2433283A (en) Radio position finding
US2433290A (en) Two-way radio communication system
JPS6318194Y2 (en)
JPS6228101Y2 (en)
US2555391A (en) Radio oscillator control
US2496560A (en) Radio spectrum monitoring apparatus
JPS6326020A (en) Receiving equipment having frequency measuring function
JPS5890830A (en) Radio receiver
JP2623949B2 (en) Data demodulator
JPS5944805B2 (en) automatic channel selection device
JPS581854B2 (en) Shingokansokuuchi
JPS62277Y2 (en)
JPS5813638Y2 (en) PLL frequency synthesizer receiver that facilitates shortwave band reception
JPH0445294Y2 (en)
JPH0233404Y2 (en)