JPS592335A - Inspection method for semiconductor substrate having epitaxial layer - Google Patents

Abstract

PURPOSE:To perform the inspection for insulation and high resistance easily and in a short time by a method wherein anodic oxidation treatment is performed onto a semiconductor substrate composed of a semiconductor wafer and an N type epitaxial layer formed thereon, and the current variation thereat is observed. CONSTITUTION:A detection device consists of a quartz vessel 22 filled with electrolyte 21, a constant voltage power source 23, a variable resistor 24 which adjusts initial oxidation current, a cathode electrode 25 of a Pt plate, a resistor 26, and an X-Y recorder 27. Anodic oxidation is performed by dipping the semiconductor substrate 28 into the electrolyte 21, and then the change of oxidation currents is recorded by the X-Y recorder 27. The oxidation current decreases exponentially in the semiconductor substrate A of a semi-insulating GaAs wafer of good insulation, and the oxidation current becomes out of exponential decrease and becomes staggered about 5min after passage in the substrate B of poor insulation.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for testing the insulation and/or resistance of a semiconductor wafer (particularly a semi-insulating compound semiconductor wafer).

(2) Background of the technology For example, GaAm FEAT (field effect transistor) is a semi-insulating or insulating semiconductor substrate with high impurity concentration n.
It is made using a semiconductor wafer on which a type epitaxial layer is formed. In this case, the highly impurity-concentrated n-type epitaxial layer is used as the active layer (active layer), and source, drain, and r-to electrodes are formed on the active layer to form the FIT.
However, if the insulation, that is, the high resistance of the semi-insulating (high-resistance) semiconductor wafer is poor (low), leakage current will occur, and the characteristics of FErl' will deteriorate.

This reduction in the insulation properties and high resistance of the semiconductor wafer may occur due to thermal denaturation during epitaxial layer growth and differences in growth conditions. For that purpose, nW epitaxy 1
(2) Insulating properties and high resistance of semi-insulating wafers after semiconductor layer growth must be inspected. In addition, a single layer of high resistivity buffer may be formed between the above-mentioned semi-insulating semiconductor wafer and the n-type epitaxial layer,
In this case, it is necessary to test the insulation and high resistance of the semiconductor wafer and the buffer layer together.

(3) Prior Art and Problems All the above-mentioned tests have been conventionally performed as follows. After forming a highly impurity-concentrated n-type epitaxial layer 2 on a semi-insulating wafer 1 (FIG. 1), a metal layer is formed on this epitaxial layer 2 by vapor deposition or sintering,
At least two ohmic electrodes 3 are formed by photoetching (FIG. 1). Between these ohmic electrodes 30, the epitaxial layer 2 is selectively etched away using a photoetching method, as shown in FIG. 1, to form a groove 4 reaching the semiconductor wafer 1. Inspection was carried out by applying a voltage from a power source 5 between these ohmic electrodes 3 and measuring the current flowing through the semi-insulating semiconductor material with an ammeter 6. However, such an inspection method requires the formation of ohmic electrodes and selective etching of the double layer, and has the disadvantage that it requires a large number of inspection steps and takes a long time.

(4) Purpose of the Invention The purpose of the present invention is to improve the insulation properties of the semiconductor wafer in a semiconductor substrate consisting of a semiconductor wafer (preferably a semi-insulating compound semiconductor wafer) and an n-type epitaxial layer formed thereon. The purpose of this invention is to propose a method for easily and quickly testing resistance.

(5) Structure of the invention The above-mentioned object is to provide a semiconductor wafer and an nW
A semiconductor substrate consisting of an epitaxial layer (or a semiconductor substrate consisting of a semiconductor wafer, a buffer layer and an n-type epitaxial layer formed sequentially on the semiconductor wafer) is anodized, and changes in current at that time are observed. This is achieved by proposing a method for testing a semiconductor substrate having an epitaxial layer, which tests the insulation and/or resistance of a semiconductor wafer (or a semiconductor wafer and a buffer layer).

Anodic oxidation is a process in which a semiconductor substrate is coated with an anode electrode in an electrolytic a solution.
The process involves forming a Km film on the surface of a semiconductor substrate by passing a current through a platinum plate as a ball and as an electric standard.

(6) Embodiments of the invention Hereinafter, the present invention will be described in detail by embodiments and examples of the invention in conjunction with the accompanying drawings.

Embodiment FIG. 2 ( ) is a partial cross-sectional view of a semiconductor substrate before hot oxide oxidation treatment, in which a high impurity concentration n-type film with a non-uniform thickness is deposited on a semi-permanent semiconductor layer z/'-11. An epitaxial layer 12 is formed. If this semiconductor substrate is used as an anode and the platinum plate is used as a cathode and source, the entire anodic oxidation is carried out in an electrolytic solution.
As shown in Figure (b), an oxide film 13 is formed on the n-type epitaxial layer 12, and this epitaxial layer 120
It is generally known that the depletion layer 14 extends toward the wafer 11 from the surface. If a constant voltage power supply that can be appropriately set is used, the oxidation current '11' will decrease exponentially as expressed by the following equation.

I (t)ζKexp(--) τ In the formula, the second is a constant, τ is a time constant, and t is time. At that time, if a part of the depletion layer 14 reaches the semi-insulating wafer 11 as shown in FIG. 2(b), this wafer 11
A high field is applied to . At this time, if the semi-averse semiconductor wafer 11 has good insulation, the oxidation current will continue until the entire n-type epitaxial layer 12 reaches the thickness of the depletion layer 14.
That is, it decreases exponentially until anodization stops. However, if the insulation of the wafer 11 is poor, current leakage will occur and the oxidation current will be divided into leakage currents for an exponential decrease. Therefore, by observing the oxidation current with a 1x-y recorder, etc., we found that the oxidation current decreases exponentially with time when the insulation of the semiconductor wafer is good, and when it is bad, it decreases exponentially. You can see that it deviates from the shape of.

In this way, the insulation (high resistance) of the semi-insulating semiconductor wafer (or semi-insulating semiconductor wafer and one layer) can be easily tested. It should be noted that although the thickness of the highly impurity-concentrated n-type epitaxial layer described above is non-uniform, it can be similarly inspected even if the thickness is uniform. Also,
If this epitaxial layer is not n-type but p-type, the depletion layer will not expand so much, so the inspection method according to the present invention is not suitable.

Embodiments N-type Ga with an impurity concentration of about 8×10 crn was grown by vapor phase epitaxial growth on a semi-insulating fiGaAs wafer with a Cr dome cut from a different GaAA single crystal.
The Aa layer was formed to have a thickness of 0.5 to 0.65 μm. The testing apparatus shown in FIG. 3 was used to examine the insulation properties of the GaAs wafers of the obtained semiconductor substrates A and B using the testing method according to the present invention. This device includes a quartz container 22 containing an electrolytic solution 21 (for example, a mixed solution of 3tlI tartaric acid aqueous solution and !robilene glycol), a constant voltage power source 23, a variable resistor 24 for adjusting the initial oxidation current, and a cathode electrode made of a platinum plate. 25, a resistor 26 and an X-Y recorder 27 that records the oxidation current over time. The semiconductor substrate 28 (FIG. 3) was immersed in the electrolytic nitrogen solution 21 and anodized for 15 minutes, and the change in oxidation current over time was recorded using an X-Y recorder 27. Oxidation of each of semiconductor substrates A and B! !
These changes were indicated by lines a and b in FIG. In FIG. 4, the vertical axis represents the oxidation current, and the horizontal axis represents the elapsed time.

As is clear from Figure 4, semi-insulating Ga has good insulation properties.
The oxidation current decreases exponentially in the As wafer semiconductor substrate A, while the semi-insulating GaA with poor insulation properties
In the semiconductor substrate B of wafer S, the oxidation current deviates from an exponential decrease and starts to fluctuate after about 5 minutes.

The insulation properties of the GaAs wafers of the semiconductor substrates A and B were examined using a conventional testing method as follows. First, n-type Ga A was formed by vapor phase epitaxy growth method.
An Aura/Au metal film (thickness: 200 nm) was formed on the m layer by vapor deposition, photoetched into a predetermined pattern, and then heat-treated at 450° C. for 2 minutes in a nitrogen atmosphere to form an ohmic electrode. Photoetch the GaAm epitaxial layer between the ohmic electrodes to a depth of 0.6-0.8μ.
A groove reaching a conventional GaAs wafer was formed as shown in FIG. Then, a voltage of 100 cm was applied between the electrodes to separate each semiconductor substrate A.

The current value of B was measured. As a result, in semiconductor substrate A, 1
0 μA, and 1o for male conductor board B.

It was μA. From this, it is clear that the semiconductor substrate A has a better insulation property of the GaAs wafer than the semiconductor substrate B.

(7) Effects of the invention By using the inspection method according to the present invention, the insulation (high resistance) of a semi-insulating semiconductor wafer under the n-type epitaxial layer can be easily determined by observing the decreasing change state of the oxidation current. It can be investigated in a short time.

Since the entire semiconductor substrate is immersed in the electrolytic solution and inspected, the insulation properties can be evaluated as a whole, not just the measurement/quantity turn part as in conventional methods. Furthermore, although the GaAm epitaxial layer tends to be formed to have a non-uniform thickness, if the thickness is non-uniform, it can be made uniform by anodic oxidation.

[Brief explanation of the drawing]

Figure 1 is a partial cross-sectional view of a semiconductor substrate to explain a conventional inspection method, and Figure 2 (&) is a partial cross-sectional view of a semiconductor substrate before anodizing treatment. FIG. 3 is a schematic diagram of an apparatus for carrying out the inspection method according to the present invention; FIG. 4 is a diagram showing changes in oxidation current over time; FIG. It is. DESCRIPTION OF SYMBOLS 1... Semi-insulating semiconductor wafer, 2... Epitaxial layer, 3... Ohmic electrode, 6... Current needle, 1
DESCRIPTION OF SYMBOLS 1... Semi-insulating semiconductor wafer, 12... Epitaxial layer, 13... Anodic oxide film, 14... Depletion layer,
21... Electrolyte, 27... X-Y recorder, 28.
...Semiconductor substrate.

Claims (1)

[Claims] 1. Anodizing a semiconductor substrate consisting of a semiconductor wafer and an n-type epitaxial layer formed thereon, or a semiconductor substrate consisting of a semiconductor wafer and a buffer layer and an n-type epitaxial layer formed sequentially thereon. A method for inspecting a semiconductor substrate having an epitaxial layer, which inspects the insulation and/or resistance of the semiconductor wafer or the semiconductor wafer and the buffer layer by performing a process and observing changes in current during the process. 2. The method according to claim 1, wherein the semiconductor material is a compound semiconductor. 3. Claim 2, characterized in that the semiconductor wafer is a semi-insulating or insulating semiconductor wafer.
The method described in section. (,1) ,,
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