JPS59231933A - Equalizer - Google Patents

Abstract

PURPOSE:To attain the change from the flat state into the equalizing state having a certain characteristic without change in interruption due to changeover and electric length by changing over the characteristic while distributing an input signal into a main and a sub signal and keeping the main signal system connected. CONSTITUTION:The input signal is distributed into the main signal and the sub- signal at a distributor 23, and an input changeover device 24 connects switchingly the distributed sub signal to a terminator 25 at the input side and an input of a delay section. The delay section 22 gives a prescribed delay and attenuation to the sub signal applied to its input and an output changeover device 27 changes over the output of the delay section 22 and an output terminator 28. Further, a synthesizer 7 synthesizes a signal giving a prescribed delay to the main signal of the distributor 23 and an output signal of the changeover device 27. Since the changeover devices 24, 27 are changed over and the amplitude and delay time characteristic is changed while the main signal system is kept connected in the way, the change from the flat state to the equalizing state of a certain characteristic is attained without the change in the interruption due to changeover and electric length.

Description

[Detailed description of the invention] This release F! AH) It concerns a delay equalizer based on the Lanceversal filter theory.

FIG. 1 is a diagram showing a conventional circuit. [11W input terminal, (2) is a distributor, 151 is a polarity inverter, +61. +
71. α9. (g) Combiner, (9) e output terminal, α sword ~ α411) delay circuit, 00 is fixed attenuator, (8), α
They each contain a polarity reversal, have the same coefficients, and are determined by an interlocking coefficient loading circuit. The operation of FIG. 1 will be explained with reference to Q9 indicating an amplitude correction section and @denoting a delay section. The signal input to the input terminal [11] is divided into five parts by a distributor (2), first delayed by a delay amount of 2T in a delay circuit αD, and then input as a positive signal to a combiner (7). The second is a delay circuit @ with a delay of 1
It is input to the synthesizer (6) with a delay of iT3T.

At 3f, the signal is delayed by T in the delay circuit 0, and after its polarity is inverted by the polarity inverter fi+, it is input to the synthesizer (6). Second,
The third composite signal is manually input to the synthesizer (G) as a delay section signal. The 4th signal is input directly to the synthesizer 05, and the 5th signal is delayed by 4T in a delay circuit (141) and input to the synthesis device.The 4th and 5th synthesized signals are attenuated by a fixed attenuator ae, After passing through circuit α7)'t = combiner (t)
The signal is input to the synthesis mold as a signal of the amplitude correction section. This composite signal passes through a coefficient loading circuit (8), is combined with all signals in a synthesizer (7), and is output to an output terminal (9). Here, coefficient loading circuit (8) and 0710: have the same damping characteristics and are interlocked.

Assume that there is no signal attenuation other than coefficient circuit (8), αη, and attenuator αG, and there is no time delay other than the delay line.The coefficient of coefficient circuit +8) is 12 attenuator Oe, coefficient circuit (8), and α power. Let k be the combined coefficient of , then the output signal can be expressed by the following formula.

C(Q)=Cosωt−1coaω(t+T)+j? C
osω(tI) 10k Co sω(t-2T) 10kCo
sω(t+2T) [81= 52j”)+
2(2k A”)Co!l 2ωT+4 and 2Cos2(
ff-11+2kCos2C ・Bin (ω to tan 2.,, n, T)
19 + G cr = 2 Rog (v' (1 + 212) + 2 for the amplitude characteristic of QQ5)
(2k l 2) CogωT+4 to 2Cos2ωT)
(10) becomes.

Here, if we assume that the coefficient circuit (8), O7) r [, the interlocking coefficient l is rich, and the fixed attenuation circuit α61rc is attenuated by 16 dB, that is, the coefficient is 0.5, then 12 songs k = 0.5) IX/=T That's it. This 'lj (when substituted into formula 101, the second term in the square root is 0 and y t), formula 1101 is GC ←) = 201og ((1 + 2 J million + / Cos"
G) T) O becomes O21 The delay characteristic at this time becomes τC (Rini.This amplitude characteristic Gc(f) and the delay characteristic τC(f)
Fig. 2 shows the change characteristics with respect to the coefficient l. l! When increasing , the amplitude and delay each change in the direction of the arrow 0 It is assumed that there is no attenuation except for the coefficient circuit and the attenuator, but as with the conventional circuit, regardless of the absolute amount of attenuation, 03 The formula is established. The same can be said for the time delay.0 Figure 2 shows changes in the delay characteristic GC(f) and the delay characteristic τC(f) in the case of J)0. τC(ω) is (1
According to equation 3, when l<0, the sign is reversed and the lead and lag of the delay type become opposite to the reference value. - 10,000, GC (b)
) becomes 0 from the O3 formula and becomes %I! If the absolute values of are equal, there is no need to take the same value and reverse it. In other words, when l changes from the + side to the one side, the delay characteristic rc changes as shown by the arrow in Figure 3, but the amplitude characteristic rx changes as shown in Figure 2 (
Just repeat the characteristic of a).

By the way, if you want to switch between a state with delay characteristics and a state with flat characteristics without changing the electrical length and without signal interruption, you can use a fixed equalizer as shown in Figure 4. This method switches (g) with relays (b) and (c), but it does not meet the requirements because the signal is cut off when the relay is switched and the electrical length of the path changes. In addition, in the conventional circuit shown in Figure 1, is it possible to switch between a flat state and a state with delay characteristics in the coefficient loading circuit without cutting off the signal? Since the length and frequency characteristics change, it is not possible to obtain the amplitude and delay characteristics as required above. Furthermore, the coefficient loading circuit rc insertion loss is large, and the change in return loss %i
This requires an amplifier, etc., which is expensive and requires a lot of effort.

The object of the present invention is to eliminate these drawbacks and provide an isograph that can change the amplitude characteristics and delay characteristics within a required range without signal interruption or change in electrical length due to switching.

The embodiments of this invention will be explained below.

FIG. 5 shows an embodiment of the present invention. 6 The differences from FIG. 1 are as follows. The input is distributed by a distributor (C), relay @ all through, one side is connected to a terminator (C), and the other side is connected to a conventional distributor (2). Also, following the coefficient load 1 circuit, the blade of the fixed foot subtractor (E) is connected to the synthesizer (7) through the relay trunk as in the conventional one. It is connected to the terminal (9111) on the opposite side of the relay wire.

When the fixed attenuator (2) is adjusted to have a fixed delay characteristic arbitrarily determined by the Kanpan type 031, the relay (support) and @ are on the side of the distributor and combiner as shown in Figure 5. It has all the good characteristics shown in FIG. 6(i) when connected to Next, when the relay @, (A) is switched in slow motion and connected to the termination type head, (2), the characteristics become flat as shown in FIG. 6 (IT). This is because the characteristic in this case is determined only by the main signal system composed of the distributor (2), the delay line Qll, and the combiner (7), even though it becomes flat in this way. Further, in this embodiment, the main signal system is connected and the signal is switched as it is, so the signal disconnection as shown in FIG. 4 does not occur, and the electrical length does not change because it is determined by the main signal system.

Although relays @ and @ are used in this embodiment, switches or transistor switch circuits may be used as long as they perform the same function. Further, although two relays are used in this embodiment, if the isolation of the relays is good, any one of the relays can be completely omitted. Further, the relay may be placed at any position (for example, after the distributor +21) as long as the delay and amplitude correction sections can all be disconnected.

Is there an example of applying Fig. 5 to delayed isovolume?
It is also possible to apply it to an amplitude equalizer as shown in the figure. In FIG. 7, the same reference numerals as in FIG. N1 or FIG. In general, it can be applied as a 0N10FF switch to a transversal type variable isocapacitor (as an example, it can also be applied to the delay equalizer shown in FIG. 1).

Furthermore, in the embodiment shown in FIG. 8, the fixed delay equalizer G11l in FIG. 5 and the variable delay equalizer section in FIG. 1 are connected in cascade. With one 0N10FF and a variable equalizer (c), the variable delay range is twice as large as when there are only 1431 variable delay units, and it is cheaper than when three variable equalizers are connected in cascade. It has been confirmed that the fixed attenuator (FIG. 5) can be configured as shown in FIG.
By adding a phase inversion 0N10F F switching function to a), it is possible to obtain a variable range three times that of a single unit.In addition, for amplitude equalizers and other transversal equalizers, The same thing can be said.

As described above, according to the present invention, it is possible to change the characteristics of the equalizer from a flat state to an equalization state with certain characteristics without interruption or change in electrical length due to switching.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing a conventional circuit, Fig. 2 is a diagram showing all the amplitude and delay time characteristics of the conventional circuit, and Fig. 3 is a diagram showing the coefficient circuit (
8) Changes in delay time characteristics when the coefficient l is changed from the + side to -111u, Figure 4 shows another conventional circuit, Figure 5 shows an embodiment of the present invention, and Figure 6 shows this example. A diagram showing the amplitude and delay time characteristics of the embodiment according to the invention, and FIG. 7 shows an example of application to an amplitude equalizer. Talented F/
r:iJ4 "lj-'4'n1el"iQl*・)
("In the A3° diagram, +11... large power terminal, (21
...Distributor, (6)...Polarity inverter, (6)...
Combiner, (7)...Synthesizer, (8)...Coefficient loading circuit, (91...Output terminal, σto...Delay circuit, mouth...
・Delay circuit, U...Delay circuit, En...Delay circuit, (
To)...Synthesizer, αG...Fixed attenuator, αη...
Polarity load circuit, (to)...Synthesizer, CD...Amplitude correction section, (2)...Delay section,...Distributor, @...
Relay, (2)...terminator, (7)...fixed attenuator, (b)...relay, ■...terminator, competition...fixed equal specific volume %■...relay , (to)...relay, (2)
...Identified delay isovolume, (6)...Fixed delay isovolume,
Ring: Variable delay etc. Ruru. In the drawings, the same reference numerals indicate the same parts or parts corresponding to a. Agent Masuo Oiwa Figure 1 Figure 4 Figure 6 Reciprocal soft Figure 7 Figure 1

Claims (1)

[Claims] In a transversal equalizer, there is a divider that divides an input signal into a positive signal and a sub-signal, a divider that outputs the sub-signal, an input switch that switches and connects the divider to a terminal on all input sides and a delay section manually. a delay section that provides sufficient delay and attenuation to the sub-signal input to the input of the delay section; an output switch that switches between the output of the delay section and a terminal on the output side; and a positive signal output of the distributor. and a synthesizer for combining a signal given a sufficient delay to the output signal of the output switch, and the input switch and the output switch are switched to completely change the amplitude and delay time characteristics. Isoshin device featuring.