JPS59231660A - 更新デ−タのスケジユ−ル方式 - Google Patents

更新デ−タのスケジユ−ル方式

Info

Publication number
JPS59231660A
JPS59231660A JP58105354A JP10535483A JPS59231660A JP S59231660 A JPS59231660 A JP S59231660A JP 58105354 A JP58105354 A JP 58105354A JP 10535483 A JP10535483 A JP 10535483A JP S59231660 A JPS59231660 A JP S59231660A
Authority
JP
Japan
Prior art keywords
update
data
entry
request
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58105354A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0234057B2 (cs
Inventor
Yuji Yamada
裕二 山田
Sakae Sato
栄 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP58105354A priority Critical patent/JPS59231660A/ja
Publication of JPS59231660A publication Critical patent/JPS59231660A/ja
Publication of JPH0234057B2 publication Critical patent/JPH0234057B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
JP58105354A 1983-06-13 1983-06-13 更新デ−タのスケジユ−ル方式 Granted JPS59231660A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58105354A JPS59231660A (ja) 1983-06-13 1983-06-13 更新デ−タのスケジユ−ル方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58105354A JPS59231660A (ja) 1983-06-13 1983-06-13 更新デ−タのスケジユ−ル方式

Publications (2)

Publication Number Publication Date
JPS59231660A true JPS59231660A (ja) 1984-12-26
JPH0234057B2 JPH0234057B2 (cs) 1990-08-01

Family

ID=14405388

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58105354A Granted JPS59231660A (ja) 1983-06-13 1983-06-13 更新デ−タのスケジユ−ル方式

Country Status (1)

Country Link
JP (1) JPS59231660A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61259346A (ja) * 1985-05-13 1986-11-17 Fujitsu Kiden Ltd 修正フアイル方式
JPH076099A (ja) * 1992-12-17 1995-01-10 Internatl Business Mach Corp <Ibm> リモート・データの２重化のためのシステム及び方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0350739U (cs) * 1989-09-22 1991-05-17

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61259346A (ja) * 1985-05-13 1986-11-17 Fujitsu Kiden Ltd 修正フアイル方式
JPH076099A (ja) * 1992-12-17 1995-01-10 Internatl Business Mach Corp <Ibm> リモート・データの２重化のためのシステム及び方法

Also Published As

Publication number Publication date
JPH0234057B2 (cs) 1990-08-01

Similar Documents

Publication Publication Date Title
US5113514A (en) System bus for multiprocessor computer system
US5222217A (en) System and method for implementing operating system message queues with recoverable shared virtual storage
US5060144A (en) Locking control with validity status indication for a multi-host processor system that utilizes a record lock processor and a cache memory for each host processor
DE112018002951B4 (de) Verwenden eines spurformatcodes in einem cache-steuerblock für eine spur in einem cache, um lese- und schreibanforderungen in bezug auf die spur im cache zu verarbeiten
EP0404369B1 (en) A method for maintaining cache coherence in a multiprocessor computer system
US6289419B1 (en) Consistency control device merging updated memory blocks
US4881163A (en) Computer system architecture employing cache data line move-out queue buffer
US5664148A (en) Cache arrangement including coalescing buffer queue for non-cacheable data
KR920005852B1 (ko) 데이타 처리 시스템에 있어서 합성 디스크립터를 제공하는 장치 및 방법
CN109240945B (zh) 一种数据处理方法及处理器
US8850121B1 (en) Outstanding load miss buffer with shared entries
JPH076063A (ja) 記憶ダンプ作成方法及びシステム、情報捕捉方法及びシステム、並びに記憶ダンプ提供方法及びシステム
JPH11282821A (ja) 同時トランザクションを依存性で管理するための低占有度プロトコル
US6253291B1 (en) Method and apparatus for relaxing the FIFO ordering constraint for memory accesses in a multi-processor asynchronous cache system
JPH05334158A (ja) 複合システムにおけるログファイル制御方式
US8793435B1 (en) Load miss result buffer with shared data lines
WO2025138722A1 (zh) 访存失效队列处理方法、装置及电子设备
US8015363B2 (en) Cache consistency in a multiprocessor system with shared memory
JPH0950400A (ja) マルチプロセッサシステム
US8806135B1 (en) Load store unit with load miss result buffer
JPH05128072A (ja) システム間排他制御方式
JPS59231660A (ja) 更新デ−タのスケジユ−ル方式
US20040111569A1 (en) High speed memory cloning facility via a coherently done mechanism
JPS6336538B2 (cs)
JPH0519179B2 (cs)