JPS59229647A - Controlling method of input/output device - Google Patents

Abstract

PURPOSE:To change easily and rapidly an I/O control microprogram by deciding a jump instruction, jumping an address to the position to which address to be jumped and sending data in the prescribed order of addresses. CONSTITUTION:A RAM2 accumulating correction data for correcting program accumulated in a ROM1 in the order of addresses is prepared. When an address in the ROM1 coincides with an address of the ROM1 which is held in the RAM2 and requested to correct, the correction data held in the RAM2 at the address are outputted to an I/O device 3. When the output of the ROM1 is used as the address of the ROM1, the difference between said address and the address of the ROM1 which is held in the RAM2 and requested to correct is found out and the address of the RAM2 is forwarded or backwarded to update the address of the RAM2 to an address corresponding to the correction data to be outputted successively.

Description

[Detailed Description of the Invention] Technical Field of the Invention The present invention relates to an input/output device control method using microprogram control, and in particular, it is possible to change an input/output device control program stored in a read-only memory (hereinafter referred to as ROM). It is related to input/output device control methods.

Prior Art and Problems When controlling input/output devices using microprogram control, there is a method in which data stored in ROM is read out and used as is in order to speed up control. When it becomes necessary to change the program to control the output device, since the data is stored in the ROM, it cannot be easily corrected, so the method usually involves replacing the ROM itself that stores the data. Unfortunately, it was generally extremely difficult to change the program.

On the other hand, the data for correcting the ROM data and the ROM address corresponding to the data are stored, for example, in a continuous write memory (hereinafter referred to as RAM), and the ROM that requires correction is stored in the RAM. A possible method is to read out and use the corrected data held in the RAM when the address matches the address used to access the ROM.

However, when using a configuration that simply compares addresses like this, in order to retrieve data from RAM, it is necessary to compare all the addresses of the RAM (C) where correction data is stored and the ROM of the data that needs correction. Therefore, it takes a long time to continuously output correction data, and in order to shorten the successive output time, address comparisons must be performed at high speed22. Preferable & good.

Purpose of the Invention The present invention is intended to solve the problems of the prior art, and its purpose is to make it possible to easily and quickly change input/output control microprograms stored in ROM. The goal is to provide a new method.

Embodiment of the Invention The figure shows the configuration of an embodiment of the input/output control system of the invention. In the figure, 1 is a ROM that stores microprogram data, 2 is a RAM that stores correction data for the microprogram, 3 is an input/output device jtcI10),
4 and 5 are selectors (SEL), 6.7.8 are matchers (MAT), 9 is a fixed pattern generation circuit, and 10 is RAM
The matcher 7 and the fixed pattern generation circuit 9 form an input/output control logic section 20, and the matcher 8. counter 10
forms an arithmetic unit 30.

Here, data to be output to the input/output device 3 is stored in the ROM 1 in address order.

The RAM 2 stores ROM addresses that require correction and data corresponding to the addresses in address order.

Normally, the selector 4 is a central control unit (hereinafter referred to as C) which is not shown.
(abbreviated as C) side, and from CC to ROM1
Address information for the ROM 1 and the matcher 65 are added via the selector 4 to the ROM 1 and the matcher 65. In Matscher 6, R
The address information of ROM1 to be corrected next (the means will be described later) outputted from AM2 is compared with the address information from CC. Normally, the selector 5 is switched to the ROM1 side, and if the comparison result at the char 6 does not match, there is no need to correct the output data of the ROM1.
As is, or if the comparison results match, ROM1
Since the output data of requires correction, selector 5 is moved to RAM.
The corrected data held in RAM2+ is sent to the input/output device 3, and the selector 5 is restored. Further, if the comparison results match, the counter 10 that outputs the address of RAM2 is incremented by one step, and the output of RAM2 is made into the address of ROM1 and correction data that require the next correction.

When the data output from selector 5 is a jump instruction consisting of a jump instruction identification pattern and a jump destination address (hereinafter abbreviated as JADD) for changing the flow of the program in ROM 1, the operation is as follows. ,R
The output of AM2 is changed for the next correction data. The fixed pattern generation circuit 9 outputs the same pattern as the jump instruction identification pattern, and when a jump instruction is issued,
Matching is performed in the matcher 7, the selector 4 is switched by the output of the matcher 7, and the address JADD is added to the ROM 1 and the matcher 6. The address JADD is also added to the matcher 8 and compared with the address of the ROM 1 that requires correction (hereinafter abbreviated as ADDA) output from the RAMQ at that time. J.A.D.D.
) In the case of ADDA, generate an enable signal and use JADD.
The counter 10 is incremented until JADD<-ADDA, and when JADD<-ADDA, the counter 10 is incremented until it reaches JADD)ADDA, and then the selector 4 is restored to return to normal operation. . counter 1
Since 0 gives the address of RAM2, the output of RAM2 will be for the next correction data.

According to the present invention, for example, when sending a microinstruction as data to a partner device, a jump instruction is determined in order to send only the necessary data, and in the case of a jump instruction, the specified jump destination address is sent. It is possible to perform control such as skipping and sending data again in a predetermined address order from that point.

For example, when sending microcommands to a floppy disk device, when the central controller sends a read/write command to the human output controller, the input/output controller will respond to the read or write by identifying the common parts of the microcommands and In order to send a command part specific to a read or write operation, a jump command is inserted as a separation.

As described in detail, according to the input/output device control method of the present invention, the correction data for correcting the program stored in the ROM and the address of the ROM to be corrected are arranged in the address order (=accumulation). A RAM is provided, and when the ROM address and the ROM address that requires correction held in the RAM match, the corrected data held in the RAM is output to the input/output device at that address, and the RO
If the output of M is used as the ROM address, RA
The RAM address is incremented or retracted by finding the difference from the ROM address that requires correction held in M.
Since the address is updated to the address corresponding to the corrected data to be output next, the input/output control microprogram stored in the ROM can be easily and quickly changed, which is extremely effective.

[Brief explanation of the drawing]

The figure is a block diagram showing the configuration of an embodiment of the input/output device control method of the present invention. 1... Read-only memory (Rolba), 2... Read/write memory (RAM), 'y... Input/output device (I
lo), 4.5... Selector (SEL), 6, 7.8
... Matcher (MAT), 9... Fixed pattern generation circuit, 10... Up/down counter, 20...
Input/output control logic section, 60...Arithmetic section Patent applicant Fujitsu Limited

Claims (1)

[Claims] In an input/output device control method that performs microprogram control using a program stored in a read-only memory (hereinafter referred to as ROM), correction data for correcting the program stored in the ROM and data to be corrected are provided. A continuous write memory (hereinafter abbreviated as RAM) for storing ROM addresses in address order is provided, and the RO
When the address for accessing M matches the address of the ROM where the data held in the RAM is to be corrected, the corrected data held in the RAM at that address is output to the input/output device, and the output of the ROM is the same. R.O.
When used as the address of M, find the difference between both addresses and increment or retract the address of RAM and write it to RA.
An input/output device control method characterized by updating the address of M to the address corresponding to the corrected data to be output next.