JPS5922488A - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JPS5922488A
JPS5922488A JP13122082A JP13122082A JPS5922488A JP S5922488 A JPS5922488 A JP S5922488A JP 13122082 A JP13122082 A JP 13122082A JP 13122082 A JP13122082 A JP 13122082A JP S5922488 A JPS5922488 A JP S5922488A
Authority
JP
Japan
Prior art keywords
circuit
output
voltage
time constant
agc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13122082A
Other languages
Japanese (ja)
Inventor
Yutaka Saito
裕 斎藤
Hiroshi Gomi
五味 浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13122082A priority Critical patent/JPS5922488A/en
Publication of JPS5922488A publication Critical patent/JPS5922488A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/52Automatic gain control

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)

Abstract

PURPOSE:To prevent the generation of sag, by providing plural comparison detecting circuits having different time constants and switching the circuits with an external control pulse for selecting a comparison detecting circuit having a long time constant for a specific period only. CONSTITUTION:An input signal Vi is inputted to a front stage amplifier circuit 11, an amplified output is inputted to a video detecting circuit 12 for detection and a detected output Vo is outputted to a video amplifier stage of the rear stage. The detected output Vo is inputted to the comparison detecting circuits 13-1 and 13-2. The output of the comparison detecting circuits 13-1, 13-2 is connected to terminals 15-1, 15-2 in the switching circuit 15, and the output of the two comparison detecting circuits is switched with a control pulse Vc for a limited period and the selected output is applied to the front stage amplifier circuit 11 as an AGC voltage output. The control pulse Vc is obtained so that the synchronizing signal when a sag takes place is delayed and the pulse is given in one horizontal period.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、一般の電子機器例えばカラーテレビジョン受
像機器の映像中間周波増幅(以下PIF)回路へ自動利
得制御(以下AGCと言う。)を加えるためAGO電圧
を検出づ−るものであって、特にそのAGC時定数に係
る充放電特性を改善した自動利得制御回路に関する。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention adds automatic gain control (hereinafter referred to as AGC) to a video intermediate frequency amplification (hereinafter referred to as PIF) circuit of general electronic equipment, such as color television receiver equipment. Therefore, the present invention relates to an automatic gain control circuit that detects an AGO voltage, and in particular has improved charge/discharge characteristics related to the AGC time constant.

〔発明の背景技術〕[Background technology of the invention]

一般にカラーテレビジョン受像機においては、アンテナ
に誘起される入力信号に強弱があると、映像検波出力も
同様に変動して画面のコントラストが変化するので、受
像機の利得を制御し常時一定の映像検波出力を得るため
にAGC回路を股【ブて上記変動を補償している。
In general, in color television receivers, if the input signal induced in the antenna is strong or weak, the video detection output will also fluctuate and the contrast of the screen will change. In order to obtain the detection output, an AGC circuit is used to compensate for the above fluctuations.

このAGC手段としては、検出制御電圧が大きいこと、
外来ノイズの影響を受けにくいこと、受信信号の変化に
対し^速で追従し得ること等が必要であり、一般的には
ピーク値形AGC,平均値形AGC,及びキード形AG
Cが周知である。
This AGC means requires a large detection control voltage;
It is necessary to be resistant to the influence of external noise and to be able to follow changes in the received signal at high speed. Generally, peak value type AGC, average value type AGC, and keyed type AGC are used.
C is well known.

ピーク値形AGCは、送信側において、テレビジョン高
周波信号の同期信号部分を画面の明暗とは無関係に常時
一定の振幅で送出して来るのを利用し、この同期信号の
振幅変化を検出してAGC電圧とするものである。
Peak value type AGC utilizes the fact that the synchronization signal part of the television high-frequency signal is always sent out at a constant amplitude regardless of the brightness or darkness of the screen on the transmitting side, and detects changes in the amplitude of this synchronization signal. This is the AGC voltage.

この方式は、検波出力電圧が大きく且つ画像の明暗によ
ってAGC電圧が変化しない特徴を有するが、同期信号
と同等以上の振幅を有するノイズが印加するとAGC電
圧が変化する欠点があるため、通常ノイズフィルタをそ
の前後に介在する必要がある。
This method has the feature that the detection output voltage is large and the AGC voltage does not change depending on the brightness or darkness of the image, but it has the disadvantage that the AGC voltage changes when noise with an amplitude equal to or higher than that of the synchronization signal is applied, so it is usually filtered using a noise filter. It is necessary to intervene before and after that.

又、平均値形AGCは、信号の映像部分が画面の平均の
明るさによって振幅が違うため、映像信号の平均値レベ
ルAGCの基準電圧として用いるものである。更に、キ
ード形AGCは、所定期間に抽出したキーイングパルス
を利用してカラーテレビジョン信号の中から同期信号部
分を扱き出し、この同期レベルに応じた検波電圧をAG
C基準電圧として使用するものである。従って1、映像
信号期間に混入した雑音は、AGC検波電圧と無関係と
なり雑音に影響されることが少ない。
Furthermore, since the amplitude of the video portion of the signal varies depending on the average brightness of the screen, the average value type AGC is used as a reference voltage for the average value level AGC of the video signal. Furthermore, the keyed AGC uses keying pulses extracted during a predetermined period to extract the synchronization signal part from the color television signal, and outputs the detected voltage according to this synchronization level to the AGC.
This is used as a C reference voltage. Therefore, 1. Noise mixed into the video signal period has nothing to do with the AGC detection voltage, and is less affected by the noise.

上記各AGC方式のうちピーク値形方式とキード形方式
が一般的であり、具体的には第1図に示す構成が知られ
ている。これは、映像信号Viを増幅回路1で増幅した
後検波回路2にて検波し、その検波出力■0を比較検出
回路3に入力する一方、制御用基準バイアス回路4から
の基準電圧■「もこの比較検出回路3に入力し、ここで
両者を比較した出力がAGC電圧VAGCとして前記増
幅回路1に入力される。又、比較検出回路3には放電抵
抗Rと外部容量Cの時定数回路を付設し、この時定数に
より充放電特性を決定する。つまり、放電時の時定数を
水平同期パルスの幅以下に選び、水平同期パルスが加わ
る期間に前記外部容量Cを充電する。そして、放電時の
時定数は水平同期パルスより大きく選定することにより
、検波出力VOはほぼ映像信号中の同期信号のレベル変
動に追従するAGC電圧VAGCとなる。検波回路2で
検波された電圧波形は第2図(a、)となり、一定の充
放電出力として得られる。これが比較検出力回路3にて
基準電圧■rと比較され、AGCI圧VA(、C(第2
図b)を得る。
Among the above AGC methods, the peak value type method and the keyed type method are common, and specifically, the configuration shown in FIG. 1 is known. This is because the video signal Vi is amplified by the amplifier circuit 1, then detected by the detection circuit 2, and the detected output ``0'' is input to the comparison detection circuit 3, while the reference voltage ``0'' from the control reference bias circuit 4 is also input. This is input to the comparison detection circuit 3, and the output of the comparison between the two is input to the amplifier circuit 1 as the AGC voltage VAGC.The comparison detection circuit 3 also includes a time constant circuit of a discharge resistor R and an external capacitor C. The charging and discharging characteristics are determined by this time constant.In other words, the time constant during discharging is selected to be equal to or less than the width of the horizontal synchronizing pulse, and the external capacitor C is charged during the period in which the horizontal synchronizing pulse is applied.Then, when discharging By selecting a time constant larger than the horizontal synchronization pulse, the detection output VO becomes the AGC voltage VAGC that approximately follows the level fluctuation of the synchronization signal in the video signal.The voltage waveform detected by the detection circuit 2 is shown in FIG. (a,), which is obtained as a constant charging/discharging output. This is compared with the reference voltage ■r in the comparison detection power circuit 3, and the AGCI pressure VA(,C(second
Figure b) is obtained.

〔背景技術の問題点〕[Problems with background technology]

このように、ビータ値形AGC方式では、同期信号をA
GC電圧を発生するための規準にしているため、同期信
号のパルス性によって検波出力V0は充電時及び放電時
の初期(過渡期)にいわゆるサグ(Sag)を生じる場
合がある。
In this way, in the beater value type AGC method, the synchronization signal is
Since this is used as a standard for generating a GC voltage, the detected output V0 may cause a so-called sag in the initial stage (transient period) during charging and discharging due to the pulse nature of the synchronizing signal.

即ち、第2図は垂直帰線期間における等化パルス期間と
垂直同期パルス期間の境界部の1水平周期に形成される
AGC電圧を示すもので、この期間に検波回路2から出
力される検波出力vOは0゜04Hの等化パルス(期間
A)で充電され、続くスリット期間Bに放電され、さら
に垂直同期パルス0.46H(期間D)が加わることに
よって充電され、続くスリット期間(E)に放電する波
形となる。この充1fi電の初期にa−1,a −,2
,a−3,a−4に示す如きサグを生ずる。ただし、各
波形は時定数回路を接続した状態における検波電圧波形
である。このサグは、発生量が大きいとAGC電圧VA
GCの変動が大きく同期不安定や輝度傾斜を引き起すこ
とになるほか、発生量が小さくても放送局の送信状況や
、ゴースト等の外乱による電波状況等のチェックや補正
には極めて有害であるが、有効的な抑圧軽減措置が取れ
ないという問題があった。
That is, FIG. 2 shows the AGC voltage formed in one horizontal period at the boundary between the equalization pulse period and the vertical synchronization pulse period in the vertical retrace period, and the detection output output from the detection circuit 2 during this period. vO is charged with an equalization pulse of 0°04H (period A), discharged during the following slit period B, further charged by applying a vertical synchronization pulse of 0.46H (period D), and then discharged during the following slit period (E). It becomes a discharge waveform. At the beginning of this charging 1fi electric power, a-1, a-, 2
, a-3, and a-4. However, each waveform is a detected voltage waveform with the time constant circuit connected. If this sag occurs in a large amount, the AGC voltage VA
Large fluctuations in GC can cause synchronization instability and brightness gradients, and even if the amount generated is small, it is extremely harmful to checking and correcting broadcasting station transmission conditions and radio wave conditions due to disturbances such as ghosts. However, there was a problem in that effective suppression measures could not be taken.

このサグをなくすためには、充電時定数も放電特定数も
長い方が好ましいが、同期信号の期間は映像信号期間よ
り短いため結局充電時は短く放電時は長くする方法が最
大の得策であった。
In order to eliminate this sag, it is preferable to have a long charging time constant and a long discharge specific number, but since the synchronization signal period is shorter than the video signal period, the best solution is to shorten charging time and lengthen discharging time. Ta.

(発明の目的〕 本発明は、上述した点に鑑みてなされたもので、ピーク
値形AGC方式によりAGC電圧を検出する場合に、そ
のAGC電圧に重畳される不要なサグを軽減して輝度に
むらのない映像を得るようにした自動利得制御回路を提
供するものである。
(Object of the Invention) The present invention has been made in view of the above-mentioned points, and when detecting an AGC voltage using a peak value type AGC method, the unnecessary sag superimposed on the AGC voltage is reduced and brightness is improved. The present invention provides an automatic gain control circuit capable of obtaining a uniform image.

(発明の概要〕 すなわち、本発明では、夫々独立の時定数を具備した複
数の比較検出回路13−1.13−2を配設し、且つ外
部のコントロールパルスVcにより前記比較検出回路1
3−1.13−2を切換自在とし、特定期間のみ他の期
間よりも充分長い時定数の比較検出回路の方を選択する
ようにして、前記した各充放電の初期で過渡的に生ずる
サグを軽減した。
(Summary of the Invention) That is, in the present invention, a plurality of comparison detection circuits 13-1 and 13-2 each having an independent time constant are provided, and the comparison detection circuit 1 is controlled by an external control pulse Vc.
3-1.13-2 can be freely switched, and a comparison detection circuit with a sufficiently longer time constant is selected for a specific period than for other periods, thereby eliminating the sag that occurs transiently at the initial stage of each charge/discharge described above. reduced.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明を第3図以下の図面に基づいてその実施例
を説明する。
Hereinafter, embodiments of the present invention will be described based on the drawings from FIG. 3 onwards.

第3図は、本発明を示す実施例のブロック図であり、第
4図は第3図の実施例に使用する検波出力からAGC電
圧を得る回路を示す。
FIG. 3 is a block diagram of an embodiment showing the present invention, and FIG. 4 shows a circuit for obtaining an AGC voltage from the detection output used in the embodiment of FIG.

第3図の構成を説明すると、入力信号V+は、前段増幅
回路11に入力し、ここで増幅された出力を映像検波回
路12に入力して検波した後、その検波出力VOを次段
の映像増幅段へ出力する一方、この検波出力VOを複数
、この場合は第1゜第2の比較検出回路13−1.13
−2に入力する。
To explain the configuration of FIG. 3, the input signal V+ is input to the preamplifier circuit 11, the output amplified here is input to the video detection circuit 12 for detection, and the detected output VO is sent to the next stage video. While outputting to the amplification stage, this detection output VO is output to a plurality of, in this case, the first and second comparison detection circuits 13-1.13.
-2.

又、同期信号レベル(又はペデスタレベル)に応じた電
圧であるところの制御用基準バイアス電圧14、即ち基
準電圧■rを上記比較検出回路13−1.13−2に夫
々印加しておく。第1.第2比較検出回路13−1.1
3−2の出力は切換回路15内の各々のターミナル15
−1.15−2に接続してあり、期間限定コントロール
パルスVc  (以下コントロールパルスという)によ
って第1又は第2比較検出回路13−1.13−2の出
力を切換え、且つその選択出力を前段増幅回路11へA
GC電圧出力VAGCとして供給する。
In addition, a control reference bias voltage 14, ie, a reference voltage (r), which is a voltage corresponding to the synchronization signal level (or pedestal level), is applied to each of the comparison detection circuits 13-1 and 13-2. 1st. Second comparison detection circuit 13-1.1
The output of 3-2 is connected to each terminal 15 in the switching circuit 15.
-1.15-2, the output of the first or second comparison detection circuit 13-1.13-2 is switched by the limited time control pulse Vc (hereinafter referred to as control pulse), and the selected output is connected to the previous stage. A to amplifier circuit 11
GC voltage output is supplied as VAGC.

このコントロールパルスVcは例えばサグが発生したと
きの同期信号を遅延して例えば1水平期間にパルスを呈
するように得ることができる。
This control pulse Vc can be obtained, for example, by delaying a synchronizing signal when a sag occurs so as to exhibit a pulse in one horizontal period, for example.

上記AGC電圧VAGCを形成する13−1゜13−2
の具体的構成は、第4図において、共通エミッタ接地し
た一対の第1.第2トランジスタ21.22と、第1ト
ランジスタ21のコレクタに接続した検波用ダイオード
23と、このダイオード23のカソードに接続した第1
時定数回路24で構成してあり、第1時定数回路24は
所定値の放電抵抗25と充電容量26の並列回路である
13-1°13-2 forming the above AGC voltage VAGC
The specific structure of the first . A second transistor 21,22, a detection diode 23 connected to the collector of the first transistor 21, and a first detection diode 23 connected to the cathode of this diode 23.
It is composed of a time constant circuit 24, and the first time constant circuit 24 is a parallel circuit of a discharge resistor 25 of a predetermined value and a charging capacitor 26.

又、第2比較検出回路13−2も上記第1比較検出回路
13−1と同一構成であって、第3及び第4トランジス
タ27.28と、検波用ダイオード29と、第2時定数
回路30で構成してあり、第2時定数回路30は上記第
1時定数回路24の時定数より長い時定数の放電抵抗3
1と充電容量32の並列回路である。
Further, the second comparison detection circuit 13-2 has the same configuration as the first comparison detection circuit 13-1, and includes third and fourth transistors 27, 28, a detection diode 29, and a second time constant circuit 30. The second time constant circuit 30 includes a discharge resistor 3 having a time constant longer than the time constant of the first time constant circuit 24.
1 and a charging capacity 32 in parallel.

上記各比較検出回路13−1.13−2の第1゜第3ト
ランジスタ21.27の各ベースには検波出力Voを入
力する一方、第2.第41−ランジスタ22.28の各
ベースに制御用基準バイアス電圧(直流定電源回路)1
4から基準電圧Vrを印加しである。尚、対をなす第1
.第2トランジスタ2’1.22及び第3.第4トラン
ジスタ27゜28はエミッタから電流源33.34を供
給される。
The detection output Vo is input to each base of the first and third transistors 21 and 27 of the comparison and detection circuits 13-1 and 13-2, while the second and third transistors 21 and 27 of the comparison and detection circuits 13-1 and 13-2 receive the detection output Vo at their respective bases. 41st - Control reference bias voltage (DC constant power supply circuit) 1 for each base of transistor 22.28
4, the reference voltage Vr is applied. In addition, the first pair
.. the second transistor 2'1.22 and the third transistor 2'1.22; The fourth transistor 27, 28 is supplied with a current source 33, 34 from its emitter.

さらに、第1.第3トランジスタ21.27の負荷抵抗
35.36によって出力化したコレクタ出力は前記ダイ
オード23.29を介して次段の切換回路15に入力す
る。この切換回路15は、前記コレクタ出力が夫々ベー
スに印加される一対のトランジスタ37.38と、その
エミッタに接続したダイオード39.40及び電流源4
1を介してエミッタ接地した一対のトランジスタ42゜
43と、前記ダイオード39.40のアノードにベース
を接続したスイッチングトランジスタ44で構成してあ
り、前記トランジスタ43のベースに前記、したコント
ロールパルスVcを印加し、他方のトランジスタ42の
ベースには基準バイアスVrsを印加しである。また、
電源端子45とダイオード39.40のアノード間には
電流源46゜トランジスタ44のエミッタと接地間には
電流源47を設けである。
Furthermore, the first. The collector output output by the load resistor 35.36 of the third transistor 21.27 is input to the next stage switching circuit 15 via the diode 23.29. This switching circuit 15 includes a pair of transistors 37 and 38 to which the collector outputs are applied to their bases, a diode 39 and 40 connected to their emitters, and a current source 4.
1, and a switching transistor 44 whose base is connected to the anode of the diode 39, 40, and the control pulse Vc is applied to the base of the transistor 43. However, the reference bias Vrs is applied to the base of the other transistor 42. Also,
A current source 46° is provided between the power supply terminal 45 and the anodes of the diodes 39 and 40, and a current source 47 is provided between the emitter of the transistor 44 and ground.

上記構成において、コントロールパルスVCの値と、前
記基準バイアスVrsとの関係が、VC<VrSの時は
第1比較検出回路13−1の外付回路である第1時定数
回路24で決定されるAGC出力電圧が得られ、VC>
VrSの時は第2時定数回路30で決定されるAGC出
力電圧が切換選択されて得られものである。
In the above configuration, the relationship between the value of the control pulse VC and the reference bias Vrs is determined by the first time constant circuit 24, which is an external circuit of the first comparison detection circuit 13-1, when VC<VrS. The AGC output voltage is obtained and VC>
When the voltage is VrS, the AGC output voltage determined by the second time constant circuit 30 is obtained by being selectively selected.

即ち、第4図において、ダイオード23.29の各カソ
ードに導出される第5図(C)、第5図(d )の検波
出力VS 1+ V” 2波形(第5図(C)は第2図
(a )に相当)を選択する。この場合、トランジスタ
43がコントロールパルスVCの電圧によってコレクタ
電流を流すとトランジスタ38に加わえられているダイ
オード29の検出電圧(第5図d)をトランジスタ38
→ダイオード40→トランジスタ44を通して出力する
That is, in FIG. 4, the detection output VS 1+V''2 waveform of FIG. 5(C) and FIG. 5(d) derived to each cathode of the diode 23. In this case, when the transistor 43 causes the collector current to flow due to the voltage of the control pulse VC, the detected voltage of the diode 29 (FIG. 5d) applied to the transistor 38 is selected.
→Output through diode 40 →transistor 44.

コントロールパルスVCのない期間はトランジスタ42
か電流源41の電流をトランジスタ37に供給し、ダイ
オード23の検波出力VS+(第5図C)が選択され、
ΔGG電圧VAGCとして導出される。こうして切換選
択された合成検波電圧波形即ちAGC電圧VAGC(第
5図a)は例えばサグa−2(第2図参照)を生ずる抵
抗25゜容量26の放電時定数よりコントロールパルス
VCによって選択された検波出力VS2の放電時定数が
長いため、放電期間Bのレベルは均一化される。また、
次の充電期間りはコンデンサ32によって充電時定数が
長くされているため過渡期のサグa−3を生ずることは
なく、滑らかな電圧となる。
During the period when there is no control pulse VC, the transistor 42
The current from the current source 41 is supplied to the transistor 37, and the detection output VS+ (FIG. 5C) of the diode 23 is selected.
The ΔGG voltage is derived as VAGC. The composite detection voltage waveform, that is, the AGC voltage VAGC (Fig. 5a) selected in this way is selected by the control pulse VC from the discharge time constant of the resistor 25° and capacitor 26, which produces, for example, sag a-2 (see Fig. 2). Since the discharge time constant of the detection output VS2 is long, the level during the discharge period B is made uniform. Also,
During the next charging period, since the charging time constant is lengthened by the capacitor 32, the sag a-3 during the transition period does not occur, and the voltage becomes smooth.

このような検波出力VS1.VS2を切換選択して出力
されるAGC電圧VA(、C(第5図a)は変動が少な
く、かつ−1常に同期信号レベルを検出した十分なAG
C動作を行うことのできる波形となる。これによって輝
度にむらのない映像を提供するものである。尚、第5図
は第2図と同様期間の動作波形を示し、第5図(1) 
)はコントロールパルスを示すものである。
Such a detection output VS1. The AGC voltage VA(,C (Figure 5a)) output by switching VS2 has little fluctuation, and -1 is sufficient to detect the synchronizing signal level at all times.
The waveform is such that the C operation can be performed. This provides images with even brightness. Incidentally, Fig. 5 shows the operating waveforms during the same period as Fig. 2, and Fig. 5 (1)
) indicates a control pulse.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、所定期間毎に対応し
て、コントロールパルスVCをして夫々独立した複数の
時定数回路を選択づることによって、サグを極めて軽減
するAGC検出電圧が得られ、大部分の期間を占めるサ
グのない期間の特性に悪影彎を与えることがないため、
理想的な映像を得ることができる。
As described above, according to the present invention, by applying a control pulse VC to select a plurality of independent time constant circuits corresponding to each predetermined period, an AGC detection voltage that greatly reduces sag can be obtained. , since it does not affect the characteristics of the period without sag, which occupies most of the period,
You can get ideal images.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のAGC回路のブロック図、第2図(a 
)は第1図の回路で得られる検波出力波形を丞す波形図
、第2図(b)は同AGC電圧の波形を示す波形図、第
3図は本発明の実施例に係るAGC回路のブロック図、
第4図は第3図の具体的回路を示す回路図、第5図(a
)は本発明により得られるAGC電圧波形を示す波形図
、第5図(b)′はコントロールパルスを示す波形図、
第5図(c 、)、、  (d )は選択切換される検
出電圧波形を示す波形図である。 11・・・前段増幅回路、12・・・検波回路、13−
1、.13−2・・・比較検出回路、14・・・制御用
基準バイアス回路、15・・・切換回路、21,22.
27.28.37.38.42.j3・・・トランジス
タ、23,29.39.40・・・ダイオード、24・
・・第1時定数回路、25.31・・・抵抗、26.3
2・・・容量、30・・・第2時定数回路。 代理人jo!J!J−則近憲佑(はが1名)0    
、O −523−
Figure 1 is a block diagram of a conventional AGC circuit, and Figure 2 (a
) is a waveform diagram showing the detected output waveform obtained by the circuit in FIG. 1, FIG. 2(b) is a waveform diagram showing the waveform of the AGC voltage, and FIG. Block Diagram,
Figure 4 is a circuit diagram showing the specific circuit of Figure 3, and Figure 5 (a
) is a waveform diagram showing the AGC voltage waveform obtained by the present invention, FIG. 5(b)' is a waveform diagram showing the control pulse,
FIGS. 5(c) and 5(d) are waveform diagrams showing detected voltage waveforms that are selectively switched. 11... Pre-stage amplifier circuit, 12... Detection circuit, 13-
1. 13-2... Comparison detection circuit, 14... Control reference bias circuit, 15... Switching circuit, 21, 22.
27.28.37.38.42. j3...Transistor, 23,29.39.40...Diode, 24.
...First time constant circuit, 25.31...Resistance, 26.3
2... Capacity, 30... Second time constant circuit. Agent jo! J! J-Kenyu Norichika (1 person) 0
,O-523-

Claims (1)

【特許請求の範囲】[Claims] 映像増幅回路と、この出力を検波する検波回路と、この
検波回路の出力を夫々入力し予め設定した同期信号レベ
ルに応する基準電圧と比較する第1、第2の比較検出回
路と各比較検出回路の出力を期間を特定して発生させた
コントロールパルスによって切換選択する切換回路と、
この切換回路の出力を前記映像増幅回路の利得制御部に
印加する手段とか−らなり、前記第1.第2の比較検出
回路は時定数が夫々異る時定数回路を具備することを特
徴とする自動利得制御回路。
A video amplification circuit, a detection circuit that detects this output, first and second comparison detection circuits that input the outputs of this detection circuit and compare them with a reference voltage corresponding to a preset synchronization signal level, and each comparison detection circuit. a switching circuit that switches and selects the output of the circuit using a control pulse generated in a specified period;
and means for applying the output of the switching circuit to the gain control section of the video amplification circuit, the first. An automatic gain control circuit characterized in that the second comparison detection circuit includes time constant circuits each having a different time constant.
JP13122082A 1982-07-29 1982-07-29 Automatic gain control circuit Pending JPS5922488A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13122082A JPS5922488A (en) 1982-07-29 1982-07-29 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13122082A JPS5922488A (en) 1982-07-29 1982-07-29 Automatic gain control circuit

Publications (1)

Publication Number Publication Date
JPS5922488A true JPS5922488A (en) 1984-02-04

Family

ID=15052837

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13122082A Pending JPS5922488A (en) 1982-07-29 1982-07-29 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS5922488A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4628362A (en) * 1985-05-02 1986-12-09 American Dynamics Corporation Combined video AGC and digitizing circuit
US5546136A (en) * 1993-02-19 1996-08-13 Fujitsu Limited Information processing unit for modifying gain in a frequency band of a video signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4628362A (en) * 1985-05-02 1986-12-09 American Dynamics Corporation Combined video AGC and digitizing circuit
US5546136A (en) * 1993-02-19 1996-08-13 Fujitsu Limited Information processing unit for modifying gain in a frequency band of a video signal

Similar Documents

Publication Publication Date Title
US4811101A (en) Black level correction circuit for correcting black level of a video signal
US4115812A (en) Automatic gain control circuit
JPH0356513B2 (en)
US2801364A (en) Circuit-arrangement in which a signal is supplied to a control-device
US2615089A (en) Keyed automatic gain control system
FI59901B (en) UTJAEMNINGSKRETS FOER SVARTNIVAON I EN BEHANDLINGSANORDNING FOER VIDEOSIGNALER
US3697883A (en) Automatic gain control circuit
US4327376A (en) Dual phase-control loop horizontal deflection synchronizing circuit
EP0041554A4 (en) Automatic peak beam current leveler system.
US2810825A (en) Automatic gain control means
US4080627A (en) Aperture correction circuitry for a video correction system
JPS5922488A (en) Automatic gain control circuit
US2240593A (en) Television synchronizing and control system
US4069505A (en) Automatic peaking control circuitry for a video processing system
GB2034137A (en) Dual phase-control loop horizontal deflection synchronizing circuit
US2906818A (en) Transistor phase detector circuit
US4216502A (en) Peak detector circuit
US4218708A (en) Keyed AGC circuit
KR890000284B1 (en) Horizon oscillator
US2794067A (en) Keyed automatic gain control circuit compensated for keying pulse amplitude variation
US3495126A (en) Voltage supply
US3441790A (en) Stabilization of television deflection circuits
US2794911A (en) Circuit arrangement for reducing the effect of undesired components in a television signal
US3578900A (en) Video amplifier circuit
JPS5922414A (en) Automatic gain control circuit