JPS59224128A - Plasma treating device - Google Patents

Plasma treating device

Info

Publication number
JPS59224128A
JPS59224128A JP15781183A JP15781183A JPS59224128A JP S59224128 A JPS59224128 A JP S59224128A JP 15781183 A JP15781183 A JP 15781183A JP 15781183 A JP15781183 A JP 15781183A JP S59224128 A JPS59224128 A JP S59224128A
Authority
JP
Japan
Prior art keywords
holder
wafers
wafer
plasma
wall surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15781183A
Other languages
Japanese (ja)
Other versions
JPH0241901B2 (en
Inventor
Tatsu Ito
達 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15781183A priority Critical patent/JPS59224128A/en
Publication of JPS59224128A publication Critical patent/JPS59224128A/en
Publication of JPH0241901B2 publication Critical patent/JPH0241901B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411Constructional aspects of the reactor
    • H01J37/3435Target holders (includes backing plates and endblocks)

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To make the uniformity of film thickness and film quality and mass production compatible with each other by cylindrically constituting a wafer holder and arranging a large number of wafers to be treated along the inner wall surface of the holder. CONSTITUTION:A large number of wafers are arranged to the inner wall surface of a holder 14, and SiH4 gas is fed between a shielding cylinder 12 and the inner wall surface of the holder from a lower section. The holder 14 can be turned while the wafers 16 are fitted to the inside. Not only the number of the wafers charged can be made sharply larger than conventional devices but also the uniformity of film thickness and film qualty is excellent even in one wafer or among a plurality of the wafers.

Description

【発明の詳細な説明】 本発明は、たとえば膜厚及び膜質が均一な堆積膜を大量
の被処理体表面に効果的に形成することのできる改良さ
れたプラズマ処理(化学気相反応)装置゛などに関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides an improved plasma processing (chemical vapor phase reaction) apparatus that can effectively form deposited films with uniform thickness and quality on the surfaces of a large number of objects to be processed. etc.

従来、たとえばプラズマCVD装置としてはいくつかの
タイプのものが提案されているが、そのいずれの装置に
おいてもウェハの如き被処理体が平坦なホルダ表面上に
載置された状態でプラズマ−CVD反応を生じさせて被
処理体表面上に堆積膜を形成するようになっている。こ
のような装置は。
Conventionally, several types of plasma CVD apparatuses have been proposed, but in all of these apparatuses, a plasma-CVD reaction is performed with an object to be processed, such as a wafer, placed on a flat holder surface. A deposited film is formed on the surface of the object to be processed. Such a device.

一度に処iできる被処理体の数が低く制限されるため、
特に大量生産ラインなどで使用するには必ずしも好適で
ないという問題点をもっているう本発明の目的は、膜厚
及びi質の均一性と大量生産性とを両立させうる新規な
プラズマ処理装置を提供することにある。
Since the number of objects that can be treated at one time is limited to a low number,
The present invention has the problem that it is not necessarily suitable for use in a mass production line, etc., but an object of the present invention is to provide a novel plasma processing apparatus that can achieve both uniformity of film thickness and quality and mass productivity. There is a particular thing.

本発明の特徴の1つは、ウニ7%ホルダを円筒状に構成
した点にある。このような円筒状ホルダの内部にはプラ
ズマ反応発生機構が配置される。そして、ホルダの内壁
面に沿って多数の被処理ウェハが配置されるうこのよう
にすると、膜厚・膜質の均一性をそこなうことなく大量
処理が可能になる。
One of the features of the present invention is that the sea urchin 7% holder is configured in a cylindrical shape. A plasma reaction generating mechanism is arranged inside such a cylindrical holder. By arranging a large number of wafers to be processed in a cylindrical manner along the inner wall surface of the holder, it becomes possible to process a large number of wafers without impairing the uniformity of film thickness and film quality.

次に、添付図面に示す実施例について本発明を詳述する
The invention will now be described in detail with reference to embodiments illustrated in the accompanying drawings.

第1図は1本発明の第1の実施例によるプラズマCVD
装置を示すもので、10は、ガス吹出孔tOaを有し内
部にN、ガスが矢印の方向に流通されるガス導入管、1
2はガス流通孔12aを有する円筒状の高周波シールド
筒、14は円筒状のウェハホルダであり、これらガス導
入管1o、シールド筒12及びホルダ14は同軸的に配
置されている。ホルダ14の内壁面には多数のウェハ(
例えばシリコンウェハ)が配置すれ、 ’/ −/l/
 )−筒12とホルダ内壁面との間には下方から5iT
(4ガスが供給されるようになっている。ボルダ14は
、内部にウェハ16を装着したまま後述のCVDプロセ
スの間欠印Rに示す方向に回転しつるようになっている
。ガス導入管lo及びウェハボルダ16の各々の周囲に
はコイル18及び22がそれぞれ巻回されており、各々
のコイル18.22には高周波を源20.24がそれぞ
れ接続されている。
FIG. 1 shows a plasma CVD process according to a first embodiment of the present invention.
10 indicates a gas introduction pipe having a gas blow-off hole tOa and through which N gas flows in the direction of the arrow; 1;
Reference numeral 2 denotes a cylindrical high-frequency shield tube having a gas flow hole 12a, and 14 a cylindrical wafer holder.The gas introduction tube 1o, the shield tube 12, and the holder 14 are arranged coaxially. A large number of wafers (
For example, a silicon wafer) is placed, '/-/l/
)-5iT between the cylinder 12 and the holder inner wall surface from below.
(4 gases are supplied. The boulder 14 is designed to rotate and hang in the direction shown by the intermittent mark R of the CVD process, which will be described later, with the wafer 16 mounted inside. Coils 18 and 22 are wound around each of the wafer boulders 16, and a high frequency source 20.24 is connected to each coil 18.22, respectively.

いま、電源20からの高周波出方によりガス導入管10
内でN2ガスをプラズマ化すると、励起された窒素の原
子や分子が孔10a、12aを介シテウェハ12の表面
に到達し、そこテ5iH4ト反応し、ウェハ12上には
シリコンナイトライド< s i3N4 )の堆積層を
得ることができる。このよ5な堆積処理の前または後に
は、@源24の高周波出力を用いてホルダ14の内側で
フレオンガスをプラズマ化してプラズマエツチングを実
施し。
Now, due to the high frequency output from the power supply 20, the gas introduction pipe 10
When N2 gas is turned into plasma within the wafer 12, excited nitrogen atoms and molecules reach the surface of the wafer 12 through the holes 10a and 12a, where they react with 5iH4, and silicon nitride < s i3N4 is formed on the wafer 12. ) can be obtained. Before or after these five deposition processes, plasma etching is performed by converting Freon gas into plasma inside the holder 14 using the high frequency output of the @ source 24.

それによって内部を清浄化することができる、第1図の
装置においては1円筒状ホルダ14の内壁面に沿ってウ
ェハを配置するようにしたので。
In the apparatus shown in FIG. 1, the wafer is arranged along the inner wall surface of the cylindrical holder 14, thereby making it possible to clean the inside.

ウェハのチャージ枚数を従来装置に比べて大幅に増大さ
せることができる上、膜厚、膜質の均一性は−ウエハ内
でも複数ウェハ間でも良好である。
The number of wafers charged can be greatly increased compared to conventional devices, and the uniformity of film thickness and film quality is good both within a wafer and between multiple wafers.

このような膜厚、膜質の均一性は、ウエノ・ホルダ14
を回転させることと相俟って、多数の孔10a。
Such uniformity in film thickness and film quality is achieved by Ueno Holder 14.
In conjunction with the rotation of the holes 10a.

12aを分布させることにより一層改善される。Further improvement is achieved by distributing 12a.

また、ウェハ12は直接プラズマにさらされることがな
いので、プラズマ中の電子の衝撃などによりダメージを
受けることが殆んどない。さらにN、ガスとSiH4ガ
スとを分離して導入しているので、N、とSiH,とが
同時にプラズマ化されず、従って堆積膜中に不要な誘導
生成物(例えばSis )(s * S i @ N5
など、これは同時プラズマ化により生ずることが多い)
が混入し℃膜質な悪化させることがなく、良質のシリコ
ンナイトライド膜を得ることができる。
Further, since the wafer 12 is not directly exposed to plasma, it is hardly damaged by the impact of electrons in the plasma. Furthermore, since the N gas and the SiH4 gas are introduced separately, N and SiH are not turned into plasma at the same time, and therefore unnecessary induced products (for example, Sis) (s * Si @N5
(This is often caused by simultaneous plasma transformation)
It is possible to obtain a high quality silicon nitride film without deteriorating the film quality due to contamination.

第2図は1本発明をキャパシタ型CVD装置に適用した
他の実施例を示すものである。同図において、ガス導入
管を兼ねた内外の電i30,32の間には高周波電源4
0が接続されており、内側電極30のガス吹出孔30a
から吹出されたN。
FIG. 2 shows another embodiment in which the present invention is applied to a capacitor type CVD apparatus. In the same figure, a high frequency power source 4 is connected between the inner and outer electricity pipes 30 and 32, which also serve as gas introduction pipes.
0 is connected, and the gas blowing hole 30a of the inner electrode 30
N was blown out.

ガスをプラズマ化しつるようになっている。外側電極3
2のガス吹出孔32aからは放射状にSiH。
It is designed to turn gas into plasma. Outer electrode 3
SiH flows radially from the gas blow-off holes 32a of No.2.

ガスが吹出されるようになっており、外側を極32の外
側には、これを取囲むように、矢印R方向に回転自在な
円筒状のウェハホルダ34が設けられている。ホルダ3
4の内壁面には前述側同様多数の被処理ウェハ36が配
置されているうt極30゜32間に発生されるプラズマ
により励起された窒素の原子又は分子は矢印EAに示す
ようにt極32に設けた多数の貫通孔32Aを介してウ
ェハ12側へ到達し、そこでSiH,と反応してシリコ
ンナイトライド堆積を生じさせ5る。
Gas is blown out, and a cylindrical wafer holder 34 rotatable in the direction of arrow R is provided outside the pole 32 so as to surround it. Holder 3
A large number of wafers 36 to be processed are placed on the inner wall surface of the t-pole 30 and 32.Nitrogen atoms or molecules excited by the plasma generated between the t-poles 30 and 32 move to the t-pole as shown by the arrow EA. It reaches the wafer 12 side through a large number of through holes 32A provided in 32, and reacts with SiH there to cause silicon nitride deposition.

第2図の装置もウェハホルダ34が筒状になっているこ
とにより膜厚・膜質の均一性をそこなうことなく大量の
ウェハを一括して被膜付着処理しうるものであり、その
龍笛1図の装置と同様の作用効果を奏するものであろう 以上1本発明をいくつかの実施例について述べたが、本
発明は、上記実施例に限定されることなく1種々の改変
形態において実施できるものである。例えば、上記実施
例では装置が全体として縦形であったが、これは横形に
することもでき、それによってウェハホルダを横方向に
一層長(してさらにウェハチャージ枚数を増大させ5る
ようにしてもよいう
The apparatus shown in Fig. 2 also has a cylindrical wafer holder 34, so that a large number of wafers can be coated at once without impairing the uniformity of film thickness and film quality. Although the present invention has been described above with reference to several embodiments, the present invention is not limited to the above-mentioned embodiments and can be implemented in various modified forms. . For example, although the apparatus was generally vertical in the above embodiments, it could also be horizontal, thereby making the wafer holder longer in the lateral direction (and thus increasing the number of wafers charged). good

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は1木兄°明の一実施例によるプラズマCVD装
置を示す要部縦断面図、第2図は1本発明の他の実施例
によるプラズマCVD装置を示″f′要部横断面図であ
ろう 符号の説明 10・・・ガス導入管、12・・・高周波シールド筒。 14・・・ウェハホルダ、16・・・ウェハ、18.2
2・・・コイル、30.32・・・ガス導入管兼′RL
極、34・・・ウェハホルダ、36・・・+7.1/S
つ第  1  図 A/、7 143− 第  2  図
FIG. 1 is a vertical cross-sectional view of a main part of a plasma CVD apparatus according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a main part of a plasma CVD apparatus according to another embodiment of the present invention. Explanation of symbols in the figure 10...Gas introduction tube, 12...High frequency shield tube. 14...Wafer holder, 16...Wafer, 18.2
2...Coil, 30.32...Gas introduction pipe and 'RL
Pole, 34...Wafer holder, 36...+7.1/S
Figure 1 A/, 7 143- Figure 2

Claims (1)

【特許請求の範囲】 1、  ial  被処理体をほぼ中心方向に向けて、
その壁面にそって保持するほぼ筒状のホルダfbl  
上記ホルダ内部に設けられたプラズマ発生部 。 よりなり、上記ホルダの被処理体保持領域と上記プラズ
マ発生領域は間隔をおいて設けられたことを特徴とする
プラズマ処理装置う
[Claims] 1. ial With the object to be treated approximately toward the center,
A nearly cylindrical holder fbl held along the wall surface
A plasma generating section provided inside the holder. The plasma processing apparatus is characterized in that the object holding area of the holder and the plasma generation area are spaced apart from each other.
JP15781183A 1983-08-31 1983-08-31 Plasma treating device Granted JPS59224128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15781183A JPS59224128A (en) 1983-08-31 1983-08-31 Plasma treating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15781183A JPS59224128A (en) 1983-08-31 1983-08-31 Plasma treating device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP52005932A Division JPS5931977B2 (en) 1977-01-24 1977-01-24 Plasma CVD equipment

Publications (2)

Publication Number Publication Date
JPS59224128A true JPS59224128A (en) 1984-12-17
JPH0241901B2 JPH0241901B2 (en) 1990-09-19

Family

ID=15657804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15781183A Granted JPS59224128A (en) 1983-08-31 1983-08-31 Plasma treating device

Country Status (1)

Country Link
JP (1) JPS59224128A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5141031A (en) * 1974-10-05 1976-04-06 Tomota Fukuda SETSUCHAKUZA ISOSEIBUTSU

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5141031A (en) * 1974-10-05 1976-04-06 Tomota Fukuda SETSUCHAKUZA ISOSEIBUTSU

Also Published As

Publication number Publication date
JPH0241901B2 (en) 1990-09-19

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