JPS59215107A - Temperature compensation type variable resistance attenuation circuit - Google Patents

Temperature compensation type variable resistance attenuation circuit

Info

Publication number
JPS59215107A
JPS59215107A JP8969583A JP8969583A JPS59215107A JP S59215107 A JPS59215107 A JP S59215107A JP 8969583 A JP8969583 A JP 8969583A JP 8969583 A JP8969583 A JP 8969583A JP S59215107 A JPS59215107 A JP S59215107A
Authority
JP
Japan
Prior art keywords
voltage
circuit
temperature
output
potentiometer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8969583A
Other languages
Japanese (ja)
Other versions
JPS646562B2 (en
Inventor
Toshimitsu Inuzuka
犬塚　俊光
Takeshi Hayasaka
早坂　赳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8969583A priority Critical patent/JPS59215107A/en
Publication of JPS59215107A publication Critical patent/JPS59215107A/en
Publication of JPS646562B2 publication Critical patent/JPS646562B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/54—Modifications of networks to reduce influence of variations of temperature
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/24—Frequency- independent attenuators
    • H03H7/25—Frequency- independent attenuators comprising an element controlled by an electric or magnetic variable
    • H03H7/253—Frequency- independent attenuators comprising an element controlled by an electric or magnetic variable the element being a diode

Landscapes

  • Attenuators (AREA)

Abstract

PURPOSE:To make the effect of temperature compensation unchanged even if a position of a slider of a potentiometer is changed by providing an adder circuit adding an output voltage of a gain variable amplifier to a control voltage and compensating the temperature of a control voltage at a control terminal by means of an output of a DC bias voltage generating circuit. CONSTITUTION:A terminal voltage of a diode 3 is branched and given to an amplifier 8 whose gain is variable, its output voltage is led to one input of an adder circuit 9 and an output of a potentiometer 6 dividing a voltage of a power supply 5 is led to the other input. Then, a voltage summing output of the circuit 9 is used for a control voltage given to a control terminal 1k of a constant impedance resistance attenuator 1. The attenuation of the attenuator 1 is controlled by the control voltage given to the terminal 1k and the output of the potentiometer 6 is added with the output of the amplifier 8 so as to form the control voltage. Thus, since the attenuation is controlled by adjusting the potentiometer 6 and a voltage from temperature compensation is given from the amplifier 8 wherever the set point of the potentiometer 6 may be, the temperature is compensated while keeping the control voltage to a constant value.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、ＰＩＮダイオードを用いた定インピーダンス
形の可変抵抗減衰回路に関する。特に、ＰＩＮダイオー
ドに与えるバイアス電圧を温度補償型にした可変抵抗減
衰回路の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a constant impedance type variable resistance attenuation circuit using a PIN diode. In particular, the present invention relates to an improvement in a variable resistance attenuation circuit in which the bias voltage applied to the PIN diode is temperature-compensated.

［従来技術の説明〕 第１図は従来例回路の構成図である。高周波信号は定イ
ンピーダンス抵抗減衰器１の入力端子１ａに与えられ、
減衰を受けて出力端子１ｂに送出される。この定インピ
ーダンス抵抗減衰器１番ま橋ｗＩＴ形であり、その直列
アームにはＰＩＮダイオードＩＣが挿入され、並列アー
ムにはＰＩＮダイオード１ｄが挿入されている。このＰ
ＩＮダイオ−Ｉ”　Ｉ　Ｃおよび１ｄの直流回路はコイ
ル１ｆおよび１ｇにより直列に接続され、そのバイアス
電圧は電源端子１ｈから与えられる。この電源端１ｈに
バイアス電圧を与えるバイアス電圧発生回路は、定電流
回路２により駆動され、周囲温度を検出してその温度に
より内部抵抗値の変化するダイオード３の端子電圧を増
幅器４により増幅するように構成されている。コイル１
ｆおよび１ｇの接続点は制御端子１ｋに接続され、この
制御端子１ｋには電源５の電圧をポテンシオメータ６で
分岐した電圧が与えられている。電源５には直列に温度
補償用のサーミスタ７が挿入されている。[Description of Prior Art] FIG. 1 is a block diagram of a conventional circuit. The high frequency signal is given to the input terminal 1a of the constant impedance resistance attenuator 1,
The signal is attenuated and sent to the output terminal 1b. This constant impedance resistor attenuator is of the bridge wIT type, with a PIN diode IC inserted into its series arm, and a PIN diode 1d inserted into its parallel arm. This P
The DC circuits of IN diode I" IC and 1d are connected in series by coils 1f and 1g, and the bias voltage is given from the power supply terminal 1h. The bias voltage generation circuit that gives the bias voltage to this power supply terminal 1h is The coil 1 is driven by a current circuit 2, detects the ambient temperature, and amplifies the terminal voltage of a diode 3 whose internal resistance value changes depending on the temperature using an amplifier 4.
The connection point between f and 1g is connected to a control terminal 1k, and a voltage obtained by branching the voltage of a power source 5 by a potentiometer 6 is applied to this control terminal 1k. A thermistor 7 for temperature compensation is inserted in series with the power supply 5.

このような従来例回路では、ポテンシオメータ６を変化
させると、ＰＴＮダイオードＩＣおよび１ｄのバイアス
電圧が変化して、入力端子１ａから出力端子１ｂに至る
高周波信号の減衰量が変化する。電源端子１ｈに与える
バイアス電圧は温度の変化に応じて、ＰＩＮダイオード
ＩＣおよび１ｄの特性を補償するように温度補償が施さ
れている。制御端子１ｋに与える制御電圧もサーミスタ
７により温度補償が施されているが、この号−ミスタフ
は単に電源５に直列に接続されているので、その温度補
償の効果は、ポテンシオメータ６の位置により相違する
ことになる欠点がある。In such a conventional circuit, when the potentiometer 6 is changed, the bias voltage of the PTN diode IC and 1d is changed, and the amount of attenuation of the high frequency signal from the input terminal 1a to the output terminal 1b is changed. The bias voltage applied to the power supply terminal 1h is subjected to temperature compensation so as to compensate for the characteristics of the PIN diode IC and 1d according to temperature changes. The control voltage applied to the control terminal 1k is also temperature-compensated by the thermistor 7, but since this mistuff is simply connected in series with the power supply 5, the temperature compensation effect depends on the position of the potentiometer 6. There are drawbacks that make them different.

〔発明の目的〕[Purpose of the invention]

本発明は利得制御用のポテンシオメータの位置により、
温度補償効果の相違することのない可変抵抗減衰回路を
提供することを目的とする。また、本発明は制御電圧の
温度補償を行うための温度補償用サーミスタを不要にす
る可変抵抗減衰回路を提供することを目的とする。In the present invention, depending on the position of the potentiometer for gain control,
It is an object of the present invention to provide a variable resistance attenuation circuit with no difference in temperature compensation effect. Another object of the present invention is to provide a variable resistance attenuation circuit that eliminates the need for a temperature compensation thermistor for temperature compensation of a control voltage.

〔発明の特徴〕[Features of the invention]

本発明は、直流バイアス電圧発生回路の温度補償された
電圧を分岐して入力とする利得可変増幅器と、この利得
可変増幅器の出力電圧を上記制御電圧に加算する加算回
路とを備え、制御端子の温度補償をも直流バイアス電圧
発生回路の出力で行い、サーミスタを不要とするととも
に、ポテンシオメータの位置が変化しても温度補償の効
果が変化しないように構成されたことを特徴とする。The present invention includes a variable gain amplifier that branches the temperature-compensated voltage of a DC bias voltage generation circuit and inputs it, and an adder circuit that adds the output voltage of the variable gain amplifier to the control voltage. Temperature compensation is also performed using the output of the DC bias voltage generation circuit, eliminating the need for a thermistor, and the device is characterized in that it is constructed so that the effect of temperature compensation does not change even if the position of the potentiometer changes.

〔実施例による説明〕[Explanation based on examples]

第２図は本発明実施例回路構成図である。定インピーダ
ンス抵抗減衰器１の入力端子１ａには高周波信号が入力
し、減衰を受けて出力端子１ｂに送出される。この定イ
ンピーダンス抵抗減衰器は橋絡１’形の可変抵抗減衰器
で、その電源端子１ｈには直流バイアス電圧が与え、ら
れ、制御端子１ｋには制御電圧が与えられる。FIG. 2 is a circuit configuration diagram of an embodiment of the present invention. A high frequency signal is input to the input terminal 1a of the constant impedance resistance attenuator 1, and is attenuated and sent to the output terminal 1b. This constant impedance resistance attenuator is a bridge 1' type variable resistance attenuator, and a DC bias voltage is applied to its power supply terminal 1h, and a control voltage is applied to its control terminal 1k.

直流バイアス電圧発生回路は、定電流回路２により定電
流か与えられたダイオード２と、その端子電圧を増幅す
る増幅器４により構成される。ダイオード２はその温度
特性が定インピーダンス抵抗減衰器１のＰＩＮダイオー
ド１ｃおよび１ｄとほぼ等しいものが選ばれ、増幅器４
はそのダイオード３の端子電圧を２倍に増幅してバイア
ス電圧とするように構成される。この２倍の値は、２個
のＰＩＮダイオード１ｃおよび１ｄが直流回路としては
直列に接続されているからである。The DC bias voltage generation circuit includes a diode 2 to which a constant current is applied by a constant current circuit 2, and an amplifier 4 that amplifies the terminal voltage of the diode 2. The diode 2 is selected to have almost the same temperature characteristics as the PIN diodes 1c and 1d of the constant impedance resistance attenuator 1, and the amplifier 4
is configured to amplify the terminal voltage of the diode 3 twice and use it as a bias voltage. This double value is because the two PIN diodes 1c and 1d are connected in series as a DC circuit.

ここで、本発明の特徴とするところは、このダイオード
３の端子電圧を分岐して、利得可変の増幅器８に与え、
その出力電圧を加算回路９の一方の端子に導き、その他
方の端子には電源５の電圧を分岐するポテンシオメータ
６の出力を導き、この加算回路９の電圧加算出力を定イ
ンピーダンス抵抗減衰器１の制御端子１ｋに与える制御
電圧とするところにある。本発明の回路では電源５に直
列にサーミスタを接続する必要がない。Here, the feature of the present invention is that the terminal voltage of this diode 3 is branched and applied to the variable gain amplifier 8,
The output voltage is led to one terminal of the adder circuit 9, the output of the potentiometer 6 that branches the voltage of the power supply 5 is led to the other terminal, and the voltage addition output of the adder circuit 9 is connected to the constant impedance resistor attenuator 1. This is the control voltage applied to the control terminal 1k. In the circuit of the present invention, there is no need to connect a thermistor in series with the power supply 5.

このように構成された回路では、定インピーダンス抵抗
減衰器１のバイアス電圧は従来どおり温度補償されてい
る。この抵抗減衰器１の減衰量は制御端子１ｋに与える
制御電圧により制御されるが、ポテンシオメータ６の出
力には増幅器８の出力が加算されて制御電圧となる。し
たがって、ポテンシオメータ６を変化することにより減
衰量を制御することができるとともに、ポテンシオメー
タ６の位置がどこにあっても、増幅器８から一定の温度
補償用の電圧が与えられているので、ポテンシオメータ
６の位置にかかわらす、制御電圧を一定の状態で温度補
償することができる。温度補償の効果は利得可変増幅器
８の利得を加減することにより任意に設定することがで
きる。In the circuit configured in this way, the bias voltage of the constant impedance resistive attenuator 1 is temperature compensated as before. The amount of attenuation of this resistance attenuator 1 is controlled by a control voltage applied to the control terminal 1k, and the output of the amplifier 8 is added to the output of the potentiometer 6 to form a control voltage. Therefore, the amount of attenuation can be controlled by changing the potentiometer 6, and a constant temperature compensation voltage is applied from the amplifier 8 regardless of the position of the potentiometer 6. Regardless of the position of 6, the control voltage can be temperature compensated in a constant state. The effect of temperature compensation can be arbitrarily set by adjusting the gain of the variable gain amplifier 8.

第３図は本発明実施例回路の特性図である。端子１ｋに
与える制御電圧に対して、入力端子１ａから出力端子１
ｂに至る高周波信号の減衰量をｄＢで示す。高周波信号
の周波数は１．７　ＧＨｚである。FIG. 3 is a characteristic diagram of a circuit according to an embodiment of the present invention. For the control voltage applied to terminal 1k, the voltage from input terminal 1a to output terminal 1
The amount of attenuation of the high frequency signal reaching b is shown in dB. The frequency of the high frequency signal is 1.7 GHz.

減衰量４〜１８ｄＢの範囲で制御電圧に対して減衰量が
よい直線性を示す。The attenuation shows good linearity with respect to the control voltage in the attenuation range of 4 to 18 dB.

上記例は増幅器８の入力を増幅器４の入力側から得るよ
うに説明したが、これは増幅器４の出力側から得るよう
に構成することもできる。In the above example, the input of the amplifier 8 was explained as being obtained from the input side of the amplifier 4, but it can also be configured to be obtained from the output side of the amplifier 4.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば制御電圧を温度補
償するだめのサーミスタを省くことができるとともに、
制御電圧の値すなわち制御電圧を与えるポテンシオメー
タの位置により温度補償の効果が変化するようなことが
なく、一定の状態で温度補償を行うことができる優れた
特性の可変抵抗減衰回路が得られる。As explained above, according to the present invention, it is possible to omit a thermistor for temperature compensating the control voltage, and
The temperature compensation effect does not change depending on the value of the control voltage, that is, the position of the potentiometer that applies the control voltage, and a variable resistance attenuation circuit with excellent characteristics that can perform temperature compensation in a constant state can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来例回路の構成図。 第２図は本発明実施例回路の構成図。 第３図は本発明実施例回路の特性図。 １・・・定インピーダンス抵抗減衰器、２・・・定電流
回路、３・・・温度特性がＰＩＮダイオードにほぼ等し
いダイオード、４・・・利得が２である増幅器、５・・
・電源、６・・・制御電圧を与えるポテンシオメータ、
７・・・サーミスタ、８・・・利得可変増幅器、９・・
・加算回路。 特許出願人　日本電気株式会社 代理人弁理士　井　出　直　孝 蔦　２　図FIG. 1 is a configuration diagram of a conventional circuit. FIG. 2 is a configuration diagram of a circuit according to an embodiment of the present invention. FIG. 3 is a characteristic diagram of a circuit according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Constant impedance resistance attenuator, 2... Constant current circuit, 3... Diode whose temperature characteristics are almost equal to a PIN diode, 4... An amplifier with a gain of 2, 5...
・Power supply, 6... Potentiometer that provides control voltage,
7... Thermistor, 8... Variable gain amplifier, 9...
・Addition circuit. Patent applicant: NEC Corporation Patent attorney Nao Ide Takatsuta 2 Figure

Claims (1)

【特許請求の範囲】[Claims] （１）入力高周波信号に減衰を与えて出力する定インピ
ーダンス抵抗減衰器を備え、 この定インピーダンス抵抗減衰器の直列アームおよび並
列アームにそれぞれＰＩＮダイオードを含み、 このＰＩＮダイオードの直流バイアス電圧は２つのＰＩ
Ｎダイオードについて直列に与えられるように直流バイ
アス回路が構成され、 このＰＩＮダイオードの温度特性に対応するように温度
補償の施された上記直流バイアス電圧を発生ずる直流バ
イアス電圧発生回路を備え、上記２つのＰＩＮダイオー
ドの直流回路の接続点に上記定インピーダンス抵抗減衰
器の減衰量を制御するための制御電圧を与えるように構
成された温度補償型可変抵抗減衰回路において、上記直
流バイアス電圧発生回路の温度補償された電圧を分岐し
て入力とする利得可変増幅器と、この利得可変増幅器の
出力電圧を上記制御電圧に加算する加算回路と を備えたことを特徴とする温度補償型可変抵抗減衰回路
。(1) Equipped with a constant impedance resistance attenuator that attenuates and outputs an input high-frequency signal, and each of the series arm and parallel arm of this constant impedance resistance attenuator includes a PIN diode, and the DC bias voltage of this PIN diode is P.I.
A direct current bias circuit is configured to be applied in series to the N diode, and includes a direct current bias voltage generation circuit that generates the above mentioned direct current bias voltage which is temperature compensated so as to correspond to the temperature characteristics of the PIN diode. In a temperature-compensated variable resistance attenuation circuit configured to apply a control voltage for controlling the amount of attenuation of the constant impedance resistance attenuator to a connection point of a DC circuit of two PIN diodes, the temperature of the DC bias voltage generation circuit A temperature-compensated variable resistance attenuation circuit comprising: a variable gain amplifier that branches a compensated voltage as input; and an adder circuit that adds the output voltage of the variable gain amplifier to the control voltage.
JP8969583A 1983-05-20 1983-05-20 Temperature compensation type variable resistance attenuation circuit Granted JPS59215107A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8969583A JPS59215107A (en) 1983-05-20 1983-05-20 Temperature compensation type variable resistance attenuation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8969583A JPS59215107A (en) 1983-05-20 1983-05-20 Temperature compensation type variable resistance attenuation circuit

Publications (2)

Publication Number Publication Date
JPS59215107A true JPS59215107A (en) 1984-12-05
JPS646562B2 JPS646562B2 (en) 1989-02-03

Family

ID=13977897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8969583A Granted JPS59215107A (en) 1983-05-20 1983-05-20 Temperature compensation type variable resistance attenuation circuit

Country Status (1)

Country Link
JP (1) JPS59215107A (en)

Also Published As

Publication number Publication date
JPS646562B2 (en) 1989-02-03

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