JPS59214916A - Programmable controller for controlling instrumentation - Google Patents

Abstract

PURPOSE:To execute abnormal processing easily by setting up flags in accordance with various abnormality obtained by self-diagnosis and allowing a user to program the setting of heavy and light fault modes by using the flags. CONSTITUTION:The titled controller is constituted of user's program memories 1, 2 for sequence and DDC (direct digital control), a logical operation unit 3, a buffer memory 5 storing data from an I/O circuit 4, a flag register 7 storing the existence of various abnormality, a CPU8 controlling these units, logical circuits 9H, 9W, and various sensors 10. When abnormality is informed as the result of self-diagnosis during the execution of processing, the CPU8 decides the contents and sets up flags F1-F3 in a flag register 7. The unit 3 decides heavy/light faults by using the processing program in the heavy/light fault modes corresponding to the flags F1-F3 which are previously prepared in a part of a memory 1 by the user and outputs the decided results to the external through the logical circuits 9H, 9W.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a programmable controller for instrumentation control, and particularly to abnormality processing in the controller.

This kind of programmable. The controller (PO) not only has a numerical calculation function for instrumentation control and a logic calculation function for sequence control of various devices, but also has an abnormality processing function to ensure reliable functional operation. This abnormality processing is
Self-diagnosis is performed by the controller's 71-ware or software, and when an abnormality is detected in the diagnostic results, a failure mode such as a major failure or a minor failure is determined depending on the content of the abnormality, and the failure mode is displayed, notified, etc. I am trying to get the output of

Here, conventional abnormality processing incorporates logic that uniquely determines a major failure or a minor failure depending on the content of the abnormality for each controller. In this conventional abnormality handling method, the controller is a sequencer that focuses on sequence processing or a DDO (Direct Digital Cable) that focuses on instrumentation processing.
! There is no problem if the application is limited, such as (ontrol), but in the case of a programmable controller with the same level of sequence processing and instrumentation processing, the light and heavy failure modes are uniquely determined for various abnormalities. If it is, it becomes impossible to determine a failure mode that is suitable for the plant or equipment to be controlled, and the user's usability becomes difficult.

For example, if the controller is used in a system that requires a lot of sequence processing to turn on and off generators, pumps, etc., if the status data input section DI or status data output section DO, which is the input/output of the sequence processing, breaks down, The abnormality mode is a serious failure. On the other hand, if the same controller is used in a system that involves a lot of DDO processing, such as chemical injection control for water treatment, a failure of the status data input/output unit/DO will be considered a minor failure as an abnormality mode. . In this way, programmable controllers with the same level of sequence processing and instrumentation processing have drawbacks such as poor usability for users if the controller side uniquely determines the failure mode for various abnormalities. The invention was made in view of the above-mentioned circumstances, and it provides flags in association with various abnormalities self-diagnosed by hardware and software, and allows the user to use the flags to set light and severe failure modes for various abnormalities. The purpose of the present invention is to provide a programmable controller that is programmable so that abnormality processing suitable for the plant or equipment to be controlled can be easily performed.

FIG. 1 is a block diagram of a programmable controller showing one embodiment of the present invention. This controller consists of a sequence user program memory for storing the user's sequence processing contents, a DDO user program memory for storing the user's DDO processing contents, and a logic operation unit that performs sequence processing at high speed. 3 and external status data input/output section. A sequence input/output circuit ≠ reads the status data and outputs the status data O1 to On to external equipment, a buffer memory S stores the input/output data of this input/output circuit l, and DDO input/output data MI to LMIQ. The DDO input/output circuit that exchanges data with the outside, the flag register 7 that stores the presence or absence of various abnormalities, and the 10 PUs that control each block as shown below, outputs failure modes for minor and major failures. It consists of a logic circuit 9H99W and various sensors IO for obtaining abnormality detection signals from external devices such as a fan abnormality display.

0PUjr periodically receives data input 11 from input/output circuit q.
~Eng. Read the buffer memory jK! It's crowded.

This entry is for entering data for all items. Once completed, 1. OP U g instructs the logical operation unit 3 to start the operator. While the logic operation unit 3 is executing the logic operation for the sequence, the OPU♂ reads external information from the input/output circuit 6 according to the program of the DDO user program memory controller, performs a numerical operation for the DDO on the information, and uses this operation result. It is output from the input/output circuit t.

When the logic operation unit J is deceived by the CPU♂ to start the operation, the sequence user program memory/
A sequence program is read from the computer, a mental calculation is performed using the data in the input/output buffer memory S, and the result of this calculation is written into the human output buffer memory S. After performing this operation and writing the result to the end of the user sequence, the logical operation unit J notifies 0PUJ' of the completion of the operation.

The completion of this operation is notified fL,'f? :, OP U g stops numerical calculation for DDO and input/output buffer memory S.
The output information for the sequence is read from the input/output circuit, and the read information is written to the input/output circuit Hiroshi and outputted to the outside. When this output control is completed, 0PUt performs the DDO numerical calculation again, and when the logical calculation unit 3 completes the calculation, it cyclically executes the procedure of starting the output control of the sequence logical calculation result.

Next, abnormality processing will be explained focusing on the flags in the flag register 7.

In this embodiment, the distribution of minor and major failure modes for various abnormalities is determined as shown in the table below.

As shown in the table above, CPU-related abnormalities and logical operation unit abnormalities occur when the usage status of the controller is sequence, DD, etc.
Any case for O is equivalent to a major failure and is set as a fixed major failure mode, and conversely, fan abnormality is set as a fixed minor failure mode. And status DI, Do abnormality and DD
The user can arbitrarily set a light/severe failure mode, which corresponds to a major failure or a minor failure depending on whether the O input/output abnormality controller is mainly used for sequence or DDC. The flags assigned to each abnormality are 'OH' for major failures, FOI for minor failures, and F1 for status DI abnormalities.
1 Assign F, , DDO input/output error 3 to status Do error.

In this sorting of failure modes and assignment of flags, if the OPU, r notifies an abnormality during self-diagnosis by the input/output circuit q or the hardware of Party B while executing any process, the OPU, r will not be notified. If there is an error on the data input (D) side of the input circuit, the flag Flt of flag register 7 is set, and if there is an error on the data output (Do) side, the flag Ft is set, and an error is detected in the input/output circuit B. Now set the flag Fxk. Furthermore, using a processing program for the light/severe failure mode for the flag I'1-ys that is created in advance by the user in a part of the sequence user program memory/, the logical operation unit J is configured to cause a major failure when the flags Fl to F3 are established. Alternatively, a minor failure is determined and a corresponding flag F'ox or FoL is set. The processing completion notification for the light/severe failure mode by the logical operation unit J is OP U t
', and at this time, OPU# is given to logic circuit 9H according to each minor or major failure mode.

A major failure signal output and a minor failure signal output are output to the outside by distributing them to 2W. This logic circuit is determined according to the above table, and a minor failure is not a logical sum condition of fan abnormality and flag FOL, and a major failure is an abnormality of logic operation unit 3 and OPU, ! r
Abnormality (watchdog timer).

(memory parity, etc.) and flag FOH.

FIG. 2 shows an example of a program for determining the light/severe failure mode by logic unit J using an equivalent circuit, and flags F1 or F2.
When the flag F3 is established, the major failure flag Font is set, and when the flag F3 is satisfied, the minor failure flag FOL+ is set. In this example, the program is for when the controller is mainly used for sequences, and when used for DDO, F'o
n and FO! , is reversed.

In either case, the processing program for determining the minor or major failure mode is written in the sequence user program memory, and the user can arbitrarily set the minor or major failure mode, and the program language is similar to other programs for control. Facilitates user setting of failure modes using the same language.

According to this embodiment, depending on the usage status of the controller, such as when the controller is mainly used for sequence processing, when it is used for instrumentation processing, when it is used between both sequence processing and instrumentation processing, etc. The user can arbitrarily set the severity of the failure mode for various abnormalities, and it is possible to handle abnormalities that are suitable for the controlled object. In addition, individual flags are provided for each type of abnormality, and a light/serious failure flag is also provided for each individual flag.This makes it easier for users to develop abnormality processing programs, and allows users to easily determine the light/serious failure mode from various types of abnormalities. It also becomes easier to incorporate control states into conditions. Furthermore, since the abnormality processing program uses a part of the memory, it can be expressed in a sequence without using a special programming language, making it easier for the user to manage the abnormality processing.

In addition, in the example, a case is shown in which a failure mode is set for an abnormality in an input/output circuit. Of course, it is possible to program a light or heavy failure mode as desired.

As described above, according to the present invention, there is an effect that the user can easily set appropriate abnormality processing depending on the usage status of the controller.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a programmable controller showing one embodiment of the present invention, and FIG. 2 is a circuit diagram isometrically showing a failure mode determination program in the present invention. /... Kneesab four-gram memory for sequence, -...
・User program memory for DDC, J...Logic operation unit, D...Input/output circuit for status DI/DO, S...Input/output buffer memory for status D/DO, 6...DDO Data input/output circuit/
...flag register xp, z-a PTJ, PH,?
W-Ml logic circuit, 10...sensor.

Claims (1)

[Claims] 5 In the programmable instrument control controller 5, which has arithmetic functions for sequence control and arithmetic functions for instrumentation control, abnormality flags are set up to correspond to various abnormalities that are self-diagnosed by hardware or software, and each flag is supported. A program controller for instrumentation control, characterized in that failure modes for minor and major failures can be set by a user program.