JPS59214086A - Graphic processor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a graphic processing device having a clip function.

[Technical background of the invention and its problems]

Generally, in a graphic display, in order to display a two-dimensional figure on a CRT display, the figure is once written into an image memory, and then sequentially read out and converted into a video signal. The image memory has a one-dimensional address space structure, and its addresses logically correspond to the coordinate space in which a figure is developed. In this coordinate space, there is a clip function that defines an arbitrary rectangular area and controls the development of figures only within that area.

In a graphic processing device having the above-mentioned clipping function, when trying to perform flexible control such as maintaining the original drawing state inside the above-mentioned rectangular area and drawing outside the rectangular area, it is difficult to realize this clipping function. The hardware was a problem, which not only increased the burden on the software but also had a negative impact on processing time.

[Purpose of the invention]

The present invention has been made in view of the above drawbacks, and by adding a small amount of hardware, it realizes a clipping function outside the specified area, and also realizes switching of area specification for clipping by program specification. The object of the present invention is to provide a graphic processing device that obtains the following information.

[Summary of the invention]

In order to achieve the above object, the present invention further adds a flip-flop and an exclusive OR gate to the conventional hardware for realizing the clip function. The flip-flop 7 has a structure that can be set/reset by a program (firmware), and a write permission signal to the image memory is generated based on the address comparison result between the flip-flop output and the address supplied to the image memory and the defined clip area. This configuration reduces the burden on the software and also contributes to speeding up the processing time.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numerals 11 and 12 are address registers in which X and Y addresses (coordinate coordinates) in the image memory are set.The output thereof is connected to the image memory (not shown) via the memory control circuit 24. 13, 14, 15.16 are clip address registers.The clip address register 13.14 contains the addresses of both ends of the X coordinate in the rectangular area to be defined, and the clip register 15.16 contains the addresses of both ends of the Y coordinate in the rectangular area. Hereafter, 11, 12, 13, 14, and 15, 16 are simply referred to as X register, Y register, Xo register, and Y, respectively.

They will be referred to as registers, XI registers, and Yl registers and will be explained.

1'l, 1g, 19.20 are comparators. Comparator 17
The outputs of X register 1 and Xo register 13 are input to the comparator 18, and the outputs of Y register 12 and Yo register 14 are input to the comparator 18.
The comparator 19 has the outputs of X register 11 and XI register 15, and the comparator 20 has the outputs of Y register 12, Y, and register 1.
A value set to 6 is provided, and a comparison is made to determine if the specified image memory address is within the defined rectangular area. 21 is an AND circuit. The outputs of the comparators 17 to 20 are supplied as inputs to the AND circuit 21, and the result of the AND operation is sent to an exclusive OR circuit (hereinafter simply referred to as 'f, QR22).
is supplied to the − input terminal of The i output of the flip-flop 23 is supplied to the other input terminal of the EOR 22 . The flip-flop 23 is set/reset programmably (firmware), and writing permission or prohibition within the rectangular area is set. The above EOR22 output is X, Y
The signal is transferred to the memory control circuit 24 together with the outputs of the registers 11 and 12, and becomes a signal for controlling data writing to the image memory.

Here, there is no need to explain it, but in the past, the EOR 22 and flip-flop 23 described above did not exist, and the output of the AND circuit 21 was directly connected to the image processing READ/WRIT.
This signal was used to permit E. That is, in the AND circuit 2, when the outputs obtained from the comparators 17 to 2θ are all significant (positive signals), the memory control circuit 2
A positive signal was sent to 4, and data was written to the image memory. On the other hand, if even one of the comparators 17 to 20 generates a negative signal, the negative signal is sent to the memory control circuit 24, and writing to the image memory is prohibited.

FIG. 2 is a conceptual diagram showing a clipping function that permits writing within a defined rectangular area developed on a display screen (image memory). To explain the operation based on this figure, first, arbitrary rectangular areas A, B, C, and D on the image memory are defined as clip areas. For this, Xo register 13
Set the X coordinate XA in the X register 15, set the X coordinate XB in the X register 15, and set the Y coordinates YA, Y! in the Yo register 14, Y, and register 16, respectively. Set 1.

As a result, addresses serving as clip areas are supplied to input terminals B of comparators 17.1B and 19.20, respectively. It is assumed that the line segment SF is generated in this state.

Generally, when generating a line segment in a graphic processing device, the hardware calculates a drawing address based on parameter settings such as starting coordinates, difference between two points, direction, etc., and generates line segments continuously from the starting address. Equipped with equipment. Since this line segment generator is not directly related to the present invention,
Not shown. J from starting coordinates 5 (X11.Ys)
' Between (XA - 1, Ys) (indicated by the dotted line), the X address is outside the clipping area, and therefore the output of the comparator 17 becomes a negative signal, so the write permission signal also becomes negative, and the write permission signal becomes negative, and the data is sent to the image memory. Writing is prohibited and therefore no drawing is performed. From 1 point (XA, YS) to point (XB,
Since the area between YS and YS is within the clipping area, comparator 17.
The outputs of 1B, 19, and 2o all become positive signals, and the write permission signal also becomes positive, allowing writing to the image memory and drawing. Point K' (XB+I, YS) and point E (
xR, YS) becomes a clip area, and now comparator 1
Since the output of 9 becomes negative, the write permission signal also becomes negative, and no drawing is performed.

In this way, if a command to write the line segment sE is issued, the line segment JK' will be automatically drawn by the hardware.

Here, as shown in FIG. 3, rectangular areas A and B.

Let us consider a case where the original drawing state is maintained in C and D, that is, new writing is prohibited, and the other areas are allowed to be drawn.

In such a case, as described above, according to the conventional method, the above-mentioned clipping hardware becomes a problem.

In the present invention, in order to solve this problem, the flip-flop 23 and EOR2 are fully set/reset by the programmer.
2 was added. This not only makes it possible, for example, to make the inside of a rectangular area write-inhibited, but also makes it possible to arbitrarily switch between a prohibited state and a permitted state according to a command from the firmware.

That is, in FIG. 3, when writing is prohibited within the rectangular area, the flip-flop 23 is reset by ○X.
o register 13, X, register 15. Yo register I J, Y, clip address in register 16 °I □ II, tt ++, ++
0+r.

11' Set y and # respectively. In this state, line segment S
If E is generated, comparator 17.1B.

19. All outputs of 20 are positive, and the AND circuit 21
The output becomes positive and is input to the EOR 22. EOR2
Since the positive output of the flip 70 tube 23 is input as positive to the other input terminal of EOR 2, the output of EOR 22, that is, the write permission signal becomes negative and is sent to the memory control circuit 24. Therefore, the starting coordinates S (X!l, Yl+) and J
No drawing is performed between (XB, YS). next,
Between J' (Xn ++, Y") and E (XE, Ys), the output of the comparator 19 becomes a negative signal, and the output of the AND circuit 21 becomes negative and is input to the EOR 12, so the output becomes positive. Therefore, the output becomes positive. The state is set to write permission and drawing is executed.

In addition, although the clip area has been described above as a rectangle for convenience of explanation, it does not depart from the gist of the present invention even if the clip area has an arbitrary shape.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to realize the clipping function outside the specified area, and also to switch the area specification for clipping by program specification. The present invention is particularly effective when a rectangular area on the CR7 display screen of an image processing device is used for the purpose of displaying a menu, etc., and a moving image is generated without being aware of this area.

The conventional method requires time to clear the rectangular area and display the menu, but the present invention can omit this time, contributing to improved processing speed.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a conceptual diagram showing the clipping function that allows writing within a defined rectangular area expanded on the display screen, and Fig. 3 is a diagram showing the defined rectangle. It is a L conceptual diagram showing a clip function developed on a display screen that prohibits writing in an area and enables writing in other areas. 11.12...Address register, 13, 14゜15
．． 16...Clip address register, 17°18.
19.20... Comparator, 21... AND circuit, 22
...Exclusive OR circuit (EOR), xs...flip-flop.

Claims (1)

[Claims] An image memory having an address that logically corresponds to the coordinate space, a clip register in which a value defining an arbitrary area of the coordinate space is set, and a value set in the clip register and an address supplied to the image memory. a comparator that compares the addresses and outputs a signal after determining whether or not the address is within a defined area; a flip-flop that is set/reset by the quadrogram; and the output of the comparator and the output of the flip-flop. and a circuit for generating a signal for controlling writing of data into the image memory.