JPS59211887A - Electronic timepiece - Google Patents
Electronic timepieceInfo
- Publication number
- JPS59211887A JPS59211887A JP8714983A JP8714983A JPS59211887A JP S59211887 A JPS59211887 A JP S59211887A JP 8714983 A JP8714983 A JP 8714983A JP 8714983 A JP8714983 A JP 8714983A JP S59211887 A JPS59211887 A JP S59211887A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- power consumption
- crystal
- during
- battery
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G19/00—Electric power supply circuits specially adapted for use in electronic time-pieces
- G04G19/12—Arrangements for reducing power consumption during storage
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Electromechanical Clocks (AREA)
- Electric Clocks (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は、節電機能を刊刀口した電子時計に関する。[Detailed description of the invention] The present invention relates to an electronic watch with a power saving function.
従来、電池全電源とする電子時計の消費電力を節約する
手段として、ブL学的表示素子を備えた電子時計におい
ては、該光学的表示素子の駆動を停止することによ゛っ
て、また、運針表示礪構を備えた電子時計においては、
リセット機能により発振回路を除くすべての集積回路の
論理l動作を停止し運針を停止することによって、消費
電力を節約する手段がすでに知ら′n実施さnている。Conventionally, as a means to save power consumption of electronic watches that are powered entirely by batteries, in electronic watches equipped with optical display elements, it is possible to reduce the power consumption by stopping the driving of the optical display elements. In electronic watches with a hand movement display structure,
Means for saving power consumption by stopping the logic operation of all integrated circuits except for the oscillation circuit and stopping the movement of the hands using a reset function is already known and implemented.
しかし、特に後者の場合、近年、非常に低消費電力型の
集積回路が開発さrしるようになり、収リセット機能を
動作さnることによって節約できる発振回路を除くすべ
ての集積回路での消費電力は、リセット入力端子・の入
力電流による消費電力に比して、有意性が少なくなって
いる。しかも、運針周期が数十秒以上の長い間隔を有す
る電子時計においてはリセットf7fflによって運針
を停止することにより駆動電力を節約する有意性はもは
やな(、市場出荷時も、リセット@能ヲ勘かせず、運針
状態のまま出荷し′Cいる。し1こかって、かかる現状
におい5 ては、末端使用者が入手する丑での在犀期間
中に電池寿命が短(なり、使用中の電池寿命が本床の寿
命性能と大きく異なる欠点を有していた。=本発明は、
上記欠点ft除去するものであり、在庫期間等の未使用
時の消費′ε力をさらに節約し、電池寿命を補償するこ
とを目的とする。However, especially in the latter case, very low power consumption integrated circuits have been developed in recent years, and all integrated circuits except oscillator circuits, which can be saved by operating the power reset function, The power consumption is less significant than the power consumption due to the input current of the reset input terminal. Moreover, in electronic watches whose hand movements have long intervals of several tens of seconds or more, it is no longer meaningful to save driving power by stopping the hand movement by reset f7ffl (even at the time of market shipment, reset @ function is not recommended). Therefore, under the current situation, the battery life is short during the period when the end user obtains the ox, and the battery life during use is shortened. had a drawback that was significantly different from the life performance of the main bed. = The present invention
The purpose is to eliminate the above-mentioned drawbacks and to further save power consumption when not in use, such as during inventory periods, and to compensate for battery life.
以下、本発明の笑海側を図面に従って説明する。第11
は本発明の一実施例金示す回路ブロック図であり、第1
図中、1は外部操作部材、2は水晶振りb子、3は水晶
発振回路。分周回路。駆動回路を含ひ集粕゛回路、4は
時刻表示碌構、5は電池を示す。第1図において、通常
使用時は外部操作部材1は開放状態にあり、集積回路3
(は論理動作を行ない時刻表示機構4により時刻を表示
する。Hereinafter, the practical aspects of the present invention will be explained with reference to the drawings. 11th
is a circuit block diagram showing one embodiment of the present invention;
In the figure, 1 is an external operating member, 2 is a crystal pendulum, and 3 is a crystal oscillation circuit. Frequency divider circuit. A collection circuit including a drive circuit, 4 a time display mechanism, and 5 a battery. In FIG. 1, during normal use, the external operating member 1 is in an open state, and the integrated circuit 3
( performs a logical operation and displays the time by the time display mechanism 4.
一方、不発明の要旨となる節電時は、外部操作部材lを
短絡することによって、水晶振動子20片方の信号を電
池5の一方の電位に固定する。この結果、集積回路3は
、水晶発振回路を含むすべての動作を停止する。したが
って従来に比して消費電力の節約が可能となる。On the other hand, when saving power, which is the gist of the invention, the signal on one side of the crystal resonator 20 is fixed at the potential on one side of the battery 5 by short-circuiting the external operating member 1. As a result, the integrated circuit 3 stops all operations including the crystal oscillation circuit. Therefore, it is possible to save power consumption compared to the conventional method.
第2図は、第1図における集積回路3に含まrしる水晶
発4辰回路31ヲ詳述した図である。第2図において、
311は発振インバータ、311αば、発振インバータ
311のN −c IL )ランジスタ、312は帰還
抵抗を示す。ま7c32は分周回路、33は駆動回路を
示す。ここで、第2図によってX発明の実施側音ざらに
詳述する。第2図において、消費電力節約のために外部
操作部材1を短絡すると、発振インバータ311ON=
Chトランジスタ311αはON状態となり、外部操作
部材1→帰還抵抗312→N−chトランジスタ311
Cなる電流経路ができる。ただし、帰還抵抗312の抵
抗値は通常数十メガオームと非常に大きく設定さ!シ、
該電流経路における消費電力は、通常動作中の水晶発振
回路31の消費電力に比して非常に小さい。したがって
本発明における節電の有効性は十分に保証さびる。FIG. 2 is a diagram illustrating in detail the four-wire crystal circuit 31 included in the integrated circuit 3 in FIG. In Figure 2,
Reference numeral 311 represents an oscillation inverter, 311α represents an N-c IL ) transistor of the oscillation inverter 311, and 312 represents a feedback resistor. 7c32 is a frequency dividing circuit, and 33 is a driving circuit. Here, the implementation of invention X will be explained in detail with reference to FIG. In FIG. 2, when the external operating member 1 is short-circuited to save power consumption, the oscillation inverter 311ON=
The Ch transistor 311α becomes ON state, and the external operation member 1→feedback resistor 312→N-ch transistor 311
A current path C is created. However, the resistance value of the feedback resistor 312 is normally set to a very large value of several tens of megaohms! C,
The power consumption in this current path is very small compared to the power consumption of the crystal oscillation circuit 31 during normal operation. Therefore, the power saving effectiveness of the present invention is fully guaranteed.
なお、本実施例によnば、発振インバータ3110入力
信号を電池5の一方の電位に固定する例を挙げたが、固
定電位はこれに限らない。また、水晶発振回路31の一
例として、単純インバータ型発振回路を挙げたが、こn
に限定さ!しることはない。In addition, according to this embodiment, an example has been given in which the input signal of the oscillation inverter 3110 is fixed at one potential of the battery 5, but the fixed potential is not limited to this. Furthermore, as an example of the crystal oscillation circuit 31, a simple inverter type oscillation circuit was mentioned, but this
Limited to! There's nothing to do.
以上述べたように不発明によnば、水晶発振回路の発振
インバータの入力信号を外部操作部材により一定電位に
固定することにより集積回路の全論理動作を停止するよ
うにしたものであるから、’OL米のリセットI)Aa
片を有する電子時計に比して、不使用時の消費電力をさ
らに節約することを可能にし、使用時の電池前詰を補償
する効果を肩するAs described above, according to the invention, all logic operations of the integrated circuit are stopped by fixing the input signal of the oscillation inverter of the crystal oscillation circuit to a constant potential using an external operating member. 'OL rice reset I) Aa
Compared to electronic watches that have a single clock, it is possible to further save power consumption when not in use, and it also has the effect of compensating for battery preloading when in use.
第1図は本発明の一実施例を示す回路ブロック図を示す
。
第2図は第1図における集積回路中の水晶発振回rs
全詳、述した回路ブロック図を示す。
a+4゜。外部操作部材
20.水晶振動子
3.8集積回路
4.9時刻表示機構
5 、 。 ′rに池
31 * *水晶発揚回路
311 、。発振インバータFIG. 1 shows a circuit block diagram showing one embodiment of the present invention. Figure 2 shows the crystal oscillation circuit rs in the integrated circuit in Figure 1.
A block diagram of the circuit described in full detail is shown. a+4°. External operating member 20. Crystal oscillator 3.8 Integrated circuit 4.9 Time display mechanism 5. 'r in the pond 31 * *Crystal launch circuit 311,. oscillation inverter
Claims (1)
によって駆動さnる時刻表示機構を肩し、電池を電源と
する電子時計において、該水晶発振回路の発振インバー
タの入力信号を一定電位に固定するように外部操作部材
を備えたことを特徴とする電子時計。In an electronic watch that is powered by a battery and that supports a crystal oscillation circuit, a frequency dividing circuit, a drive circuit, and a time display mechanism driven by the drive circuit, the input signal of the oscillation inverter of the crystal oscillation circuit is kept at a constant potential. An electronic timepiece characterized by having an external operating member fixed therein.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8714983A JPS59211887A (en) | 1983-05-17 | 1983-05-17 | Electronic timepiece |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8714983A JPS59211887A (en) | 1983-05-17 | 1983-05-17 | Electronic timepiece |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS59211887A true JPS59211887A (en) | 1984-11-30 |
Family
ID=13906916
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8714983A Pending JPS59211887A (en) | 1983-05-17 | 1983-05-17 | Electronic timepiece |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59211887A (en) |
-
1983
- 1983-05-17 JP JP8714983A patent/JPS59211887A/en active Pending
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