JPS59208835A - Contact exposure method - Google Patents
Contact exposure methodInfo
- Publication number
- JPS59208835A JPS59208835A JP58084485A JP8448583A JPS59208835A JP S59208835 A JPS59208835 A JP S59208835A JP 58084485 A JP58084485 A JP 58084485A JP 8448583 A JP8448583 A JP 8448583A JP S59208835 A JPS59208835 A JP S59208835A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- wafer
- mask
- chuck
- vacuum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 12
- 239000004065 semiconductor Substances 0.000 claims abstract description 29
- 238000007872 degassing Methods 0.000 abstract 2
- 230000002950 deficient Effects 0.000 abstract 1
- 238000002224 dissection Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 32
- 239000000463 material Substances 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007687 exposure technique Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000013022 venting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
（ａ） 発明の技術分野
本発明は密着露光方法に係り、特に大口径の半導体ウェ
ーハの密着露光方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a contact exposure method, and particularly to a contact exposure method for large diameter semiconductor wafers.
（′ｂ）技術の背景
密着露光方法はフォトマスクのパターン面を複写試料、
たとえば半導体ウェーハ上の感光性材料（フオ）ｖシス
ト）塗布面に直接密着させ露光を加えることによって、
等倍率のパターンを転写する方法であり、機構がきわめ
て簡単であるから半導体製造の中心的な露光技法として
広く用いられている。('b) Background of the technology The contact exposure method uses the patterned surface of a photomask as a copy sample.
For example, by directly contacting and exposing the photosensitive material (photosensitive material) coated surface of a semiconductor wafer,
This is a method of transferring a pattern at the same magnification, and because the mechanism is extremely simple, it is widely used as a central exposure technique in semiconductor manufacturing.
（（３） 従来技術と問題点
従来のフォトレジヌト膜を被覆した半導体つ工−ハ上に
フォトマスクのパターンを転写するための密着露光方法
について第１図の模式的要部断面図を用いて説明すると
、ウェーハチャック１の真空チャック而２に吸引孔３に
よって真空吸着された、Ｖジヌト膜４を被覆してなる半
導体ウェーハ５を、マスク固定台６上のフォトマスク７
に位置合わせした後、真空排気孔８によって真空排気し
て前記半導体ウェーハ５をフオトマ７り７に密着させて
露光する。尚９はウェーハチャック１を真空吸引で上下
に移動可能にするためのフンキンゲルな部材、たとえば
ゴムのような弾性部材で構成されている。((3) Prior Art and Problems A contact exposure method for transferring a photomask pattern onto a semiconductor substrate coated with a conventional photoresin film will be explained using the schematic cross-sectional view of main parts in FIG. 1. Then, the semiconductor wafer 5 coated with the V-denut film 4, which has been vacuum-adsorbed by the vacuum chuck 2 of the wafer chuck 1 through the suction hole 3, is transferred to the photomask 7 on the mask fixing table 6.
After alignment, the semiconductor wafer 5 is evacuated through the vacuum exhaust hole 8, and the semiconductor wafer 5 is brought into close contact with the photomer 7 and exposed. Reference numeral 9 is composed of a flexible member, such as an elastic member such as rubber, for enabling the wafer chuck 1 to be moved up and down by vacuum suction.
しかしながら半導体ウェーハ５の大口径化に伴なって図
示したようにフォトマスク７と半導体ウェーハ５の周縁
部が初めに密着して、中央部にガスが残留し、該残留ガ
スのガス抜きに時間を要する場合があり、時には残留ガ
スが完全に抜けきらないでフォトマスク７と半導体ウェ
ーハ５とが同一平面内において正確に密着しない′！！
ま露光が行なわれていた。このため露光後の解像度の悪
化による良品率の低下、もしくは半導体ウェー／１５上
に形成された露光パターン寸法の誤差を生ずるという欠
点があった。However, as the diameter of the semiconductor wafer 5 increases, as shown in the figure, the photomask 7 and the peripheral edge of the semiconductor wafer 5 first come into close contact with each other, and gas remains in the center, and it takes time to remove the residual gas. In some cases, the residual gas may not be completely removed and the photomask 7 and the semiconductor wafer 5 may not be in close contact with each other in the same plane. !
Well, exposure was being done. For this reason, there has been a drawback that the resolution after exposure is deteriorated, resulting in a decrease in the yield rate, or errors in the dimensions of the exposed pattern formed on the semiconductor wafer/15 occur.
σ）発明の目的
本発明の目的はかかる問題点に鑑みなされたもので、フ
ォトマスクと半導体ウェーハを密着させる際の密着時間
の短縮、並びに正確な解像度のよイレシストパターンを
再現性よく形成することができる密着露光方法の提供に
ある。σ) Purpose of the Invention The purpose of the present invention was made in view of the above problems, and is to shorten the contact time when a photomask and a semiconductor wafer are brought into close contact with each other, and to form an irresistible pattern with accurate resolution and good reproducibility. The purpose of the present invention is to provide a contact exposure method that enables
（ｅ） 発明の構成
その目的を達成するため本発明の密着露光方法は真空チ
ャック面に少なくとも１本の溝が設けられたウェーハチ
ャック上に半導体ウェーハを取り付け、該半導体ウェー
ハにマスクをコンダクトして密着露光することを特徴と
する。(e) Structure of the Invention In order to achieve the object, the contact exposure method of the present invention includes mounting a semiconductor wafer on a wafer chuck in which at least one groove is provided on the surface of the vacuum chuck, and conducting a mask onto the semiconductor wafer. It is characterized by close exposure.
（ｆ） 発明の実施例 以下本発明の実施例について図面を参照して説明する。(f) Examples of the invention Embodiments of the present invention will be described below with reference to the drawings.
第２図は本発明の一実施例の密着露光方法の模式的平面
図、第３図は本発明の一実施例の密着露光方法を説明す
るための模式的要部断面図であり前回と同等の部分につ
いては同一符号を付している。第２図においてウェーハ
チャック１１は、該ウェーハチャック１１の真空チャッ
ク面１２に、たとえば中心を通り深さ約数μ〃ｌ〜数十
／７ ｍ 。FIG. 2 is a schematic plan view of a contact exposure method according to an embodiment of the present invention, and FIG. 3 is a schematic cross-sectional view of essential parts for explaining the contact exposure method according to an embodiment of the present invention, which is the same as the previous one. The same reference numerals are given to the parts. In FIG. 2, the wafer chuck 11 is placed on the vacuum chuck surface 12 of the wafer chuck 11, for example, at a depth of about several microliters to several tens of seven meters, passing through the center.
幅約１闘〜ｌＯｍの十字の溝１３が設けられている。A cross-shaped groove 13 having a width of about 1 to 1 Om is provided.
又ウェーハチャック１１には図示したように所定数の吸
引孔１４が設けられている。Further, the wafer chuck 11 is provided with a predetermined number of suction holes 14 as shown.
かかる構造のウェーハチャック１１上に第３図に示すよ
うにレジヌト膜２１が被覆してなる半導体ウェーハ２２
を真空チャック面１２上に載置し、吸引孔１４によって
真空吸着すれば前記半導体ウェーハ２２は、真空チャッ
ク面１２に設けられた溝１８にそってベンデングされ凹
部２３が形成される。かかる状態において半導体ウェー
ハ２２をマスク固定台２４のフォトマスク２５に位置合
わせした後、真空排気孔２６によって真空排気して前記
半導体ウェーハ２２をフォトマスク２５に密着させる。As shown in FIG. 3, a semiconductor wafer 22 is formed by coating a resin film 21 on the wafer chuck 11 having such a structure.
When the semiconductor wafer 22 is placed on the vacuum chuck surface 12 and vacuum suctioned by the suction hole 14, the semiconductor wafer 22 is bent along the groove 18 provided on the vacuum chuck surface 12, and a recess 23 is formed. After aligning the semiconductor wafer 22 with the photomask 25 on the mask fixing table 24 in this state, the semiconductor wafer 22 is brought into close contact with the photomask 25 by evacuation through the evacuation hole 26.
かかる場合においては、半導体ウェーハ２２とフォトマ
スク２５の間の中央部における残留ガスは前記凹部２３
のガス抜き通路を介して円滑に真空排気されることにな
る。そのため残留ガスのガス抜き時間が短縮され、又完
全にガス抜きが行なわれるため半導体ウェーハ２２とフ
ォトマスク２５の間の隙間が無くな９、露光する際の回
折光による解像不良が減少し、正確なパターン寸法の露
光が可能となる。尚２７はウェーハチャック１１を真空
吸引で上下に移動可能にするためのフレキシグルな部材
、たとえばゴムのような弾性部材によって構成されてい
る。In such a case, the residual gas in the center between the semiconductor wafer 22 and the photomask 25 will be removed from the recess 23.
The vacuum will be smoothly evacuated through the gas vent passage. Therefore, the time for venting the residual gas is shortened, and since the gas is completely vented, there is no gap between the semiconductor wafer 22 and the photomask 259, and poor resolution due to diffracted light during exposure is reduced. Exposure with accurate pattern dimensions becomes possible. Note that 27 is constituted by a flexible member, for example, an elastic member such as rubber, to enable the wafer chuck 11 to be moved up and down by vacuum suction.
乞）発明の詳細
な説明したごとく本発明によれば、ウェーハチャックの
真空チャック面に設けられた溝によって半導体ウェーハ
のベンデングによって残留ガス抜き通路（凹部）を形成
することになり、中央部におけるガスの停滞がなく密着
時間の短縮と正確なＶジヌトパターンを再現性よく形成
することが可能となり、能率１歩留向上並びに品質向上
に効果がある。As described in detail, according to the present invention, residual gas vent passages (concave portions) are formed by bending the semiconductor wafer using the grooves provided on the vacuum chuck surface of the wafer chuck, thereby eliminating gas in the central portion. Since there is no stagnation, it is possible to shorten the adhesion time and form an accurate V dinuto pattern with good reproducibility, which is effective in improving efficiency, yield, and quality.
第１図は従来の密着露光方法を説明するための模式的要
部断面図、第２図は本発明の一実施例を実施するための
露光装置のウェーハチャック部の模式的平面図、第３図
は本発明の一実施例を説明するための模式的要部断面図
である。
図において、１１はウェーハチャック、■２は真空チャ
ック面、１３は溝、１４！は吸引孔、２２は半導体ウェ
ーハ、２５はフォトマスク、２６は真空排気孔を示す。
第１図
３
第２図
第３図FIG. 1 is a schematic cross-sectional view of main parts for explaining a conventional contact exposure method, FIG. 2 is a schematic plan view of a wafer chuck section of an exposure apparatus for carrying out an embodiment of the present invention, and FIG. The figure is a schematic cross-sectional view of essential parts for explaining one embodiment of the present invention. In the figure, 11 is a wafer chuck, 2 is a vacuum chuck surface, 13 is a groove, and 14! 2 is a suction hole, 22 is a semiconductor wafer, 25 is a photomask, and 26 is a vacuum exhaust hole. Figure 1 Figure 3 Figure 2 Figure 3
Claims (1)
ェーハチャック上に半導体ウェーハを取り付け、該半導
体ウェーハにマスクをコンタクトして密着露光すること
を特徴とする密着露光方法。A contact exposure method characterized by mounting a semiconductor wafer on a wafer chuck in which a vacuum chuck is provided with at least one groove, and contacting the semiconductor wafer with a mask to perform contact exposure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58084485A JPS59208835A (en) | 1983-05-13 | 1983-05-13 | Contact exposure method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58084485A JPS59208835A (en) | 1983-05-13 | 1983-05-13 | Contact exposure method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59208835A true JPS59208835A (en) | 1984-11-27 |
Family
ID=13831948
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58084485A Pending JPS59208835A (en) | 1983-05-13 | 1983-05-13 | Contact exposure method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59208835A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104914679A (en) * | 2015-05-18 | 2015-09-16 | 合肥芯硕半导体有限公司 | Multi-functional high-capacity chuck for semiconductor photoetching |
-
1983
- 1983-05-13 JP JP58084485A patent/JPS59208835A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104914679A (en) * | 2015-05-18 | 2015-09-16 | 合肥芯硕半导体有限公司 | Multi-functional high-capacity chuck for semiconductor photoetching |
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